ifc_out32
ifc_out32(stat, &ifc->ifc_nand.nand_evter_stat);
ifc_out32(IFC_CM_EVTER_STAT_CSER, &ifc->cm_evter_stat);
ifc_out32(IFC_CM_EVTER_STAT_CSER, &ifc->cm_evter_stat);
ifc_out32(IFC_CM_EVTER_EN_CSEREN, &ifc->cm_evter_en);
ifc_out32(IFC_CM_EVTER_INTR_EN_CSERIREN, &ifc->cm_evter_intr_en);
ifc_out32(0x0, &ifc->cm_erattr0);
ifc_out32(0x0, &ifc->cm_erattr1);
ifc_out32(IFC_NAND_EVTER_EN_OPC_EN |
ifc_out32(IFC_NAND_EVTER_INTR_OPCIR_EN |
ifc_out32(page_addr, &ifc->ifc_nand.row0);
ifc_out32((oob ? IFC_NAND_COL_MS : 0) | column, &ifc->ifc_nand.col0);
ifc_out32(priv->bank << IFC_NAND_CSEL_SHIFT,
ifc_out32(IFC_NAND_SEQ_STRT_FIR_STRT, &ifc->ifc_nand.nandseq_strt);
ifc_out32((IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |
ifc_out32(0x0, &ifc->ifc_nand.nand_fir1);
ifc_out32((NAND_CMD_READ0 << IFC_NAND_FCR0_CMD0_SHIFT) |
ifc_out32((IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |
ifc_out32(0x0, &ifc->ifc_nand.nand_fir1);
ifc_out32(NAND_CMD_READOOB <<
ifc_out32(NAND_CMD_READ0 <<
ifc_out32(0, &ifc->ifc_nand.nand_fbcr);
ifc_out32(mtd->oobsize - column, &ifc->ifc_nand.nand_fbcr);
ifc_out32((IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |
ifc_out32(command << IFC_NAND_FCR0_CMD0_SHIFT,
ifc_out32(column, &ifc->ifc_nand.row3);
ifc_out32(len, &ifc->ifc_nand.nand_fbcr);
ifc_out32((IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |
ifc_out32((NAND_CMD_ERASE1 << IFC_NAND_FCR0_CMD0_SHIFT) |
ifc_out32(0, &ifc->ifc_nand.nand_fbcr);
ifc_out32(
ifc_out32(
ifc_out32(
ifc_out32(
ifc_out32(nand_fcr0, &ifc->ifc_nand.nand_fcr0);
ifc_out32(ifc_nand_ctrl->index -
ifc_out32(0, &ifc->ifc_nand.nand_fbcr);
ifc_out32((IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |
ifc_out32(NAND_CMD_STATUS << IFC_NAND_FCR0_CMD0_SHIFT,
ifc_out32(1, &ifc->ifc_nand.nand_fbcr);
ifc_out32(IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT,
ifc_out32(NAND_CMD_RESET << IFC_NAND_FCR0_CMD0_SHIFT,
ifc_out32((IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |
ifc_out32(NAND_CMD_STATUS << IFC_NAND_FCR0_CMD0_SHIFT,
ifc_out32(1, &ifc->ifc_nand.nand_fbcr);
ifc_out32(ncfgr | IFC_NAND_NCFGR_SRAM_INIT_EN, &ifc_runtime->ifc_nand.ncfgr);
ifc_out32(csor_8k, &ifc_global->csor_cs[cs].csor);
ifc_out32(0x0000400, &ifc_global->csor_cs[cs].csor_ext);
ifc_out32((IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |
ifc_out32(NAND_CMD_READID << IFC_NAND_FCR0_CMD0_SHIFT,
ifc_out32(0x0, &ifc_runtime->ifc_nand.row3);
ifc_out32(0x0, &ifc_runtime->ifc_nand.nand_fbcr);
ifc_out32(0x0, &ifc_runtime->ifc_nand.row0);
ifc_out32(0x0, &ifc_runtime->ifc_nand.col0);
ifc_out32(cs << IFC_NAND_CSEL_SHIFT,
ifc_out32(IFC_NAND_SEQ_STRT_FIR_STRT,
ifc_out32(csor, &ifc_global->csor_cs[cs].csor);
ifc_out32(csor_ext, &ifc_global->csor_cs[cs].csor_ext);
ifc_out32(0x0, &ifc_runtime->ifc_nand.ncfgr);