init_status
uint64_t init_status:4;
uint64_t init_status:4;
uint64_t init_status:4;
uint64_t init_status:4;
uint64_t init_status:4;
uint64_t init_status:4;
uint64_t init_status:4;
uint64_t init_status:4;
unsigned long init_status[ADF_DEVS_ARRAY_SIZE];
set_bit(accel_dev->accel_id, service->init_status);
memset(service->init_status, 0, sizeof(service->init_status));
if (!test_bit(accel_dev->accel_id, service->init_status))
clear_bit(accel_dev->accel_id, service->init_status);
for (i = 0; i < ARRAY_SIZE(service->init_status); i++) {
if (service->init_status[i] || service->start_status[i]) {
uint32_t init_status;
header.jpegdec.init_status = 0;
header.jpegdec.init_status = 0;
init_status = ((struct mmsch_v4_0_init_header *)(table_loc))->jpegdec.init_status;
&& init_status != MMSCH_VF_ENGINE_STATUS__PASS) {
DRM_ERROR("MMSCH init status is incorrect! readback=0x%08x, header init status for jpeg: %x\n", resp, init_status);
uint32_t init_status;
header.mjpegdec0[j].init_status = 0;
header.mjpegdec1[j - 4].init_status = 0;
init_status =
((struct mmsch_v4_0_3_init_header *)(table_loc))->mjpegdec0[i].init_status;
init_status != MMSCH_VF_ENGINE_STATUS__PASS)
resp, init_status);
uint32_t init_status;
header.mjpegdec0[j].init_status = 0;
header.mjpegdec1[j - 5].init_status = 0;
init_status =
((struct mmsch_v5_0_init_header *)(table_loc))->mjpegdec0[i].init_status;
init_status != MMSCH_VF_ENGINE_STATUS__PASS)
resp, init_status);
uint32_t init_status;
uint32_t init_status;
uint32_t init_status;
uint32_t init_status;
header->eng[i].init_status = 0;
header.inst[i].init_status = 0;
header.inst[i].init_status = 0;
uint32_t init_status;
header.inst[i].init_status = 0;
header.inst[i].init_status = 0;
init_status = ((struct mmsch_v4_0_init_header *)(table_loc))->inst[enabled_vcn].init_status;
&& init_status != MMSCH_VF_ENGINE_STATUS__PASS)
"status for VCN%x: 0x%x\n", resp, enabled_vcn, init_status);
uint32_t init_status;
header.vcn0.init_status = 0;
init_status = ((struct mmsch_v4_0_3_init_header *)(table_loc))->vcn0.init_status;
&& init_status != MMSCH_VF_ENGINE_STATUS__PASS) {
"status for VCN%x: 0x%x\n", resp, enabled_vcn, init_status);
uint32_t init_status;
header.vcn0.init_status = 0;
init_status = ((struct mmsch_v5_0_init_header *)(table_loc))->vcn0.init_status;
&& init_status != MMSCH_VF_ENGINE_STATUS__PASS) {
"status for VCN%x: 0x%x\n", resp, enabled_vcn, init_status);
u8 init_status;
init_status = value & 0xff;
init_status = value >> 24;
switch (init_status) {
u32 init_status:1;
u32 init_status:1;
status = init_status(dev, udev);
if (!(mvm->init_status & IWL_MVM_INIT_STATUS_LEDS_INIT_COMPLETE))
mvm->init_status &= ~IWL_MVM_INIT_STATUS_LEDS_INIT_COMPLETE;
mvm->init_status |= IWL_MVM_INIT_STATUS_LEDS_INIT_COMPLETE;
if (!(mvm->init_status & IWL_MVM_INIT_STATUS_LEDS_INIT_COMPLETE))
unsigned long init_status;
mvm->init_status = 0;
mvm->init_status |= IWL_MVM_INIT_STATUS_THERMAL_INIT_COMPLETE;
if (!(mvm->init_status & IWL_MVM_INIT_STATUS_THERMAL_INIT_COMPLETE))
mvm->init_status &= ~IWL_MVM_INIT_STATUS_THERMAL_INIT_COMPLETE;
u32 init_status:1;
u32 init_status:1;
bfa_cb_init(void *drv, bfa_status_t init_status)
if (init_status == BFA_STATUS_OK) {
u8 init_status;
u8 init_status;
struct init_status init_parm;
struct init_status *parm;