CLK_CON_DIV_CLKCMU_VPP_CORE
CLK_CON_DIV_CLKCMU_VPP_CORE,
"mout_clkcmu_vpp_core", CLK_CON_DIV_CLKCMU_VPP_CORE, 0, 4, CLK_SET_RATE_PARENT, 0),
CLK_CON_DIV_CLKCMU_VPP_CORE,
"gate_clkcmu_vpp_core", CLK_CON_DIV_CLKCMU_VPP_CORE, 0, 4),