i82975x_printk
i82975x_printk(KERN_INFO, "DRAM Timings : Ch0 Ch1\n"
i82975x_printk(KERN_INFO, "MCHBAR real = %0x, remapped = %p\n",
i82975x_printk(KERN_INFO, "DRBCH0R0 = 0x%02x\n", c0drb[0]);
i82975x_printk(KERN_INFO, "DRBCH0R1 = 0x%02x\n", c0drb[1]);
i82975x_printk(KERN_INFO, "DRBCH0R2 = 0x%02x\n", c0drb[2]);
i82975x_printk(KERN_INFO, "DRBCH0R3 = 0x%02x\n", c0drb[3]);
i82975x_printk(KERN_INFO, "DRBCH1R0 = 0x%02x\n", c1drb[0]);
i82975x_printk(KERN_INFO, "DRBCH1R1 = 0x%02x\n", c1drb[1]);
i82975x_printk(KERN_INFO, "DRBCH1R2 = 0x%02x\n", c1drb[2]);
i82975x_printk(KERN_INFO, "DRBCH1R3 = 0x%02x\n", c1drb[3]);
i82975x_printk(KERN_INFO, "DRC_CH0 = %0x, %s\n", drc[0],
i82975x_printk(KERN_INFO, "DRC_CH1 = %0x, %s\n", drc[1],
i82975x_printk(KERN_INFO, "C0 BNKARC = %0x\n",
i82975x_printk(KERN_INFO, "C1 BNKARC = %0x\n",
i82975x_printk(KERN_INFO, "ECC disabled on both channels.\n");