drivers/gpu/ipu-v3/ipu-common.c

236

ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_CUR_BUF(chno));

drivers/gpu/ipu-v3/ipu-common.c

250

reg |= idma_mask(channel->num);

drivers/gpu/ipu-v3/ipu-common.c

252

reg &= ~idma_mask(channel->num);

drivers/gpu/ipu-v3/ipu-common.c

395

return (ipu_cm_read(ipu, IPU_CHA_CUR_BUF(chno)) & idma_mask(chno)) ? 1 : 0;

drivers/gpu/ipu-v3/ipu-common.c

419

return ((reg & idma_mask(channel->num)) != 0);

drivers/gpu/ipu-v3/ipu-common.c

433

ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_BUF0_RDY(chno));

drivers/gpu/ipu-v3/ipu-common.c

435

ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_BUF1_RDY(chno));

drivers/gpu/ipu-v3/ipu-common.c

452

ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_BUF0_RDY(chno));

drivers/gpu/ipu-v3/ipu-common.c

455

ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_BUF1_RDY(chno));

drivers/gpu/ipu-v3/ipu-common.c

458

ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_BUF2_RDY(chno));

drivers/gpu/ipu-v3/ipu-common.c

478

val |= idma_mask(channel->num);

drivers/gpu/ipu-v3/ipu-common.c

494

idma_mask(channel->num)) {

drivers/gpu/ipu-v3/ipu-common.c

514

val &= ~idma_mask(channel->num);

drivers/gpu/ipu-v3/ipu-common.c

523

idma_mask(channel->num)) {

drivers/gpu/ipu-v3/ipu-common.c

524

ipu_cm_write(ipu, idma_mask(channel->num),

drivers/gpu/ipu-v3/ipu-common.c

529

idma_mask(channel->num)) {

drivers/gpu/ipu-v3/ipu-common.c

530

ipu_cm_write(ipu, idma_mask(channel->num),

drivers/gpu/ipu-v3/ipu-common.c

538

val &= ~idma_mask(channel->num);