drivers/dma/idma64.c

102

channel_set_bit(idma64, CH_EN, idma64c->mask);

drivers/dma/idma64.c

107

struct idma64 *idma64 = to_idma64(idma64c->vchan.chan.device);

drivers/dma/idma64.c

109

idma64_chan_stop(idma64, idma64c);

drivers/dma/idma64.c

114

struct idma64 *idma64 = to_idma64(idma64c->vchan.chan.device);

drivers/dma/idma64.c

128

idma64_chan_init(idma64, idma64c);

drivers/dma/idma64.c

131

idma64_chan_start(idma64, idma64c);

drivers/dma/idma64.c

136

static void idma64_chan_irq(struct idma64 *idma64, unsigned short c,

drivers/dma/idma64.c

139

struct idma64_chan *idma64c = &idma64->chan[c];

drivers/dma/idma64.c

149

dma_writel(idma64, CLEAR(ERROR), idma64c->mask);

drivers/dma/idma64.c

152

dma_writel(idma64, CLEAR(XFER), idma64c->mask);

drivers/dma/idma64.c

168

struct idma64 *idma64 = dev;

drivers/dma/idma64.c

169

u32 status = dma_readl(idma64, STATUS_INT);

drivers/dma/idma64.c

178

dev_vdbg(idma64->dma.dev, "%s: status=%#x\n", __func__, status);

drivers/dma/idma64.c

184

status_xfer = dma_readl(idma64, RAW(XFER));

drivers/dma/idma64.c

185

status_err = dma_readl(idma64, RAW(ERROR));

drivers/dma/idma64.c

187

for (i = 0; i < idma64->dma.chancnt; i++)

drivers/dma/idma64.c

188

idma64_chan_irq(idma64, i, status_err, status_xfer);

drivers/dma/idma64.c

35

static void idma64_off(struct idma64 *idma64)

drivers/dma/idma64.c

39

dma_writel(idma64, CFG, 0);

drivers/dma/idma64.c

41

channel_clear_bit(idma64, MASK(XFER), idma64->all_chan_mask);

drivers/dma/idma64.c

42

channel_clear_bit(idma64, MASK(BLOCK), idma64->all_chan_mask);

drivers/dma/idma64.c

43

channel_clear_bit(idma64, MASK(SRC_TRAN), idma64->all_chan_mask);

drivers/dma/idma64.c

44

channel_clear_bit(idma64, MASK(DST_TRAN), idma64->all_chan_mask);

drivers/dma/idma64.c

45

channel_clear_bit(idma64, MASK(ERROR), idma64->all_chan_mask);

drivers/dma/idma64.c

49

} while (dma_readl(idma64, CFG) & IDMA64_CFG_DMA_EN && --count);

drivers/dma/idma64.c

52

static void idma64_on(struct idma64 *idma64)

drivers/dma/idma64.c

539

struct idma64 *idma64;

drivers/dma/idma64.c

54

dma_writel(idma64, CFG, IDMA64_CFG_DMA_EN);

drivers/dma/idma64.c

544

idma64 = devm_kzalloc(chip->dev, sizeof(*idma64), GFP_KERNEL);

drivers/dma/idma64.c

545

if (!idma64)

drivers/dma/idma64.c

548

idma64->regs = chip->regs;

drivers/dma/idma64.c

549

chip->idma64 = idma64;

drivers/dma/idma64.c

551

idma64->chan = devm_kcalloc(chip->dev, nr_chan, sizeof(*idma64->chan),

drivers/dma/idma64.c

553

if (!idma64->chan)

drivers/dma/idma64.c

556

idma64->all_chan_mask = (1 << nr_chan) - 1;

drivers/dma/idma64.c

559

idma64_off(idma64);

drivers/dma/idma64.c

562

dev_name(chip->dev), idma64);

drivers/dma/idma64.c

566

INIT_LIST_HEAD(&idma64->dma.channels);

drivers/dma/idma64.c

568

struct idma64_chan *idma64c = &idma64->chan[i];

drivers/dma/idma64.c

571

vchan_init(&idma64c->vchan, &idma64->dma);

drivers/dma/idma64.c

573

idma64c->regs = idma64->regs + i * IDMA64_CH_LENGTH;

drivers/dma/idma64.c

577

dma_cap_set(DMA_SLAVE, idma64->dma.cap_mask);

drivers/dma/idma64.c

578

dma_cap_set(DMA_PRIVATE, idma64->dma.cap_mask);

drivers/dma/idma64.c

580

idma64->dma.device_alloc_chan_resources = idma64_alloc_chan_resources;

drivers/dma/idma64.c

581

idma64->dma.device_free_chan_resources = idma64_free_chan_resources;

drivers/dma/idma64.c

583

idma64->dma.device_prep_slave_sg = idma64_prep_slave_sg;

drivers/dma/idma64.c

585

idma64->dma.device_issue_pending = idma64_issue_pending;

drivers/dma/idma64.c

586

idma64->dma.device_tx_status = idma64_tx_status;

drivers/dma/idma64.c

588

idma64->dma.device_config = idma64_slave_config;

drivers/dma/idma64.c

589

idma64->dma.device_pause = idma64_pause;

drivers/dma/idma64.c

59

static void idma64_chan_init(struct idma64 *idma64, struct idma64_chan *idma64c)

drivers/dma/idma64.c

590

idma64->dma.device_resume = idma64_resume;

drivers/dma/idma64.c

591

idma64->dma.device_terminate_all = idma64_terminate_all;

drivers/dma/idma64.c

592

idma64->dma.device_synchronize = idma64_synchronize;

drivers/dma/idma64.c

594

idma64->dma.src_addr_widths = IDMA64_BUSWIDTHS;

drivers/dma/idma64.c

595

idma64->dma.dst_addr_widths = IDMA64_BUSWIDTHS;

drivers/dma/idma64.c

596

idma64->dma.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);

drivers/dma/idma64.c

597

idma64->dma.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST;

drivers/dma/idma64.c

599

idma64->dma.dev = chip->sysdev;

drivers/dma/idma64.c

601

dma_set_max_seg_size(idma64->dma.dev, IDMA64C_CTLH_BLOCK_TS_MASK);

drivers/dma/idma64.c

603

ret = dma_async_device_register(&idma64->dma);

drivers/dma/idma64.c

613

struct idma64 *idma64 = chip->idma64;

drivers/dma/idma64.c

616

dma_async_device_unregister(&idma64->dma);

drivers/dma/idma64.c

622

devm_free_irq(chip->dev, chip->irq, idma64);

drivers/dma/idma64.c

624

for (i = 0; i < idma64->dma.chancnt; i++) {

drivers/dma/idma64.c

625

struct idma64_chan *idma64c = &idma64->chan[i];

drivers/dma/idma64.c

678

idma64_off(chip->idma64);

drivers/dma/idma64.c

686

idma64_on(chip->idma64);

drivers/dma/idma64.c

71

channel_set_bit(idma64, MASK(XFER), idma64c->mask);

drivers/dma/idma64.c

72

channel_set_bit(idma64, MASK(ERROR), idma64c->mask);

drivers/dma/idma64.c

81

idma64_on(idma64);

drivers/dma/idma64.c

84

static void idma64_chan_stop(struct idma64 *idma64, struct idma64_chan *idma64c)

drivers/dma/idma64.c

86

channel_clear_bit(idma64, CH_EN, idma64c->mask);

drivers/dma/idma64.c

89

static void idma64_chan_start(struct idma64 *idma64, struct idma64_chan *idma64c)

drivers/dma/idma64.h

146

#define channel_set_bit(idma64, reg, mask) \

drivers/dma/idma64.h

147

dma_writel(idma64, reg, ((mask) << 8) | (mask))

drivers/dma/idma64.h

148

#define channel_clear_bit(idma64, reg, mask) \

drivers/dma/idma64.h

149

dma_writel(idma64, reg, ((mask) << 8) | 0)

drivers/dma/idma64.h

193

static inline struct idma64 *to_idma64(struct dma_device *ddev)

drivers/dma/idma64.h

195

return container_of(ddev, struct idma64, dma);

drivers/dma/idma64.h

198

static inline u32 idma64_readl(struct idma64 *idma64, int offset)

drivers/dma/idma64.h

200

return readl(idma64->regs + offset);

drivers/dma/idma64.h

203

static inline void idma64_writel(struct idma64 *idma64, int offset, u32 value)

drivers/dma/idma64.h

205

writel(value, idma64->regs + offset);

drivers/dma/idma64.h

208

#define dma_readl(idma64, reg) \

drivers/dma/idma64.h

209

idma64_readl(idma64, IDMA64_##reg)

drivers/dma/idma64.h

210

#define dma_writel(idma64, reg, value) \

drivers/dma/idma64.h

211

idma64_writel(idma64, IDMA64_##reg, (value))

drivers/dma/idma64.h

226

struct idma64 *idma64;