id4
static int cpuid4_info_fill_done(struct _cpuid4_info *id4, union _cpuid4_leaf_eax eax,
id4->eax = eax;
id4->ebx = ebx;
id4->ecx = ecx;
id4->size = (ecx.split.number_of_sets + 1) *
static int amd_fill_cpuid4_info(int index, struct _cpuid4_info *id4)
return cpuid4_info_fill_done(id4, eax, ebx, ecx);
static int intel_fill_cpuid4_info(int index, struct _cpuid4_info *id4)
return cpuid4_info_fill_done(id4, eax, ebx, ecx);
static int fill_cpuid4_info(int index, struct _cpuid4_info *id4)
amd_fill_cpuid4_info(index, id4) :
intel_fill_cpuid4_info(index, id4);
static unsigned int get_cache_id(u32 apicid, const struct _cpuid4_info *id4)
num_threads_sharing = 1 + id4->eax.split.num_threads_sharing;
struct _cpuid4_info id4 = {};
if (!amd_fill_cpuid4_info(llc_index, &id4))
c->topo.llc_id = get_cache_id(c->topo.apicid, &id4);
static unsigned int calc_cache_topo_id(struct cpuinfo_x86 *c, const struct _cpuid4_info *id4)
num_threads_sharing = 1 + id4->eax.split.num_threads_sharing;
struct _cpuid4_info id4 = {};
ret = intel_fill_cpuid4_info(i, &id4);
switch (id4.eax.split.level) {
if (id4.eax.split.type == CTYPE_DATA)
l1d = id4.size / 1024;
else if (id4.eax.split.type == CTYPE_INST)
l1i = id4.size / 1024;
l2 = id4.size / 1024;
l2_id = calc_cache_topo_id(c, &id4);
l3 = id4.size / 1024;
l3_id = calc_cache_topo_id(c, &id4);
const struct _cpuid4_info *id4)
nshared = id4->eax.split.num_threads_sharing + 1;
const struct _cpuid4_info *id4)
if (__cache_amd_cpumap_setup(cpu, index, id4))
num_threads_sharing = 1 + id4->eax.split.num_threads_sharing;
static void ci_info_init(struct cacheinfo *ci, const struct _cpuid4_info *id4,
ci->id = id4->id;
ci->level = id4->eax.split.level;
ci->type = cache_type_map[id4->eax.split.type];
ci->coherency_line_size = id4->ebx.split.coherency_line_size + 1;
ci->ways_of_associativity = id4->ebx.split.ways_of_associativity + 1;
ci->size = id4->size;
ci->number_of_sets = id4->ecx.split.number_of_sets + 1;
ci->physical_line_partition = id4->ebx.split.physical_line_partition + 1;
struct _cpuid4_info id4 = {};
ret = fill_cpuid4_info(idx, &id4);
id4.id = get_cache_id(apicid, &id4);
ci_info_init(ci++, &id4, nb);
__cache_cpumap_setup(cpu, idx, &id4);
0.051285 * id4, 26.168746 * id4, -4.361449 * id4, -0.000001 * id4,
29.832207 * id4, 50.047322 * id4, -25.380017 * id4, 2.546422 * id4,
33.541131 * id4, -34.149302 * id4, 5.691537 * id4, 0.000002 * id4,
-41.470726 * id4, -17.775823 * id4, 13.057821 * id4, -1.15823 * id4,
-3.402339 * id4, 0.000209 * id4, -0.000092 * id4, 0.000010 * id4,
8.293120 * id4, -1.192888 * id4, -0.947652 * id4, 0.094507 * id4,
39.541978 * id4, 5.680053 * id4, -0.946676 * id4, 0.000000 * id4,
20.687300 * id4, 3.014003 * id4, -0.557786 * id4, -0.01311 * id4,
u8 id1, id2, id4;
ret = ksz_read8(dev, REG_KSZ8864_CHIP_ID, &id4);
if (id4 & SW_KSZ8864)
&id4);
if (id4 == SKU_ID_KSZ8563)
else if (id4 == SKU_ID_KSZ9563)
u8 id1, id2, id3, id4;
id4 = i + 3 < opts->rm_list.nr ? opts->rm_list.ids[i + 3] : TCPOPT_NOP;
put_unaligned_be32(id1 << 24 | id2 << 16 | id3 << 8 | id4, ptr);
ASSERT_EQ(optq.prog_ids[3], id4, "prog_ids[3]");
__u32 fd1, fd2, fd3, fd4, id1, id2, id3, id4;
id4 = id_from_prog_fd(fd4);
__u32 fd1, fd2, fd3, fd4, id1, id2, id3, id4;
ASSERT_EQ(optq.prog_ids[3], id4, "prog_ids[3]");
id4 = id_from_prog_fd(fd4);
__u32 fd1, fd2, fd3, fd4, id1, id2, id3, id4;
id4 = id_from_prog_fd(fd4);
ASSERT_NEQ(id3, id4, "prog_ids_3_4");
ASSERT_EQ(optq.prog_ids[0], id4, "prog_ids[0]");
__u32 fd1, fd2, fd3, fd4, id1, id2, id3, id4;
__u32 fd1, fd2, fd3, fd4, id1, id2, id3, id4;
id4 = id_from_prog_fd(fd4);
ASSERT_NEQ(id3, id4, "prog_ids_3_4");
ASSERT_EQ(optq.prog_ids[3], id4, "prog_ids[3]");
__u32 fd1, fd2, fd3, fd4, id1, id2, id3, id4;
id4 = id_from_prog_fd(fd4);
id4 = id_from_prog_fd(fd4);
ASSERT_NEQ(id3, id4, "prog_ids_3_4");
ASSERT_NEQ(id3, id4, "prog_ids_3_4");
__u32 fd1, fd2, fd3, fd4, id1, id2, id3, id4;
id4 = id_from_prog_fd(fd4);
ASSERT_NEQ(id3, id4, "prog_ids_3_4");
ASSERT_EQ(optq.prog_ids[3], id4, "prog_ids[3]");
ASSERT_EQ(optq.prog_ids[2], id4, "prog_ids[2]");
__u32 fd1, fd2, fd3, fd4, id1, id2, id3, id4;
id4 = id_from_prog_fd(fd4);
ASSERT_NEQ(id3, id4, "prog_ids_3_4");
ASSERT_EQ(optq.prog_ids[3], id4, "prog_ids[3]");
ASSERT_EQ(optq.prog_ids[2], id4, "prog_ids[2]");
ASSERT_EQ(optq.prog_ids[1], id4, "prog_ids[1]");
ASSERT_EQ(optq.prog_ids[0], id4, "prog_ids[0]");
__u32 fd1, fd2, fd3, fd4, id1, id2, id3, id4;
id4 = id_from_prog_fd(fd4);
ASSERT_NEQ(id3, id4, "prog_ids_3_4");
ASSERT_EQ(optq.prog_ids[3], id4, "prog_ids[3]");
ASSERT_EQ(optq.prog_ids[2], id4, "prog_ids[2]");
ASSERT_EQ(optq.prog_ids[1], id4, "prog_ids[1]");
ASSERT_EQ(optq.prog_ids[0], id4, "prog_ids[0]");
__u32 fd1, fd2, fd3, fd4, id1, id2, id3, id4;
id4 = id_from_prog_fd(fd4);
ASSERT_EQ(optq.prog_ids[3], id4, "prog_ids[3]");
ASSERT_EQ(prog_ids[3], id4, "prog_ids[3]");
ASSERT_EQ(prog_ids[3], id4, "prog_ids[3]");
__u32 fd1, fd2, fd3, fd4, id1, id2, id3, id4;
id4 = id_from_prog_fd(fd4);
ASSERT_NEQ(id3, id4, "prog_ids_3_4");
ASSERT_EQ(optq.prog_ids[3], id4, "prog_ids[3]");