i2c_readl
val = i2c_readl(i2c, REG_CON) & REG_CON_TUNING_MASK;
u32 val = i2c_readl(i2c, REG_CON) & REG_CON_TUNING_MASK;
ctrl = i2c_readl(i2c, REG_CON);
ctrl = i2c_readl(i2c, REG_CON) & REG_CON_TUNING_MASK;
con = i2c_readl(i2c, REG_CON);
i2c_writel(i2c, i2c_readl(i2c, REG_CON) & ~REG_CON_START, REG_CON);
val = i2c_readl(i2c, RXBUFFER_BASE + (i / 4) * 4);
con = i2c_readl(i2c, REG_CON);
ipd = i2c_readl(i2c, REG_IPD);
val = i2c_readl(i2c, REG_CON);
u32 sl_cfg = i2c_readl(i2c_dev, i2c_dev->hw->regs->sl_cnfg);
cnfg = i2c_readl(i2c_dev, i2c_dev->hw->regs->cnfg);
val = i2c_readl(i2c_dev, i2c_dev->hw->regs->mst_fifo_status);
val = i2c_readl(i2c_dev, i2c_dev->hw->regs->fifo_status);
val = i2c_readl(i2c_dev, i2c_dev->hw->regs->rx_fifo);
val = i2c_readl(i2c_dev, i2c_dev->hw->regs->mst_fifo_status);
val = i2c_readl(i2c_dev, i2c_dev->hw->regs->fifo_status);
status = i2c_readl(i2c_dev, i2c_dev->hw->regs->int_status);
i2c_readl(i2c_dev, i2c_dev->hw->regs->packet_transfer_status),
i2c_readl(i2c_dev, i2c_dev->hw->regs->status),
i2c_readl(i2c_dev, i2c_dev->hw->regs->cnfg));
u32 status = i2c_readl(i2c_dev, i2c_dev->hw->regs->int_status);
val = i2c_readl(i2c_dev, i2c_dev->hw->regs->bus_clear_status);
i2c_readl(i2c_dev, i2c_dev->hw->regs->int_mask));
int_mask = i2c_readl(i2c_dev, i2c_dev->hw->regs->int_mask) & ~mask;
int_mask = i2c_readl(i2c_dev, i2c_dev->hw->regs->int_mask) | mask;
val = i2c_readl(i2c_dev, offset);