ice_write_phy_reg_e82x
err = ice_write_phy_reg_e82x(hw, port, low_addr, low);
err = ice_write_phy_reg_e82x(hw, port, high_addr, high);
err = ice_write_phy_reg_e82x(hw, port, low_addr, low);
err = ice_write_phy_reg_e82x(hw, port, high_addr, high);
err = ice_write_phy_reg_e82x(hw, port, P_REG_WL,
err = ice_write_phy_reg_e82x(hw, port, P_REG_TX_TIMER_INC_PRE_L,
err = ice_write_phy_reg_e82x(hw, port, P_REG_TX_TIMER_INC_PRE_U,
err = ice_write_phy_reg_e82x(hw, port, P_REG_RX_TIMER_INC_PRE_L,
err = ice_write_phy_reg_e82x(hw, port, P_REG_RX_TIMER_INC_PRE_U,
err = ice_write_phy_reg_e82x(hw, port, P_REG_TX_TMR_CMD, val);
err = ice_write_phy_reg_e82x(hw, port, P_REG_RX_TMR_CMD,
err = ice_write_phy_reg_e82x(hw, port, P_REG_TX_OR, 1);
err = ice_write_phy_reg_e82x(hw, port, P_REG_RX_OR, 1);
err = ice_write_phy_reg_e82x(hw, port, P_REG_TX_OR, 0);
err = ice_write_phy_reg_e82x(hw, port, P_REG_RX_OR, 0);
err = ice_write_phy_reg_e82x(hw, port, P_REG_TX_OR, 0);
err = ice_write_phy_reg_e82x(hw, port, P_REG_RX_OR, 0);
err = ice_write_phy_reg_e82x(hw, port, P_REG_PS, val);
err = ice_write_phy_reg_e82x(hw, port, P_REG_PS, val);
err = ice_write_phy_reg_e82x(hw, port, P_REG_PS, val);
err = ice_write_phy_reg_e82x(hw, port, P_REG_PS, val);
err = ice_write_phy_reg_e82x(hw, port, P_REG_PS, val);
err = ice_write_phy_reg_e82x(hw, port, P_REG_PS, val);
err = ice_write_phy_reg_e82x(hw, port, P_REG_PS, val);
err = ice_write_phy_reg_e82x(hw, port, P_REG_PS, val);