CLK_CON_DIV_DIV_CLK_CMGP_USI_CMGP1
CLK_CON_DIV_DIV_CLK_CMGP_USI_CMGP1,
CLK_CON_DIV_DIV_CLK_CMGP_USI_CMGP1, 0, 5, CLK_SET_RATE_PARENT, 0),