ice_read_quad_reg_e82x
err = ice_read_quad_reg_e82x(hw, quad, Q_REG_FIFO01_STATUS,
err = ice_read_quad_reg_e82x(hw, quad, Q_REG_FIFO23_STATUS,
err = ice_read_quad_reg_e82x(hw, quad, lo_addr, &lo);
err = ice_read_quad_reg_e82x(hw, quad, hi_addr, &hi);
err = ice_read_quad_reg_e82x(hw, quad, Q_REG_TX_MEM_GBL_CFG, &val);
err = ice_read_quad_reg_e82x(hw, quad, Q_REG_TX_MEMORY_STATUS_U, &hi);
err = ice_read_quad_reg_e82x(hw, quad, Q_REG_TX_MEMORY_STATUS_L, &lo);
err = ice_read_quad_reg_e82x(hw, quad, Q_REG_TX_MEM_GBL_CFG, &val);
int ice_read_quad_reg_e82x(struct ice_hw *hw, u8 quad, u16 offset, u32 *val);