drivers/accel/habanalabs/common/device.c

2806

struct hw_err_info *info = &hdev->captured_err_info.hw_err;

drivers/accel/habanalabs/common/habanalabs.h

3198

struct hw_err_info hw_err;

drivers/accel/habanalabs/common/habanalabs_ioctl.c

896

info = &hdev->captured_err_info.hw_err;

drivers/crypto/hisilicon/qm.c

2774

struct qm_hw_err *err, *tmp, *hw_err;

drivers/crypto/hisilicon/qm.c

2786

hw_err = kzalloc_obj(*hw_err);

drivers/crypto/hisilicon/qm.c

2787

if (!hw_err)

drivers/crypto/hisilicon/qm.c

2797

hw_err->timestamp = jiffies;

drivers/crypto/hisilicon/qm.c

2799

if ((hw_err->timestamp - err->timestamp) / HZ >

drivers/crypto/hisilicon/qm.c

2807

list_add(&hw_err->list, &isolate->qm_hw_errs);

drivers/gpu/drm/xe/regs/xe_hw_error_regs.h

61

#define ERR_STAT_GT_VECTOR_REG(hw_err, x) (hw_err == HARDWARE_ERROR_CORRECTABLE ? \

drivers/gpu/drm/xe/regs/xe_hw_error_regs.h

84

#define SOC_LOCAL_ERR_STAT_REG(base, hw_err) XE_REG(hw_err == HARDWARE_ERROR_CORRECTABLE ? \

drivers/gpu/drm/xe/xe_hw_error.c

166

#define PVC_MASTER_LOCAL_REG_INFO(hw_err) ((hw_err == HARDWARE_ERROR_FATAL) ? \

drivers/gpu/drm/xe/xe_hw_error.c

183

static void csc_hw_error_handler(struct xe_tile *tile, const enum hardware_error hw_err)

drivers/gpu/drm/xe/xe_hw_error.c

185

const enum drm_xe_ras_error_severity severity = hw_err_to_severity(hw_err);

drivers/gpu/drm/xe/xe_hw_error.c

24

#define PVC_ERROR_MASK_SET(hw_err, err_bit) ((hw_err == HARDWARE_ERROR_CORRECTABLE) ? \

drivers/gpu/drm/xe/xe_hw_error.c

265

static void gt_hw_error_handler(struct xe_tile *tile, const enum hardware_error hw_err,

drivers/gpu/drm/xe/xe_hw_error.c

268

const enum drm_xe_ras_error_severity severity = hw_err_to_severity(hw_err);

drivers/gpu/drm/xe/xe_hw_error.c

279

if (hw_err == HARDWARE_ERROR_NONFATAL) {

drivers/gpu/drm/xe/xe_hw_error.c

285

for (i = 0; i < PVC_GT_VECTOR_LEN(hw_err); i++) {

drivers/gpu/drm/xe/xe_hw_error.c

288

vector = xe_mmio_read32(mmio, ERR_STAT_GT_VECTOR_REG(hw_err, i));

drivers/gpu/drm/xe/xe_hw_error.c

308

err_stat = xe_mmio_read32(mmio, ERR_STAT_GT_REG(hw_err));

drivers/gpu/drm/xe/xe_hw_error.c

310

if (PVC_ERROR_MASK_SET(hw_err, errbit))

drivers/gpu/drm/xe/xe_hw_error.c

314

xe_mmio_write32(mmio, ERR_STAT_GT_REG(hw_err), err_stat);

drivers/gpu/drm/xe/xe_hw_error.c

337

xe_mmio_write32(mmio, ERR_STAT_GT_VECTOR_REG(hw_err, i), vector);

drivers/gpu/drm/xe/xe_hw_error.c

341

static void soc_slave_ieh_handler(struct xe_tile *tile, const enum hardware_error hw_err, u32 error_id)

drivers/gpu/drm/xe/xe_hw_error.c

343

const enum drm_xe_ras_error_severity severity = hw_err_to_severity(hw_err);

drivers/gpu/drm/xe/xe_hw_error.c

349

slave_global_errstat = xe_mmio_read32(mmio, SOC_GLOBAL_ERR_STAT_REG(slave, hw_err));

drivers/gpu/drm/xe/xe_hw_error.c

352

slave_local_errstat = xe_mmio_read32(mmio, SOC_LOCAL_ERR_STAT_REG(slave, hw_err));

drivers/gpu/drm/xe/xe_hw_error.c

354

if (hw_err == HARDWARE_ERROR_FATAL) {

drivers/gpu/drm/xe/xe_hw_error.c

360

xe_mmio_write32(mmio, SOC_LOCAL_ERR_STAT_REG(slave, hw_err),

drivers/gpu/drm/xe/xe_hw_error.c

367

xe_mmio_write32(mmio, SOC_GLOBAL_ERR_STAT_REG(slave, hw_err), slave_global_errstat);

drivers/gpu/drm/xe/xe_hw_error.c

370

static void soc_hw_error_handler(struct xe_tile *tile, const enum hardware_error hw_err,

drivers/gpu/drm/xe/xe_hw_error.c

373

const enum drm_xe_ras_error_severity severity = hw_err_to_severity(hw_err);

drivers/gpu/drm/xe/xe_hw_error.c

388

xe_mmio_write32(mmio, SOC_GSYSEVTCTL_REG(master, slave, i), ~REG_BIT(hw_err));

drivers/gpu/drm/xe/xe_hw_error.c

390

if (hw_err == HARDWARE_ERROR_CORRECTABLE) {

drivers/gpu/drm/xe/xe_hw_error.c

391

xe_mmio_write32(mmio, SOC_GLOBAL_ERR_STAT_REG(master, hw_err), REG_GENMASK(31, 0));

drivers/gpu/drm/xe/xe_hw_error.c

392

xe_mmio_write32(mmio, SOC_LOCAL_ERR_STAT_REG(master, hw_err), REG_GENMASK(31, 0));

drivers/gpu/drm/xe/xe_hw_error.c

393

xe_mmio_write32(mmio, SOC_GLOBAL_ERR_STAT_REG(slave, hw_err), REG_GENMASK(31, 0));

drivers/gpu/drm/xe/xe_hw_error.c

394

xe_mmio_write32(mmio, SOC_LOCAL_ERR_STAT_REG(slave, hw_err), REG_GENMASK(31, 0));

drivers/gpu/drm/xe/xe_hw_error.c

403

master_global_errstat = xe_mmio_read32(mmio, SOC_GLOBAL_ERR_STAT_REG(master, hw_err));

drivers/gpu/drm/xe/xe_hw_error.c

405

soc_slave_ieh_handler(tile, hw_err, error_id);

drivers/gpu/drm/xe/xe_hw_error.c

408

master_local_errstat = xe_mmio_read32(mmio, SOC_LOCAL_ERR_STAT_REG(master, hw_err));

drivers/gpu/drm/xe/xe_hw_error.c

411

log_soc_error(tile, PVC_MASTER_LOCAL_REG_INFO(hw_err), severity, regbit, error_id);

drivers/gpu/drm/xe/xe_hw_error.c

413

xe_mmio_write32(mmio, SOC_LOCAL_ERR_STAT_REG(master, hw_err), master_local_errstat);

drivers/gpu/drm/xe/xe_hw_error.c

419

xe_mmio_write32(mmio, SOC_GLOBAL_ERR_STAT_REG(master, hw_err), master_global_errstat);

drivers/gpu/drm/xe/xe_hw_error.c

427

static void hw_error_source_handler(struct xe_tile *tile, const enum hardware_error hw_err)

drivers/gpu/drm/xe/xe_hw_error.c

429

const enum drm_xe_ras_error_severity severity = hw_err_to_severity(hw_err);

drivers/gpu/drm/xe/xe_hw_error.c

441

err_src = xe_mmio_read32(&tile->mmio, DEV_ERR_STAT_REG(hw_err));

drivers/gpu/drm/xe/xe_hw_error.c

455

csc_hw_error_handler(tile, hw_err);

drivers/gpu/drm/xe/xe_hw_error.c

485

gt_hw_error_handler(tile, hw_err, error_id);

drivers/gpu/drm/xe/xe_hw_error.c

487

soc_hw_error_handler(tile, hw_err, error_id);

drivers/gpu/drm/xe/xe_hw_error.c

491

xe_mmio_write32(&tile->mmio, DEV_ERR_STAT_REG(hw_err), err_src);

drivers/gpu/drm/xe/xe_hw_error.c

508

enum hardware_error hw_err;

drivers/gpu/drm/xe/xe_hw_error.c

51

#define PVC_GT_VECTOR_LEN(hw_err) ((hw_err == HARDWARE_ERROR_CORRECTABLE) ? \

drivers/gpu/drm/xe/xe_hw_error.c

513

for (hw_err = 0; hw_err < HARDWARE_ERROR_MAX; hw_err++) {

drivers/gpu/drm/xe/xe_hw_error.c

514

if (master_ctl & ERROR_IRQ(hw_err))

drivers/gpu/drm/xe/xe_hw_error.c

515

hw_error_source_handler(tile, hw_err);

drivers/gpu/drm/xe/xe_hw_error.c

54

static enum drm_xe_ras_error_severity hw_err_to_severity(const enum hardware_error hw_err)

drivers/gpu/drm/xe/xe_hw_error.c

56

if (hw_err == HARDWARE_ERROR_CORRECTABLE)

drivers/media/platform/st/sti/hva/hva-hw.c

145

ctx->hw_err = false;

drivers/media/platform/st/sti/hva/hva-hw.c

150

ctx->hw_err = false;

drivers/media/platform/st/sti/hva/hva-hw.c

155

ctx->hw_err = false;

drivers/media/platform/st/sti/hva/hva-hw.c

160

ctx->hw_err = true;

drivers/media/platform/st/sti/hva/hva-hw.c

165

ctx->hw_err = true;

drivers/media/platform/st/sti/hva/hva-hw.c

170

ctx->hw_err = true;

drivers/media/platform/st/sti/hva/hva-hw.c

175

ctx->hw_err = true;

drivers/media/platform/st/sti/hva/hva-hw.c

180

ctx->hw_err = true;

drivers/media/platform/st/sti/hva/hva-hw.c

185

ctx->hw_err = true;

drivers/media/platform/st/sti/hva/hva-hw.c

190

ctx->hw_err = true;

drivers/media/platform/st/sti/hva/hva-hw.c

247

ctx->hw_err = true;

drivers/media/platform/st/sti/hva/hva-hw.c

253

ctx->hw_err = true;

drivers/media/platform/st/sti/hva/hva-hw.c

259

ctx->hw_err = true;

drivers/media/platform/st/sti/hva/hva-hw.c

522

ret = ctx->hw_err ? -EFAULT : 0;

drivers/media/platform/st/sti/hva/hva-hw.c

524

ctx->encode_errors += ctx->hw_err ? 1 : 0;

drivers/media/platform/st/sti/hva/hva.h

268

bool hw_err;

drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c

161

hw_err(hw, "eeprom read at offset %d failed\n", data_offset);

drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c

1917

hw_err(hw, "eeprom read at offset %d failed\n", offset);

drivers/net/ethernet/intel/ixgbe/ixgbe_common.c

2849

hw_err(hw, "eeprom read at offset %d failed\n",

drivers/net/ethernet/intel/ixgbe/ixgbe_common.c

2889

hw_err(hw, "eeprom read at offset %d failed\n",

drivers/net/ethernet/intel/ixgbe/ixgbe_common.c

3446

hw_err(hw, "eeprom read at offset %d failed\n", offset);

drivers/net/ethernet/intel/ixgbe/ixgbe_common.c

3455

hw_err(hw, "eeprom read at offset %d failed\n", offset);

drivers/net/ethernet/intel/ixgbe/ixgbe_common.c

4012

hw_err(hw, "eeprom read at offset %d failed\n",

drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c

1500

hw_err(hw, "eeprom read at offset %d failed\n", data_offset);

drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c

2072

hw_err(hw, "eeprom read at %d failed\n",

drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c

2116

hw_err(hw, "eeprom read at offset %d failed\n", *list_offset);

drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c

128

hw_err(hw, "port expander access failed with %d\n", status);

drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c

147

hw_err(hw, "port expander access failed with %d\n", status);

drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c

210

hw_err(hw, "CS4227 reset did not complete\n");

drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c

216

hw_err(hw, "CS4227 EEPROM did not load successfully\n");

drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c

237

hw_err(hw, "semaphore failed with %d\n", status);

drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c

258

hw_err(hw, "semaphore failed with %d\n", status);

drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c

266

hw_err(hw, "CS4227 reset failed: %d", status);

drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c

279

hw_err(hw, "semaphore failed with %d", status);

drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c

2864

hw_err(hw, "ixgbe_fc_rx_pause not valid in strict IEEE mode\n");

drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c

2899

hw_err(hw, "Flow control param set incorrectly\n");

drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c

2954

hw_err(hw, "Flow control autoneg is disabled");

drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c

2960

hw_err(hw, "The link is down");

drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c

3571

hw_err(hw, "ixgbe_fc_rx_pause not valid in strict IEEE mode\n");

drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c

3628

hw_err(hw, "Flow control param set incorrectly\n");

drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c

572

hw_err(hw, "rx_pause not valid in strict IEEE mode\n");

net/bluetooth/hci_core.c

2854

static const u8 hw_err[] = { HCI_EV_HARDWARE_ERROR, 0x01, 0x00 };

net/bluetooth/hci_core.c

2862

skb_put_data(skb, hw_err, 3);