CLK_CON_DIV_CLKCMU_HSI0_DPGTC
"mout_cmu_mux_hsi0_dpgtc", CLK_CON_DIV_CLKCMU_HSI0_DPGTC, 0, 3),
CLK_CON_DIV_CLKCMU_HSI0_DPGTC,
CLK_CON_DIV_CLKCMU_HSI0_DPGTC,
CLK_CON_DIV_CLKCMU_HSI0_DPGTC, 0, 3),
"gout_cmu_hsi0_dpgtc", CLK_CON_DIV_CLKCMU_HSI0_DPGTC, 0, 4),
CLK_CON_DIV_CLKCMU_HSI0_DPGTC,