CLK_CFG_UPDATE
0, 2, 7, CLK_CFG_UPDATE, 0,
8, 2, 15, CLK_CFG_UPDATE, 1,
CLK_CFG_UPDATE, 2),
CLK_CFG_UPDATE, 3),
CLK_CFG_UPDATE, 4),
CLK_CFG_UPDATE, 5),
CLK_CFG_1_CLR, 16, 3, 23, CLK_CFG_UPDATE, 6),
24, 3, 31, CLK_CFG_UPDATE, 7),
CLK_CFG_2_CLR, 0, 3, 7, CLK_CFG_UPDATE, 8),
8, 3, 15, CLK_CFG_UPDATE, 9),
CLK_CFG_UPDATE, 10),
CLK_CFG_UPDATE, 11),
CLK_CFG_3_CLR, 0, 2, 7, CLK_CFG_UPDATE, 12, 0),
CLK_CFG_3_CLR, 8, 3, 15, CLK_CFG_UPDATE, 13, 0),
CLK_CFG_3_CLR, 16, 3, 23, CLK_CFG_UPDATE, 14, 0),
24, 2, 31, CLK_CFG_UPDATE, 15),
CLK_CFG_4_CLR, 0, 2, 7, CLK_CFG_UPDATE, 16),
8, 1, 15, CLK_CFG_UPDATE, 17),
CLK_CFG_4_CLR, 16, 2, 23, CLK_CFG_UPDATE, 18),
CLK_CFG_4_CLR, 24, 2, 31, CLK_CFG_UPDATE, 19),
CLK_CFG_UPDATE, 20),
CLK_CFG_UPDATE, 21),
CLK_CFG_5_CLR, 16, 1, 23, CLK_CFG_UPDATE, 22),
CLK_CFG_UPDATE, 23),
CLK_CFG_6_SET, CLK_CFG_6_CLR, 0, 3, 7, CLK_CFG_UPDATE,
CLK_CFG_6_SET, CLK_CFG_6_CLR, 8, 2, 15, CLK_CFG_UPDATE,
CLK_CFG_UPDATE, 26),
CLK_CFG_6_CLR, 24, 3, 31, CLK_CFG_UPDATE, 27),
CLK_CFG_7_CLR, 0, 3, 7, CLK_CFG_UPDATE, 28,
CLK_CFG_UPDATE, 29),
CLK_CFG_UPDATE, TOP_MUX_AXI_SHIFT),
CLK_CFG_UPDATE, TOP_MUX_MEM_SUB_SHIFT),
CLK_CFG_UPDATE, TOP_MUX_IO_NOC_SHIFT),
CLK_CFG_UPDATE, TOP_MUX_PERI_AXI_SHIFT),
CLK_CFG_UPDATE, TOP_MUX_UFS_PEXTP0_AXI_SHIFT),
CLK_CFG_UPDATE, TOP_MUX_PEXTP1_USB_AXI_SHIFT),
CLK_CFG_UPDATE, TOP_MUX_PERI_FMEM_SUB_SHIFT),
CLK_CFG_UPDATE, TOP_MUX_UFS_PEXPT0_MEM_SUB_SHIFT),
CLK_CFG_UPDATE, TOP_MUX_PEXTP1_USB_MEM_SUB_SHIFT),
CLK_CFG_UPDATE, TOP_MUX_PERI_NOC_SHIFT),
CLK_CFG_UPDATE, TOP_MUX_EMI_N_SHIFT),
CLK_CFG_UPDATE, TOP_MUX_EMI_S_SHIFT),
CLK_CFG_UPDATE, TOP_MUX_AP2CONN_HOST_SHIFT),
CLK_CFG_UPDATE, TOP_MUX_ATB_SHIFT),
CLK_CFG_UPDATE, TOP_MUX_CIRQ_SHIFT),
CLK_CFG_UPDATE, TOP_MUX_PBUS_156M_SHIFT),
CLK_CFG_UPDATE, TOP_MUX_EFUSE_SHIFT),
CLK_CFG_UPDATE, TOP_MUX_MCU_L3GIC_SHIFT),
CLK_CFG_UPDATE, TOP_MUX_MCU_INFRA_SHIFT),
CLK_CFG_UPDATE, TOP_MUX_DSP_SHIFT),
0, 1, 7, CLK_CFG_UPDATE, TOP_MUX_MFG_REF_SHIFT,
23, CLK_CFG_UPDATE, TOP_MUX_MFG_EB_SHIFT),
24, 2, 31, CLK_CFG_UPDATE, TOP_MUX_UART_SHIFT,
0, 3, 7, CLK_CFG_UPDATE, TOP_MUX_SPI0_BCLK_SHIFT,
8, 3, 15, CLK_CFG_UPDATE, TOP_MUX_SPI1_BCLK_SHIFT,
16, 3, 23, CLK_CFG_UPDATE, TOP_MUX_SPI2_BCLK_SHIFT,
0x040, 0x044, 0x048, 0, 2, 7, CLK_CFG_UPDATE,
0x044, 0x048, 8, 2, 15, CLK_CFG_UPDATE, 1),
0x048, 16, 3, 23, CLK_CFG_UPDATE, 2),
0x044, 0x048, 24, 3, 31, CLK_CFG_UPDATE, 3),
0x054, 0x058, 0, 2, 7, CLK_CFG_UPDATE, 4),
0x054, 0x058, 8, 2, 15, CLK_CFG_UPDATE, 5),
0x050, 0x054, 0x058, 16, 3, 23, CLK_CFG_UPDATE, 6),
0x050, 0x054, 0x058, 24, 3, 31, CLK_CFG_UPDATE, 7),
0x064, 0x068, 0, 1, 7, CLK_CFG_UPDATE, 8),
0x064, 0x068, 8, 2, 15, CLK_CFG_UPDATE, 9),
23, CLK_CFG_UPDATE, 10, 0),
31, CLK_CFG_UPDATE, 11, 0),
CLK_CFG_UPDATE, 12, 0),
CLK_CFG_UPDATE, 13, 0),
CLK_CFG_UPDATE, 14, 0),
0x070, 0x074, 0x078, 24, 2, 31, CLK_CFG_UPDATE,
CLK_CFG_UPDATE, 16),
0x080, 0x084, 0x088, 8, 1, 15, CLK_CFG_UPDATE, 17),
0x080, 0x084, 0x088, 16, 1, 23, CLK_CFG_UPDATE,
CLK_CFG_UPDATE, 19),
CLK_CFG_UPDATE, 20),
CLK_CFG_UPDATE, 21),
CLK_CFG_UPDATE, 22),
0x0a0, 0x0a4, 0x0a8, 0, 2, 7, CLK_CFG_UPDATE,
CLK_CFG_UPDATE, 25),
CLK_CFG_UPDATE, 26),
0x0a0, 0x0a4, 0x0a8, 24, 1, 31, CLK_CFG_UPDATE,
0x0b4, 0x0b8, 0, 3, 7, CLK_CFG_UPDATE, 28),
0x0b4, 0x0b8, 8, 2, 15, CLK_CFG_UPDATE, 29),
0x0b0, 0x0b4, 0x0b8, 16, 2, 23, CLK_CFG_UPDATE,
CLK_CFG_UPDATE, 31),