drivers/clk/mediatek/clk-mt6735-topckgen.c

359

MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD1_SEL, "aud_1_sel", aud_1_2_sel_parents, CLK_CFG_6, CLK_CFG_6_SET, CLK_CFG_6_CLR, 0, 1, 7, 0, 0),

drivers/clk/mediatek/clk-mt6735-topckgen.c

360

MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD2_SEL, "aud_2_sel", aud_1_2_sel_parents, CLK_CFG_6, CLK_CFG_6_SET, CLK_CFG_6_CLR, 8, 1, 15, 0, 0),

drivers/clk/mediatek/clk-mt6735-topckgen.c

361

MUX_GATE_CLR_SET_UPD(CLK_TOP_IRDA_SEL, "irda_sel", irda_sel_parents, CLK_CFG_6, CLK_CFG_6_SET, CLK_CFG_6_CLR, 16, 1, 23, 0, 0),

drivers/clk/mediatek/clk-mt6735-topckgen.c

362

MUX_GATE_CLR_SET_UPD(CLK_TOP_IRTX_SEL, "irtx_sel", irtx_sel_parents, CLK_CFG_6, CLK_CFG_6_SET, CLK_CFG_6_CLR, 24, 1, 31, 0, 0),

drivers/clk/mediatek/clk-mt6765.c

448

MUX_GATE_CLR_SET_UPD(CLK_TOP_I2C_SEL, "i2c_sel", i2c_parents, CLK_CFG_6,

drivers/clk/mediatek/clk-mt6765.c

451

MUX_GATE_CLR_SET_UPD(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents, CLK_CFG_6,

drivers/clk/mediatek/clk-mt6765.c

455

CLK_CFG_6, CLK_CFG_6_SET, CLK_CFG_6_CLR, 16, 2, 23,

drivers/clk/mediatek/clk-mt6765.c

458

aes_fde_parents, CLK_CFG_6, CLK_CFG_6_SET,

drivers/clk/mediatek/clk-mt8196-topckgen.c

705

CLK_CFG_6, CLK_CFG_6_SET, CLK_CFG_6_CLR,

drivers/clk/mediatek/clk-mt8196-topckgen.c

709

mfg_eb_parents, CLK_CFG_6, CLK_CFG_6_SET,

drivers/clk/mediatek/clk-mt8196-topckgen.c

713

CLK_CFG_6, CLK_CFG_6_SET, CLK_CFG_6_CLR,