drivers/clk/mediatek/clk-mt6735-topckgen.c

343

MUX_GATE_CLR_SET_UPD(CLK_TOP_UART_SEL, "uart_sel", uart_sel_parents, CLK_CFG_2, CLK_CFG_2_SET, CLK_CFG_2_CLR, 0, 1, 7, 0, 0),

drivers/clk/mediatek/clk-mt6735-topckgen.c

344

MUX_GATE_CLR_SET_UPD(CLK_TOP_SPI_SEL, "spi_sel", spi_sel_parents, CLK_CFG_2, CLK_CFG_2_SET, CLK_CFG_2_CLR, 8, 3, 15, 0, 0),

drivers/clk/mediatek/clk-mt6735-topckgen.c

345

MUX_GATE_CLR_SET_UPD(CLK_TOP_USB20_SEL, "usb20_sel", usb20_sel_parents, CLK_CFG_2, CLK_CFG_2_SET, CLK_CFG_2_CLR, 16, 2, 23, 0, 0),

drivers/clk/mediatek/clk-mt6735-topckgen.c

346

MUX_GATE_CLR_SET_UPD(CLK_TOP_MSDC50_0_SEL, "msdc50_0_sel", msdc50_0_sel_parents, CLK_CFG_2, CLK_CFG_2_SET, CLK_CFG_2_CLR, 24, 3, 31, 0, 0),

drivers/clk/mediatek/clk-mt6765.c

397

camtg_parents, CLK_CFG_2, CLK_CFG_2_SET,

drivers/clk/mediatek/clk-mt6765.c

400

CLK_CFG_2, CLK_CFG_2_SET, CLK_CFG_2_CLR,

drivers/clk/mediatek/clk-mt6765.c

403

CLK_CFG_2, CLK_CFG_2_SET, CLK_CFG_2_CLR, 16, 1, 23,

drivers/clk/mediatek/clk-mt6765.c

405

MUX_GATE_CLR_SET_UPD(CLK_TOP_SPI_SEL, "spi_sel", spi_parents, CLK_CFG_2,

drivers/clk/mediatek/clk-mt8196-topckgen.c

652

shared_sub_parents, CLK_CFG_2, CLK_CFG_2_SET,

drivers/clk/mediatek/clk-mt8196-topckgen.c

656

p_noc_parents, CLK_CFG_2, CLK_CFG_2_SET,

drivers/clk/mediatek/clk-mt8196-topckgen.c

660

emi_parents, CLK_CFG_2, CLK_CFG_2_SET,

drivers/clk/mediatek/clk-mt8196-topckgen.c

664

emi_parents, CLK_CFG_2, CLK_CFG_2_SET,