drivers/gpu/drm/i915/display/intel_dpt.c

325

return i915_vma_offset(dpt_vma);

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

1020

if (entry->offset != i915_vma_offset(vma)) {

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

1021

entry->offset = i915_vma_offset(vma) | UPDATE;

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

1102

return gen8_canonical_addr((int)reloc->delta + i915_vma_offset(target));

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

1478

gen8_canonical_addr(i915_vma_offset(target->vma)) == reloc->presumed_offset)

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

2400

i915_vma_offset(batch) +

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

2411

i915_vma_offset(eb->trampoline) +

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

383

const u64 start = i915_vma_offset(vma);

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

676

if (entry->offset != i915_vma_offset(vma)) {

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

677

entry->offset = i915_vma_offset(vma) | UPDATE;

drivers/gpu/drm/i915/gem/selftests/huge_pages.c

411

IS_ALIGNED(i915_vma_offset(vma), SZ_2M) &&

drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c

197

*cs++ = lower_32_bits(i915_vma_offset(dst->vma));

drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c

198

*cs++ = upper_32_bits(i915_vma_offset(dst->vma));

drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c

201

*cs++ = lower_32_bits(i915_vma_offset(src->vma));

drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c

202

*cs++ = upper_32_bits(i915_vma_offset(src->vma));

drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c

243

*cs++ = lower_32_bits(i915_vma_offset(dst->vma));

drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c

245

*cs++ = upper_32_bits(i915_vma_offset(dst->vma));

drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c

248

*cs++ = lower_32_bits(i915_vma_offset(src->vma));

drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c

250

*cs++ = upper_32_bits(i915_vma_offset(src->vma));

drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c

459

if (drm_mm_node_allocated(&vma->node) && i915_vma_offset(vma) != addr) {

drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c

469

GEM_BUG_ON(i915_vma_offset(vma) != addr);

drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c

516

i915_vma_offset(t->batch),

drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c

1013

i915_vma_offset(batch),

drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c

1573

err = engine->emit_bb_start(rq, i915_vma_offset(vma),

drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c

1679

*cmd++ = i915_vma_offset(vma) + result;

drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c

1706

err = engine->emit_bb_start(rq, i915_vma_offset(vma),

drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c

927

*cmd++ = lower_32_bits(i915_vma_offset(vma));

drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c

928

*cmd++ = upper_32_bits(i915_vma_offset(vma));

drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c

1610

err = engine->emit_bb_start(rq, i915_vma_offset(vma), 0, 0);

drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c

146

i915_vma_offset(batch),

drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c

66

offset += i915_vma_offset(vma);

drivers/gpu/drm/i915/gt/gen7_renderclear.c

109

return i915_vma_offset(bc->vma);

drivers/gpu/drm/i915/gt/intel_lrc.c

1421

*cs++ = lower_32_bits(i915_vma_offset(ce->vm->rsvd.vma));

drivers/gpu/drm/i915/gt/intel_lrc.c

1422

*cs++ = upper_32_bits(i915_vma_offset(ce->vm->rsvd.vma));

drivers/gpu/drm/i915/gt/intel_renderstate.c

68

u64 r = s + i915_vma_offset(so->vma);

drivers/gpu/drm/i915/gt/intel_ring_submission.c

939

i915_vma_offset(engine->wa_ctx.vma), 0,

drivers/gpu/drm/i915/gt/selftest_engine_cs.c

184

i915_vma_offset(batch), 8,

drivers/gpu/drm/i915/gt/selftest_engine_cs.c

328

i915_vma_offset(base), 8,

drivers/gpu/drm/i915/gt/selftest_engine_cs.c

338

i915_vma_offset(nop),

drivers/gpu/drm/i915/gt/selftest_execlists.c

2747

*cs++ = lower_32_bits(i915_vma_offset(vma));

drivers/gpu/drm/i915/gt/selftest_execlists.c

2748

*cs++ = upper_32_bits(i915_vma_offset(vma));

drivers/gpu/drm/i915/gt/selftest_execlists.c

2751

u64 offset = i915_vma_offset((*prev)->batch);

drivers/gpu/drm/i915/gt/selftest_execlists.c

2776

i915_vma_offset(vma),

drivers/gpu/drm/i915/gt/selftest_execlists.c

3103

addr = i915_vma_offset(result) + offset + i * sizeof(*cs);

drivers/gpu/drm/i915/gt/selftest_execlists.c

3113

*cs++ = lower_32_bits(i915_vma_offset(result));

drivers/gpu/drm/i915/gt/selftest_execlists.c

3114

*cs++ = upper_32_bits(i915_vma_offset(result));

drivers/gpu/drm/i915/gt/selftest_execlists.c

3192

i915_vma_offset(batch),

drivers/gpu/drm/i915/gt/selftest_execlists.c

3523

i915_vma_offset(vma),

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

184

*batch++ = lower_32_bits(i915_vma_offset(vma));

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

185

*batch++ = upper_32_bits(i915_vma_offset(vma));

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

198

*batch++ = lower_32_bits(i915_vma_offset(vma));

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

211

*batch++ = lower_32_bits(i915_vma_offset(vma));

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

223

*batch++ = lower_32_bits(i915_vma_offset(vma));

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

238

err = rq->engine->emit_bb_start(rq, i915_vma_offset(vma), PAGE_SIZE, flags);

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

99

return i915_vma_offset(hws) +

drivers/gpu/drm/i915/gt/selftest_lrc.c

1040

*cs++ = lower_32_bits(i915_vma_offset(scratch) + x);

drivers/gpu/drm/i915/gt/selftest_lrc.c

1041

*cs++ = upper_32_bits(i915_vma_offset(scratch) + x);

drivers/gpu/drm/i915/gt/selftest_lrc.c

1108

*cs++ = lower_32_bits(i915_vma_offset(b_before));

drivers/gpu/drm/i915/gt/selftest_lrc.c

1109

*cs++ = upper_32_bits(i915_vma_offset(b_before));

drivers/gpu/drm/i915/gt/selftest_lrc.c

1124

*cs++ = lower_32_bits(i915_vma_offset(b_after));

drivers/gpu/drm/i915/gt/selftest_lrc.c

1125

*cs++ = upper_32_bits(i915_vma_offset(b_after));

drivers/gpu/drm/i915/gt/selftest_lrc.c

1246

*cs++ = lower_32_bits(i915_vma_offset(batch));

drivers/gpu/drm/i915/gt/selftest_lrc.c

1247

*cs++ = upper_32_bits(i915_vma_offset(batch));

drivers/gpu/drm/i915/gt/selftest_ring_submission.c

54

*cs++ = i915_vma_offset(vma) + 4000;

drivers/gpu/drm/i915/gt/selftest_rps.c

126

*cs++ = lower_32_bits(i915_vma_offset(vma) + end * sizeof(*cs));

drivers/gpu/drm/i915/gt/selftest_rps.c

127

*cs++ = upper_32_bits(i915_vma_offset(vma) + end * sizeof(*cs));

drivers/gpu/drm/i915/gt/selftest_rps.c

132

*cs++ = lower_32_bits(i915_vma_offset(vma) + loop * sizeof(*cs));

drivers/gpu/drm/i915/gt/selftest_rps.c

133

*cs++ = upper_32_bits(i915_vma_offset(vma) + loop * sizeof(*cs));

drivers/gpu/drm/i915/gt/selftest_rps.c

664

i915_vma_offset(vma),

drivers/gpu/drm/i915/gt/selftest_rps.c

803

i915_vma_offset(vma),

drivers/gpu/drm/i915/gt/selftest_tlb.c

119

*cs++ = lower_32_bits(i915_vma_offset(vma));

drivers/gpu/drm/i915/gt/selftest_tlb.c

120

*cs++ = upper_32_bits(i915_vma_offset(vma));

drivers/gpu/drm/i915/gt/selftest_tlb.c

130

err = rq->engine->emit_bb_start(rq, i915_vma_offset(vma), 0, 0);

drivers/gpu/drm/i915/gt/selftest_tlb.c

160

.start = i915_vma_offset(vb),

drivers/gpu/drm/i915/gt/selftest_tlb.c

25

GEM_BUG_ON(addr < i915_vma_offset(vma));

drivers/gpu/drm/i915/gt/selftest_tlb.c

26

GEM_BUG_ON(addr >= i915_vma_offset(vma) + i915_vma_size(vma) + sizeof(val));

drivers/gpu/drm/i915/gt/selftest_tlb.c

28

(addr - i915_vma_offset(vma)), val, 1);

drivers/gpu/drm/i915/gt/selftest_tlb.c

74

GEM_BUG_ON(i915_vma_offset(va) != addr);

drivers/gpu/drm/i915/gt/selftest_workarounds.c

522

u64 addr = i915_vma_offset(scratch);

drivers/gpu/drm/i915/gt/selftest_workarounds.c

641

i915_vma_offset(batch), PAGE_SIZE,

drivers/gpu/drm/i915/gt/selftest_workarounds.c

869

u64 offset = i915_vma_offset(results) + sizeof(u32) * i;

drivers/gpu/drm/i915/gt/selftest_workarounds.c

939

err = engine->emit_bb_start(rq, i915_vma_offset(batch), 0, 0);

drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.c

184

err = engine->emit_bb_start(rq, i915_vma_offset(pkt->bb_vma), PAGE_SIZE, 0);

drivers/gpu/drm/i915/i915_cmd_parser.c

1474

shadow_addr = gen8_canonical_addr(i915_vma_offset(shadow));

drivers/gpu/drm/i915/i915_cmd_parser.c

1475

batch_addr = gen8_canonical_addr(i915_vma_offset(batch) + batch_offset);

drivers/gpu/drm/i915/i915_debugfs.c

207

i915_vma_offset(vma), i915_vma_size(vma),

drivers/gpu/drm/i915/i915_perf.c

2355

i915_vma_offset(vma), 0,

drivers/gpu/drm/i915/i915_vma.c

608

i915_vma_offset(vma),

drivers/gpu/drm/i915/i915_vma.c

702

if (alignment && !IS_ALIGNED(i915_vma_offset(vma), alignment))

drivers/gpu/drm/i915/i915_vma.c

709

i915_vma_offset(vma) < (flags & PIN_OFFSET_MASK))

drivers/gpu/drm/i915/i915_vma.c

713

i915_vma_offset(vma) != (flags & PIN_OFFSET_MASK))

drivers/gpu/drm/i915/i915_vma.c

731

IS_ALIGNED(i915_vma_offset(vma), vma->fence_alignment));

drivers/gpu/drm/i915/i915_vma.h

177

GEM_BUG_ON(upper_32_bits(i915_vma_offset(vma)));

drivers/gpu/drm/i915/i915_vma.h

178

GEM_BUG_ON(upper_32_bits(i915_vma_offset(vma) +

drivers/gpu/drm/i915/i915_vma.h

180

return lower_32_bits(i915_vma_offset(vma));

drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c

101

pkt.addr_in = i915_vma_offset(exec_res->pkt_vma);

drivers/gpu/drm/i915/selftests/i915_request.c

1012

i915_vma_offset(batch),

drivers/gpu/drm/i915/selftests/i915_request.c

1149

*cmd++ = lower_32_bits(i915_vma_offset(vma));

drivers/gpu/drm/i915/selftests/i915_request.c

1150

*cmd++ = upper_32_bits(i915_vma_offset(vma));

drivers/gpu/drm/i915/selftests/i915_request.c

1153

*cmd++ = lower_32_bits(i915_vma_offset(vma));

drivers/gpu/drm/i915/selftests/i915_request.c

1156

*cmd++ = lower_32_bits(i915_vma_offset(vma));

drivers/gpu/drm/i915/selftests/igt_spinner.c

120

return i915_vma_offset(hws) + seqno_offset(rq->fence.context);

drivers/gpu/drm/i915/selftests/igt_spinner.c

194

*batch++ = lower_32_bits(i915_vma_offset(vma));

drivers/gpu/drm/i915/selftests/igt_spinner.c

195

*batch++ = upper_32_bits(i915_vma_offset(vma));

drivers/gpu/drm/i915/selftests/igt_spinner.c

210

err = engine->emit_bb_start(rq, i915_vma_offset(vma), PAGE_SIZE, flags);