drivers/gpu/drm/i915/gt/intel_engine_types.h

355

i915_mcr_reg_t mcr_reg;

drivers/gpu/drm/i915/gt/intel_gt_mcr.c

186

static i915_reg_t mcr_reg_cast(const i915_mcr_reg_t mcr)

drivers/gpu/drm/i915/gt/intel_gt_mcr.c

208

i915_mcr_reg_t reg, u8 rw_flag,

drivers/gpu/drm/i915/gt/intel_gt_mcr.c

285

i915_mcr_reg_t reg, u8 rw_flag,

drivers/gpu/drm/i915/gt/intel_gt_mcr.c

437

i915_mcr_reg_t reg,

drivers/gpu/drm/i915/gt/intel_gt_mcr.c

456

void intel_gt_mcr_unicast_write(struct intel_gt *gt, i915_mcr_reg_t reg, u32 value,

drivers/gpu/drm/i915/gt/intel_gt_mcr.c

473

i915_mcr_reg_t reg, u32 value)

drivers/gpu/drm/i915/gt/intel_gt_mcr.c

504

void intel_gt_mcr_multicast_write_fw(struct intel_gt *gt, i915_mcr_reg_t reg, u32 value)

drivers/gpu/drm/i915/gt/intel_gt_mcr.c

538

u32 intel_gt_mcr_multicast_rmw(struct intel_gt *gt, i915_mcr_reg_t reg,

drivers/gpu/drm/i915/gt/intel_gt_mcr.c

563

i915_mcr_reg_t reg,

drivers/gpu/drm/i915/gt/intel_gt_mcr.c

663

i915_mcr_reg_t reg,

drivers/gpu/drm/i915/gt/intel_gt_mcr.c

694

u32 intel_gt_mcr_read_any_fw(struct intel_gt *gt, i915_mcr_reg_t reg)

drivers/gpu/drm/i915/gt/intel_gt_mcr.c

725

u32 intel_gt_mcr_read_any(struct intel_gt *gt, i915_mcr_reg_t reg)

drivers/gpu/drm/i915/gt/intel_gt_mcr.c

845

i915_mcr_reg_t reg,

drivers/gpu/drm/i915/gt/intel_gt_mcr.h

17

i915_mcr_reg_t reg,

drivers/gpu/drm/i915/gt/intel_gt_mcr.h

19

u32 intel_gt_mcr_read_any_fw(struct intel_gt *gt, i915_mcr_reg_t reg);

drivers/gpu/drm/i915/gt/intel_gt_mcr.h

20

u32 intel_gt_mcr_read_any(struct intel_gt *gt, i915_mcr_reg_t reg);

drivers/gpu/drm/i915/gt/intel_gt_mcr.h

23

i915_mcr_reg_t reg, u32 value,

drivers/gpu/drm/i915/gt/intel_gt_mcr.h

26

i915_mcr_reg_t reg, u32 value);

drivers/gpu/drm/i915/gt/intel_gt_mcr.h

28

i915_mcr_reg_t reg, u32 value);

drivers/gpu/drm/i915/gt/intel_gt_mcr.h

30

u32 intel_gt_mcr_multicast_rmw(struct intel_gt *gt, i915_mcr_reg_t reg,

drivers/gpu/drm/i915/gt/intel_gt_mcr.h

34

i915_mcr_reg_t reg,

drivers/gpu/drm/i915/gt/intel_gt_mcr.h

44

i915_mcr_reg_t reg,

drivers/gpu/drm/i915/gt/intel_workarounds.c

1878

whitelist_mcr_reg_ext(struct i915_wa_list *wal, i915_mcr_reg_t reg, u32 flags)

drivers/gpu/drm/i915/gt/intel_workarounds.c

1902

whitelist_mcr_reg(struct i915_wa_list *wal, i915_mcr_reg_t reg)

drivers/gpu/drm/i915/gt/intel_workarounds.c

230

static void wa_mcr_add(struct i915_wa_list *wal, i915_mcr_reg_t reg,

drivers/gpu/drm/i915/gt/intel_workarounds.c

252

wa_mcr_write_clr_set(struct i915_wa_list *wal, i915_mcr_reg_t reg, u32 clear, u32 set)

drivers/gpu/drm/i915/gt/intel_workarounds.c

270

wa_mcr_write_or(struct i915_wa_list *wal, i915_mcr_reg_t reg, u32 set)

drivers/gpu/drm/i915/gt/intel_workarounds.c

282

wa_mcr_write_clr(struct i915_wa_list *wal, i915_mcr_reg_t reg, u32 clr)

drivers/gpu/drm/i915/gt/intel_workarounds.c

305

wa_mcr_masked_en(struct i915_wa_list *wal, i915_mcr_reg_t reg, u32 val)

drivers/gpu/drm/i915/gt/intel_workarounds.c

317

wa_mcr_masked_dis(struct i915_wa_list *wal, i915_mcr_reg_t reg, u32 val)

drivers/gpu/drm/i915/gt/intel_workarounds.c

330

wa_mcr_masked_field_set(struct i915_wa_list *wal, i915_mcr_reg_t reg,

drivers/gpu/drm/i915/gt/intel_workarounds_types.h

18

i915_mcr_reg_t mcr_reg;

drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c

351

i915_mcr_reg_t reg, u32 flags)

drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c

250

i915_mcr_reg_t reg;

drivers/gpu/drm/i915/i915_reg_defs.h

197

#define MCR_REG(offset) ((const i915_mcr_reg_t){ .reg = (offset) })

drivers/gpu/drm/i915/i915_reg_defs.h

207

_Generic((r), i915_reg_t: (r).reg, i915_mcr_reg_t: (r).reg)