drivers/gpu/drm/i915/display/intel_dsb_buffer.c

20

return i915_ggtt_offset(dsb_buf->vma);

drivers/gpu/drm/i915/display/intel_fb_pin.c

325

plane_state->surf = i915_ggtt_offset(plane_state->ggtt_vma) +

drivers/gpu/drm/i915/display/intel_fbdev.c

348

i915_ggtt_offset(vma));

drivers/gpu/drm/i915/display/intel_fbdev_fb.c

80

(unsigned long)(ggtt->gmadr.start + i915_ggtt_offset(vma));

drivers/gpu/drm/i915/display/intel_overlay.c

1381

overlay->flip_addr = i915_ggtt_offset(vma);

drivers/gpu/drm/i915/display/intel_overlay.c

856

iowrite32(i915_ggtt_offset(vma) + params->offset_Y, &regs->OBUF_0Y);

drivers/gpu/drm/i915/display/intel_overlay.c

873

iowrite32(i915_ggtt_offset(vma) + params->offset_U,

drivers/gpu/drm/i915/display/intel_overlay.c

875

iowrite32(i915_ggtt_offset(vma) + params->offset_V,

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

1311

cache->node.start = i915_ggtt_offset(vma);

drivers/gpu/drm/i915/gem/i915_gem_mman.c

333

*pfn = (gmadr_start + i915_ggtt_offset(vma)) >> PAGE_SHIFT;

drivers/gpu/drm/i915/gem/i915_gem_tiling.c

175

if (!IS_ALIGNED(i915_ggtt_offset(vma), alignment))

drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c

224

*cs++ = lower_32_bits(i915_ggtt_offset(vma) + offset);

drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c

225

*cs++ = upper_32_bits(i915_ggtt_offset(vma) + offset);

drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c

230

*cs++ = i915_ggtt_offset(vma) + offset;

drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c

234

*cs++ = i915_ggtt_offset(vma) + offset;

drivers/gpu/drm/i915/gt/gen8_engine_cs.c

420

return (i915_ggtt_offset(engine->status_page.vma) +

drivers/gpu/drm/i915/gt/gen8_engine_cs.c

750

return i915_ggtt_offset(rq->context->state) +

drivers/gpu/drm/i915/gt/intel_context.c

279

i915_ggtt_offset(ce->ring->vma),

drivers/gpu/drm/i915/gt/intel_context_sseu.c

27

offset = i915_ggtt_offset(ce->state) +

drivers/gpu/drm/i915/gt/intel_engine_cs.c

2022

i915_ggtt_offset(rq->ring->vma),

drivers/gpu/drm/i915/gt/intel_engine_cs.c

2292

i915_ggtt_offset(rq->ring->vma));

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

1980

i915_ggtt_offset(rq->ring->vma),

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

2946

i915_ggtt_offset(engine->status_page.vma));

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

227

fence->start = i915_ggtt_offset(vma);

drivers/gpu/drm/i915/gt/intel_gt.h

158

return i915_ggtt_offset(gt->scratch) + field;

drivers/gpu/drm/i915/gt/intel_lrc.c

1046

return i915_ggtt_offset(ce->state) + context_wa_bb_offset(ce);

drivers/gpu/drm/i915/gt/intel_lrc.c

1268

*cs++ = i915_ggtt_offset(ce->state) + LRC_STATE_OFFSET +

drivers/gpu/drm/i915/gt/intel_lrc.c

1296

*cs++ = i915_ggtt_offset(ce->state) + LRC_STATE_OFFSET +

drivers/gpu/drm/i915/gt/intel_lrc.c

1312

*cs++ = i915_ggtt_offset(ce->state) + LRC_STATE_OFFSET +

drivers/gpu/drm/i915/gt/intel_lrc.c

1534

return i915_ggtt_offset(ce->state) | desc;

drivers/gpu/drm/i915/gt/intel_lrc.c

1547

regs[CTX_RING_START] = i915_ggtt_offset(ring->vma);

drivers/gpu/drm/i915/gt/intel_lrc.c

1591

if (regs[CTX_RING_START] != i915_ggtt_offset(ring->vma)) {

drivers/gpu/drm/i915/gt/intel_lrc.c

1595

i915_ggtt_offset(ring->vma));

drivers/gpu/drm/i915/gt/intel_lrc.c

1596

regs[CTX_RING_START] = i915_ggtt_offset(ring->vma);

drivers/gpu/drm/i915/gt/intel_lrc.c

874

const u32 ggtt_offset = i915_ggtt_offset(wa_ctx->vma);

drivers/gpu/drm/i915/gt/intel_lrc.c

883

i915_ggtt_offset(wa_ctx->vma) +

drivers/gpu/drm/i915/gt/intel_renderstate.c

91

so->batch_offset = i915_ggtt_offset(so->vma);

drivers/gpu/drm/i915/gt/intel_ring_submission.c

141

set_hwsp(engine, i915_ggtt_offset(engine->status_page.vma));

drivers/gpu/drm/i915/gt/intel_ring_submission.c

226

ENGINE_WRITE_FW(engine, RING_START, i915_ggtt_offset(ring->vma));

drivers/gpu/drm/i915/gt/intel_ring_submission.c

300

i915_ggtt_offset(ring->vma));

drivers/gpu/drm/i915/gt/intel_ring_submission.c

797

*cs++ = i915_ggtt_offset(engine->kernel_context->state) |

drivers/gpu/drm/i915/gt/intel_ring_submission.c

804

*cs++ = i915_ggtt_offset(ce->state) | flags;

drivers/gpu/drm/i915/gt/intel_timeline.c

210

i915_ggtt_offset(tl->hwsp_ggtt) +

drivers/gpu/drm/i915/gt/intel_timeline.c

318

tl->hwsp_offset = i915_ggtt_offset(tl->hwsp_ggtt) + next_ofs;

drivers/gpu/drm/i915/gt/intel_timeline.c

355

*hwsp = i915_ggtt_offset(tl->hwsp_ggtt) +

drivers/gpu/drm/i915/gt/intel_workarounds.c

3019

*cs++ = i915_ggtt_offset(vma) + sizeof(u32) * i;

drivers/gpu/drm/i915/gt/selftest_engine_pm.c

78

u32 offset = i915_ggtt_offset(engine->status_page.vma);

drivers/gpu/drm/i915/gt/selftest_execlists.c

1057

i915_ggtt_offset(ce->engine->status_page.vma) +

drivers/gpu/drm/i915/gt/selftest_execlists.c

1623

*cs++ = i915_ggtt_offset(vma);

drivers/gpu/drm/i915/gt/selftest_execlists.c

1634

*cs++ = i915_ggtt_offset(vma);

drivers/gpu/drm/i915/gt/selftest_execlists.c

1673

*cs++ = i915_ggtt_offset(vma);

drivers/gpu/drm/i915/gt/selftest_execlists.c

3232

*cs++ = i915_ggtt_offset(global);

drivers/gpu/drm/i915/gt/selftest_execlists.c

4247

*cs++ = i915_ggtt_offset(scratch) + n * sizeof(u32);

drivers/gpu/drm/i915/gt/selftest_execlists.c

838

*cs++ = i915_ggtt_offset(vma) + 4 * idx;

drivers/gpu/drm/i915/gt/selftest_execlists.c

843

*cs++ = i915_ggtt_offset(vma) + 4 * (idx - 1);

drivers/gpu/drm/i915/gt/selftest_execlists.c

912

*cs++ = i915_ggtt_offset(vma) + 4 * (idx - 1);

drivers/gpu/drm/i915/gt/selftest_lrc.c

1117

*cs++ = i915_ggtt_offset(ce->engine->status_page.vma) +

drivers/gpu/drm/i915/gt/selftest_lrc.c

1250

*cs++ = i915_ggtt_offset(ce->engine->status_page.vma) +

drivers/gpu/drm/i915/gt/selftest_lrc.c

1598

*cs++ = i915_ggtt_offset(ce->state) +

drivers/gpu/drm/i915/gt/selftest_lrc.c

446

*cs++ = i915_ggtt_offset(scratch) + RING_START_IDX * sizeof(u32);

drivers/gpu/drm/i915/gt/selftest_lrc.c

449

expected[RING_START_IDX] = i915_ggtt_offset(ce->ring->vma);

drivers/gpu/drm/i915/gt/selftest_lrc.c

453

*cs++ = i915_ggtt_offset(scratch) + RING_TAIL_IDX * sizeof(u32);

drivers/gpu/drm/i915/gt/selftest_lrc.c

568

i915_ggtt_offset(ce->engine->status_page.vma) +

drivers/gpu/drm/i915/gt/selftest_lrc.c

599

*cs++ = i915_ggtt_offset(scratch) + n * sizeof(u32);

drivers/gpu/drm/i915/gt/selftest_lrc.c

741

i915_ggtt_offset(ce->engine->status_page.vma) +

drivers/gpu/drm/i915/gt/selftest_lrc.c

82

i915_ggtt_offset(ce->engine->status_page.vma) +

drivers/gpu/drm/i915/gt/selftest_mocs.c

235

offset = i915_ggtt_offset(vma);

drivers/gpu/drm/i915/gt/selftest_mocs.c

240

offset -= i915_ggtt_offset(vma);

drivers/gpu/drm/i915/gt/selftest_timeline.c

850

w->addr = i915_ggtt_offset(vma);

drivers/gpu/drm/i915/gt/selftest_timeline.c

885

w->addr = i915_ggtt_offset(w->vma);

drivers/gpu/drm/i915/gt/selftest_timeline.c

899

GEM_BUG_ON(w->addr - i915_ggtt_offset(w->vma) > w->vma->size);

drivers/gpu/drm/i915/gt/selftest_timeline.c

912

end = (w->addr - i915_ggtt_offset(w->vma)) / sizeof(*w->map);

drivers/gpu/drm/i915/gt/selftest_workarounds.c

158

*cs++ = i915_ggtt_offset(vma) + sizeof(u32) * i;

drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c

265

u32 offset = i915_ggtt_offset(gsc->local);

drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c

406

offset = i915_ggtt_offset(vma);

drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c

129

u64 addr_in = i915_ggtt_offset(gsc->proxy.vma);

drivers/gpu/drm/i915/gt/uc/intel_guc.h

419

u32 offset = i915_ggtt_offset(vma);

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

2831

desc->process_desc = i915_ggtt_offset(ce->state) +

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

2833

desc->wq_addr = i915_ggtt_offset(ce->state) +

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

2904

wq_desc_offset = (u64)i915_ggtt_offset(ce->state) +

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

2906

wq_base_offset = (u64)i915_ggtt_offset(ce->state) +

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

3005

if (i915_ggtt_offset(ce->state) !=

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

4410

i915_ggtt_offset(engine->status_page.vma));

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

5617

return i915_ggtt_offset(ce->state) +

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

5627

return i915_ggtt_offset(ce->state) +

drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c

42

pkt_offset = i915_ggtt_offset(huc->heci_pkt);

drivers/gpu/drm/i915/gvt/cmd_parser.c

3185

gma_start = i915_ggtt_offset(ce->state) + LRC_STATE_PN*PAGE_SIZE;

drivers/gpu/drm/i915/gvt/scheduler.c

578

bb->bb_start_cmd_va[1] = i915_ggtt_offset(bb->vma);

drivers/gpu/drm/i915/gvt/scheduler.c

650

wa_ctx->indirect_ctx.shadow_gma = i915_ggtt_offset(vma);

drivers/gpu/drm/i915/i915_gem.c

332

node->start = i915_ggtt_offset(vma);

drivers/gpu/drm/i915/i915_hdcp_gsc.c

194

addr_in = i915_ggtt_offset(gsc_context->vma);

drivers/gpu/drm/i915/i915_initial_plane.c

210

i915_ggtt_offset(vma), plane_config->base);

drivers/gpu/drm/i915/i915_initial_plane.c

271

plane_state->surf = i915_ggtt_offset(plane_state->ggtt_vma);

drivers/gpu/drm/i915/i915_perf.c

1046

u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma);

drivers/gpu/drm/i915/i915_perf.c

1385

i915_ggtt_offset(scratch));

drivers/gpu/drm/i915/i915_perf.c

1557

stream->specific_ctx_id = i915_ggtt_offset(ce->state);

drivers/gpu/drm/i915/i915_perf.c

1703

u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma);

drivers/gpu/drm/i915/i915_perf.c

1748

u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma);

drivers/gpu/drm/i915/i915_perf.c

1801

u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma);

drivers/gpu/drm/i915/i915_perf.c

1929

*cs++ = i915_ggtt_offset(stream->noa_wait) + offset + 4 * d;

drivers/gpu/drm/i915/i915_perf.c

2077

*cs++ = i915_ggtt_offset(vma) + (ts0 - batch) * 4;

drivers/gpu/drm/i915/i915_perf.c

2120

*cs++ = i915_ggtt_offset(vma) + (jump - batch) * 4;

drivers/gpu/drm/i915/i915_perf.c

2245

*cs++ = i915_ggtt_offset(stream->noa_wait);

drivers/gpu/drm/i915/i915_perf.c

2494

offset = i915_ggtt_offset(ce->state) + LRC_STATE_OFFSET;

drivers/gpu/drm/i915/i915_perf.c

545

u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma);

drivers/gpu/drm/i915/i915_perf.c

736

u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma);

drivers/gpu/drm/i915/i915_request.c

2242

return ring == i915_ggtt_offset(rq->ring->vma);

drivers/gpu/drm/i915/i915_vma.c

733

mappable = i915_ggtt_offset(vma) + vma->fence_size <=

drivers/gpu/drm/i915/selftests/i915_perf.c

245

i915_ggtt_offset(stream->noa_wait), 0,

drivers/gpu/drm/i915/selftests/i915_perf.c

352

i915_ggtt_offset(stream->noa_wait), 0,

drivers/gpu/drm/i915/selftests/i915_perf.c

378

*cs++ = i915_ggtt_offset(rq->engine->status_page.vma) +

drivers/gpu/drm/i915/selftests/i915_request.c

2010

return (i915_ggtt_offset(ce->engine->status_page.vma) +

drivers/gpu/drm/i915/selftests/i915_request.c

2240

i915_ggtt_offset(engine->status_page.vma) +

drivers/gpu/drm/xe/display/xe_fb_pin.c

413

new_plane_state->surf = i915_ggtt_offset(new_plane_state->ggtt_vma) +

drivers/gpu/drm/xe/display/xe_fb_pin.c

443

new_plane_state->surf = i915_ggtt_offset(new_plane_state->ggtt_vma) +

drivers/gpu/drm/xe/display/xe_initial_plane.c

173

plane_state->surf = i915_ggtt_offset(plane_state->ggtt_vma);