i810_writel
i810_writel(mmio, chan->ddc_base, SCL_DIR_MASK | SCL_VAL_MASK);
i810_writel(mmio, chan->ddc_base, SCL_DIR | SCL_DIR_MASK | SCL_VAL_MASK);
i810_writel(mmio, chan->ddc_base, SDA_DIR_MASK | SDA_VAL_MASK);
i810_writel(mmio, chan->ddc_base, SDA_DIR | SDA_DIR_MASK | SDA_VAL_MASK);
i810_writel(mmio, chan->ddc_base, SCL_DIR_MASK);
i810_writel(mmio, chan->ddc_base, 0);
i810_writel(mmio, chan->ddc_base, SDA_DIR_MASK);
i810_writel(mmio, chan->ddc_base, 0);
i810_writel(IRING, mmio, par->cur_tail);
i810_writel(par->cur_tail, par->iring.virtual, n); \
i810_writel(IRING + 12, mmio, tmp);
i810_writel(DPLYBASE, mmio, par->fb.physical + offset);
i810_writel(IRING, mmio, 0);
i810_writel(IRING + 4, mmio, 0);
i810_writel(IRING + 8, mmio, tmp2 | tmp1);
i810_writel(IRING + 12, mmio, tmp1 | tmp2);
i810_writel(HVSYNC, mmio, mode);
i810_writel(PWR_CLKC, mmio, pwr);
i810_writel(CURPOS, mmio, tmp);
i810_writel(HVSYNC, mmio, 0);
i810_writel(PWR_CLKC, mmio, 3);
i810_writel(DCLK_2D, mmio, tmp1 | tmp2);
i810_writel(DCLK_0DS, mmio, (tmp1 << 16) | tmp2);
i810_writel(FW_BLC, mmio, par->watermark);
i810_writel(PIXCONF, mmio, tmp);
i810_writel(OVRACT, mmio, par->ovract);
i810_writel(MEM_MODE, mmio, i810_readl(MEM_MODE, mmio) | 4);
i810_writel(PIXCONF, mmio, reg1);
i810_writel(DCLK_2D, mmio, tmp1 | tmp2);
i810_writel(DCLK_1D, mmio, tmp1 | tmp2);
i810_writel(DCLK_0DS, mmio, par->hw_state.dclk_0ds);
i810_writel(PIXCONF, mmio, tmp1 | tmp2);
i810_writel(PIXCONF, mmio, par->hw_state.pixconf);
i810_writel(FW_BLC, mmio, tmp_long);
i810_writel(HWS_PGA, mmio, par->hw_state.hws_pga);
i810_writel(DPLYSTAS, mmio, par->hw_state.dplystas);
i810_writel(PIXCONF, mmio, temp);
i810_writel(CURBASE, mmio, par->cursor_heap.physical);