i810_readl
i810_readl(mmio, chan->ddc_base); /* flush posted write */
i810_readl(mmio, chan->ddc_base); /* flush posted write */
return ((i810_readl(mmio, chan->ddc_base) & SCL_VAL_IN) != 0);
return ((i810_readl(mmio, chan->ddc_base) & SDA_VAL_IN) != 0);
printk("INSTDONE: 0x%04x\n", i810_readl(INSTDONE, mmio));
tmp = i810_readl(IRING + 12, mmio);
tmp2 = i810_readl(IRING + 8, mmio) & ~RBUFFER_START_MASK;
i810_readl(PGTBL_ER, mmio),
tmp1 = i810_readl(IRING + 12, mmio);
i810_readl(IPEIR, mmio),
i810_readl(IPEHR, mmio));
head = i810_readl(IRING + 4, mmio) & RBUFFER_HEAD_MASK;
pwr = i810_readl(PWR_CLKC, mmio);
if ((i810_readl(CURBASE, mmio) & 0xf) != par->cursor_heap.physical) {
tmp2 = i810_readl(DCLK_2D, mmio);
tmp2 = i810_readl(DCLK_0DS, mmio);
tmp = i810_readl(PIXCONF, mmio);
i810_writel(MEM_MODE, mmio, i810_readl(MEM_MODE, mmio) | 4);
reg1 = i810_readl(PIXCONF, mmio) & ~(0xF0000 | 1 << 27);
tmp2 = i810_readl(DCLK_2D, mmio);
tmp2 = i810_readl(DCLK_1D, mmio);
tmp2 = i810_readl(PIXCONF, mmio);
tmp_long = i810_readl(FW_BLC, mmio);
par->hw_state.dclk_2d = i810_readl(DCLK_2D, mmio);
par->hw_state.dclk_1d = i810_readl(DCLK_1D, mmio);
par->hw_state.dclk_0ds = i810_readl(DCLK_0DS, mmio);
par->hw_state.pixconf = i810_readl(PIXCONF, mmio);
par->hw_state.fw_blc = i810_readl(FW_BLC, mmio);
par->hw_state.hws_pga = i810_readl(HWS_PGA, mmio);
par->hw_state.dplystas = i810_readl(DPLYSTAS, mmio);
temp = i810_readl(PIXCONF, mmio);