Symbol: hpd_pin
drivers/gpu/drm/bridge/tc358767.c
1775
conn = val & BIT(tc->hpd_pin);
drivers/gpu/drm/bridge/tc358767.c
1788
if (tc->hpd_pin >= 0)
drivers/gpu/drm/bridge/tc358767.c
1851
if (tc->hpd_pin >= 0) {
drivers/gpu/drm/bridge/tc358767.c
2248
if (tc->hpd_pin >= 0 && tc->bridge.dev && tc->aux.drm_dev) {
drivers/gpu/drm/bridge/tc358767.c
2255
bool h = val & INT_GPIO_H(tc->hpd_pin);
drivers/gpu/drm/bridge/tc358767.c
2256
bool lc = val & INT_GPIO_LC(tc->hpd_pin);
drivers/gpu/drm/bridge/tc358767.c
2259
dev_dbg(tc->dev, "GPIO%d: %s %s\n", tc->hpd_pin,
drivers/gpu/drm/bridge/tc358767.c
2371
if (tc->hpd_pin >= 0)
drivers/gpu/drm/bridge/tc358767.c
2513
&tc->hpd_pin);
drivers/gpu/drm/bridge/tc358767.c
2515
tc->hpd_pin = -ENODEV;
drivers/gpu/drm/bridge/tc358767.c
2517
if (tc->hpd_pin < 0 || tc->hpd_pin > 1) {
drivers/gpu/drm/bridge/tc358767.c
2568
if (tc->hpd_pin >= 0) {
drivers/gpu/drm/bridge/tc358767.c
2569
u32 lcnt_reg = tc->hpd_pin == 0 ? INT_GP0_LCNT : INT_GP1_LCNT;
drivers/gpu/drm/bridge/tc358767.c
2570
u32 h_lc = INT_GPIO_H(tc->hpd_pin) | INT_GPIO_LC(tc->hpd_pin);
drivers/gpu/drm/bridge/tc358767.c
2576
regmap_write(tc->regmap, GPIOM, BIT(tc->hpd_pin));
drivers/gpu/drm/bridge/tc358767.c
399
int hpd_pin;
drivers/gpu/drm/i915/display/g4x_dp.c
1189
u32 bit = display->hotplug.pch_hpd[encoder->hpd_pin];
drivers/gpu/drm/i915/display/g4x_dp.c
1199
switch (encoder->hpd_pin) {
drivers/gpu/drm/i915/display/g4x_dp.c
1210
MISSING_CASE(encoder->hpd_pin);
drivers/gpu/drm/i915/display/g4x_dp.c
1220
u32 bit = display->hotplug.hpd[encoder->hpd_pin];
drivers/gpu/drm/i915/display/g4x_dp.c
1396
intel_encoder->hpd_pin = intel_hpd_pin_default(port);
drivers/gpu/drm/i915/display/g4x_hdmi.c
752
intel_encoder->hpd_pin = intel_hpd_pin_default(port);
drivers/gpu/drm/i915/display/intel_crt.c
1082
crt->base.hpd_pin = HPD_CRT;
drivers/gpu/drm/i915/display/intel_ddi.c
4888
u32 bit = display->hotplug.pch_hpd[encoder->hpd_pin];
drivers/gpu/drm/i915/display/intel_ddi.c
4896
u32 bit = display->hotplug.hpd[encoder->hpd_pin];
drivers/gpu/drm/i915/display/intel_ddi.c
4904
u32 bit = display->hotplug.hpd[encoder->hpd_pin];
drivers/gpu/drm/i915/display/intel_ddi.c
4985
static enum hpd_pin xelpd_hpd_pin(struct intel_display *display, enum port port)
drivers/gpu/drm/i915/display/intel_ddi.c
4995
static enum hpd_pin dg1_hpd_pin(struct intel_display *display, enum port port)
drivers/gpu/drm/i915/display/intel_ddi.c
5003
static enum hpd_pin tgl_hpd_pin(struct intel_display *display, enum port port)
drivers/gpu/drm/i915/display/intel_ddi.c
5011
static enum hpd_pin rkl_hpd_pin(struct intel_display *display, enum port port)
drivers/gpu/drm/i915/display/intel_ddi.c
5022
static enum hpd_pin icl_hpd_pin(struct intel_display *display, enum port port)
drivers/gpu/drm/i915/display/intel_ddi.c
5030
static enum hpd_pin ehl_hpd_pin(struct intel_display *display, enum port port)
drivers/gpu/drm/i915/display/intel_ddi.c
5041
static enum hpd_pin skl_hpd_pin(struct intel_display *display, enum port port)
drivers/gpu/drm/i915/display/intel_ddi.c
5400
encoder->hpd_pin = xelpd_hpd_pin(display, port);
drivers/gpu/drm/i915/display/intel_ddi.c
5402
encoder->hpd_pin = dg1_hpd_pin(display, port);
drivers/gpu/drm/i915/display/intel_ddi.c
5404
encoder->hpd_pin = rkl_hpd_pin(display, port);
drivers/gpu/drm/i915/display/intel_ddi.c
5406
encoder->hpd_pin = tgl_hpd_pin(display, port);
drivers/gpu/drm/i915/display/intel_ddi.c
5408
encoder->hpd_pin = ehl_hpd_pin(display, port);
drivers/gpu/drm/i915/display/intel_ddi.c
5410
encoder->hpd_pin = icl_hpd_pin(display, port);
drivers/gpu/drm/i915/display/intel_ddi.c
5412
encoder->hpd_pin = skl_hpd_pin(display, port);
drivers/gpu/drm/i915/display/intel_ddi.c
5414
encoder->hpd_pin = intel_hpd_pin_default(port);
drivers/gpu/drm/i915/display/intel_display_regs.h
1445
#define _HPD_PIN_DDI(hpd_pin) ((hpd_pin) - HPD_PORT_A)
drivers/gpu/drm/i915/display/intel_display_regs.h
1446
#define _HPD_PIN_TC(hpd_pin) ((hpd_pin) - HPD_PORT_TC1)
drivers/gpu/drm/i915/display/intel_display_regs.h
1461
#define GEN8_DE_PORT_HOTPLUG(hpd_pin) REG_BIT(3 + _HPD_PIN_DDI(hpd_pin))
drivers/gpu/drm/i915/display/intel_display_regs.h
1552
#define GEN11_TC_HOTPLUG(hpd_pin) REG_BIT(16 + _HPD_PIN_TC(hpd_pin))
drivers/gpu/drm/i915/display/intel_display_regs.h
1559
#define GEN11_TBT_HOTPLUG(hpd_pin) REG_BIT(_HPD_PIN_TC(hpd_pin))
drivers/gpu/drm/i915/display/intel_display_regs.h
1573
#define GEN11_HOTPLUG_CTL_ENABLE(hpd_pin) (8 << (_HPD_PIN_TC(hpd_pin) * 4))
drivers/gpu/drm/i915/display/intel_display_regs.h
1574
#define GEN11_HOTPLUG_CTL_LONG_DETECT(hpd_pin) (2 << (_HPD_PIN_TC(hpd_pin) * 4))
drivers/gpu/drm/i915/display/intel_display_regs.h
1575
#define GEN11_HOTPLUG_CTL_SHORT_DETECT(hpd_pin) (1 << (_HPD_PIN_TC(hpd_pin) * 4))
drivers/gpu/drm/i915/display/intel_display_regs.h
1576
#define GEN11_HOTPLUG_CTL_NO_DETECT(hpd_pin) (0 << (_HPD_PIN_TC(hpd_pin) * 4))
drivers/gpu/drm/i915/display/intel_display_regs.h
1582
#define XELPDP_DP_ALT_HOTPLUG(hpd_pin) REG_BIT(16 + _HPD_PIN_TC(hpd_pin))
drivers/gpu/drm/i915/display/intel_display_regs.h
1584
#define XELPDP_AUX_TC(hpd_pin) REG_BIT(8 + _HPD_PIN_TC(hpd_pin))
drivers/gpu/drm/i915/display/intel_display_regs.h
1586
#define XE2LPD_AUX_DDI(hpd_pin) REG_BIT(6 + _HPD_PIN_DDI(hpd_pin))
drivers/gpu/drm/i915/display/intel_display_regs.h
1588
#define XELPDP_TBT_HOTPLUG(hpd_pin) REG_BIT(_HPD_PIN_TC(hpd_pin))
drivers/gpu/drm/i915/display/intel_display_regs.h
1595
#define XELPDP_PORT_HOTPLUG_CTL(hpd_pin) _MMIO(0x16F270 + (_HPD_PIN_TC(hpd_pin) * 0x200))
drivers/gpu/drm/i915/display/intel_display_regs.h
1888
#define SDE_TC_HOTPLUG_ICP(hpd_pin) REG_BIT(24 + _HPD_PIN_TC(hpd_pin))
drivers/gpu/drm/i915/display/intel_display_regs.h
1889
#define SDE_TC_HOTPLUG_DG2(hpd_pin) REG_BIT(25 + _HPD_PIN_TC(hpd_pin)) /* sigh */
drivers/gpu/drm/i915/display/intel_display_regs.h
1890
#define SDE_DDI_HOTPLUG_ICP(hpd_pin) REG_BIT(16 + _HPD_PIN_DDI(hpd_pin))
drivers/gpu/drm/i915/display/intel_display_regs.h
1973
#define SHOTPLUG_CTL_DDI_HPD_ENABLE(hpd_pin) (0x8 << (_HPD_PIN_DDI(hpd_pin) * 4))
drivers/gpu/drm/i915/display/intel_display_regs.h
1974
#define SHOTPLUG_CTL_DDI_HPD_OUTPUT_DATA(hpd_pin) (0x4 << (_HPD_PIN_DDI(hpd_pin) * 4))
drivers/gpu/drm/i915/display/intel_display_regs.h
1975
#define SHOTPLUG_CTL_DDI_HPD_STATUS_MASK(hpd_pin) (0x3 << (_HPD_PIN_DDI(hpd_pin) * 4))
drivers/gpu/drm/i915/display/intel_display_regs.h
1976
#define SHOTPLUG_CTL_DDI_HPD_NO_DETECT(hpd_pin) (0x0 << (_HPD_PIN_DDI(hpd_pin) * 4))
drivers/gpu/drm/i915/display/intel_display_regs.h
1977
#define SHOTPLUG_CTL_DDI_HPD_SHORT_DETECT(hpd_pin) (0x1 << (_HPD_PIN_DDI(hpd_pin) * 4))
drivers/gpu/drm/i915/display/intel_display_regs.h
1978
#define SHOTPLUG_CTL_DDI_HPD_LONG_DETECT(hpd_pin) (0x2 << (_HPD_PIN_DDI(hpd_pin) * 4))
drivers/gpu/drm/i915/display/intel_display_regs.h
1979
#define SHOTPLUG_CTL_DDI_HPD_SHORT_LONG_DETECT(hpd_pin) (0x3 << (_HPD_PIN_DDI(hpd_pin) * 4))
drivers/gpu/drm/i915/display/intel_display_regs.h
1982
#define ICP_TC_HPD_ENABLE(hpd_pin) (8 << (_HPD_PIN_TC(hpd_pin) * 4))
drivers/gpu/drm/i915/display/intel_display_regs.h
1983
#define ICP_TC_HPD_LONG_DETECT(hpd_pin) (2 << (_HPD_PIN_TC(hpd_pin) * 4))
drivers/gpu/drm/i915/display/intel_display_regs.h
1984
#define ICP_TC_HPD_SHORT_DETECT(hpd_pin) (1 << (_HPD_PIN_TC(hpd_pin) * 4))
drivers/gpu/drm/i915/display/intel_display_types.h
295
enum hpd_pin hpd_pin;
drivers/gpu/drm/i915/display/intel_dp.c
7012
unsigned int hpd_pin = encoder->hpd_pin;
drivers/gpu/drm/i915/display/intel_dp.c
7016
if (hpd_high != test_bit(hpd_pin, &display->hotplug.oob_hotplug_last_state)) {
drivers/gpu/drm/i915/display/intel_dp.c
7017
display->hotplug.event_bits |= BIT(hpd_pin);
drivers/gpu/drm/i915/display/intel_dp.c
7019
__assign_bit(hpd_pin,
drivers/gpu/drm/i915/display/intel_hotplug.c
1025
static bool block_hpd_pin(struct intel_display *display, enum hpd_pin pin)
drivers/gpu/drm/i915/display/intel_hotplug.c
1036
static bool unblock_hpd_pin(struct intel_display *display, enum hpd_pin pin)
drivers/gpu/drm/i915/display/intel_hotplug.c
1080
if (encoder->hpd_pin == HPD_NONE)
drivers/gpu/drm/i915/display/intel_hotplug.c
1085
if (block_hpd_pin(display, encoder->hpd_pin))
drivers/gpu/drm/i915/display/intel_hotplug.c
109
static enum hpd_pin
drivers/gpu/drm/i915/display/intel_hotplug.c
1090
if (do_flush && hpd_pin_has_pulse(display, encoder->hpd_pin))
drivers/gpu/drm/i915/display/intel_hotplug.c
1107
if (encoder->hpd_pin == HPD_NONE)
drivers/gpu/drm/i915/display/intel_hotplug.c
1112
if (unblock_hpd_pin(display, encoder->hpd_pin))
drivers/gpu/drm/i915/display/intel_hotplug.c
1130
enum hpd_pin pin = encoder->hpd_pin;
drivers/gpu/drm/i915/display/intel_hotplug.c
120
return encoder ? encoder->hpd_pin : HPD_NONE;
drivers/gpu/drm/i915/display/intel_hotplug.c
153
enum hpd_pin pin, bool long_hpd)
drivers/gpu/drm/i915/display/intel_hotplug.c
238
enum hpd_pin pin;
drivers/gpu/drm/i915/display/intel_hotplug.c
276
enum hpd_pin pin;
drivers/gpu/drm/i915/display/intel_hotplug.c
355
static bool hpd_pin_has_pulse(struct intel_display *display, enum hpd_pin pin)
drivers/gpu/drm/i915/display/intel_hotplug.c
360
if (encoder->hpd_pin != pin)
drivers/gpu/drm/i915/display/intel_hotplug.c
370
static bool hpd_pin_is_blocked(struct intel_display *display, enum hpd_pin pin)
drivers/gpu/drm/i915/display/intel_hotplug.c
379
enum hpd_pin pin;
drivers/gpu/drm/i915/display/intel_hotplug.c
412
enum hpd_pin pin = encoder->hpd_pin;
drivers/gpu/drm/i915/display/intel_hotplug.c
458
hotplug->short_hpd_pin_mask |= BIT(encoder->hpd_pin);
drivers/gpu/drm/i915/display/intel_hotplug.c
459
if (!hpd_pin_is_blocked(display, encoder->hpd_pin))
drivers/gpu/drm/i915/display/intel_hotplug.c
507
enum hpd_pin pin;
drivers/gpu/drm/i915/display/intel_hotplug.c
595
enum hpd_pin pin;
drivers/gpu/drm/i915/display/intel_hotplug.c
611
pin = encoder->hpd_pin;
drivers/gpu/drm/i915/display/intel_hotplug.c
812
enum hpd_pin pin;
drivers/gpu/drm/i915/display/intel_hotplug.c
97
enum hpd_pin intel_hpd_pin_default(enum port port)
drivers/gpu/drm/i915/display/intel_hotplug.c
997
enum hpd_pin pin;
drivers/gpu/drm/i915/display/intel_hotplug.h
28
enum hpd_pin intel_hpd_pin_default(enum port port);
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
1012
mtp_ddi_hotplug_mask(encoder->hpd_pin),
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
1028
mtp_tc_hotplug_mask(encoder->hpd_pin),
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
1088
static bool is_xelpdp_pica_hpd_pin(enum hpd_pin hpd_pin)
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
1090
return hpd_pin >= HPD_PORT_TC1 && hpd_pin <= HPD_PORT_TC4;
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
1094
enum hpd_pin hpd_pin, bool enable)
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
1099
if (!is_xelpdp_pica_hpd_pin(hpd_pin))
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
1102
intel_de_rmw(display, XELPDP_PORT_HOTPLUG_CTL(hpd_pin),
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
1110
_xelpdp_pica_hpd_detection_setup(display, encoder->hpd_pin, true);
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
1117
enum hpd_pin pin;
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
1122
available_pins |= BIT(encoder->hpd_pin);
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
1153
static u32 spt_hotplug_mask(enum hpd_pin hpd_pin)
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
1155
switch (hpd_pin) {
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
1171
return spt_hotplug_mask(encoder->hpd_pin);
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
1174
static u32 spt_hotplug2_mask(enum hpd_pin hpd_pin)
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
1176
switch (hpd_pin) {
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
1186
return spt_hotplug2_mask(encoder->hpd_pin);
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
1219
spt_hotplug_mask(encoder->hpd_pin),
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
1223
spt_hotplug2_mask(encoder->hpd_pin),
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
1242
static u32 ilk_hotplug_mask(enum hpd_pin hpd_pin)
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
1244
switch (hpd_pin) {
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
1255
switch (encoder->hpd_pin) {
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
1281
ilk_hotplug_mask(encoder->hpd_pin),
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
1304
static u32 bxt_hotplug_mask(enum hpd_pin hpd_pin)
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
1306
switch (hpd_pin) {
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
1322
switch (encoder->hpd_pin) {
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
1355
bxt_hotplug_mask(encoder->hpd_pin),
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
1384
u32 hotplug_en = hpd_mask_i915[encoder->hpd_pin];
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
18
typedef bool (*long_pulse_detect_func)(enum hpd_pin pin, u32 val);
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
20
typedef u32 (*hotplug_mask_func)(enum hpd_pin pin);
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
215
static bool gen11_port_hotplug_long_detect(enum hpd_pin pin, u32 val)
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
230
static bool bxt_port_hotplug_long_detect(enum hpd_pin pin, u32 val)
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
244
static bool icp_ddi_port_hotplug_long_detect(enum hpd_pin pin, u32 val)
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
257
static bool icp_tc_port_hotplug_long_detect(enum hpd_pin pin, u32 val)
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
272
static bool spt_port_hotplug2_long_detect(enum hpd_pin pin, u32 val)
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
282
static bool spt_port_hotplug_long_detect(enum hpd_pin pin, u32 val)
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
298
static bool ilk_port_hotplug_long_detect(enum hpd_pin pin, u32 val)
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
308
static bool pch_port_hotplug_long_detect(enum hpd_pin pin, u32 val)
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
322
static bool i9xx_port_hotplug_long_detect(enum hpd_pin pin, u32 val)
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
347
bool long_pulse_detect(enum hpd_pin pin, u32 val))
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
349
enum hpd_pin pin;
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
375
if (display->hotplug.stats[encoder->hpd_pin].state == HPD_ENABLED)
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
376
enabled_irqs |= hpd[encoder->hpd_pin];
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
388
hotplug_irqs |= hpd[encoder->hpd_pin];
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
396
enum hpd_pin pin;
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
519
enum hpd_pin pin;
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
692
static u32 ibx_hotplug_mask(enum hpd_pin hpd_pin)
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
694
switch (hpd_pin) {
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
712
switch (encoder->hpd_pin) {
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
751
ibx_hotplug_mask(encoder->hpd_pin),
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
767
static u32 icp_ddi_hotplug_mask(enum hpd_pin hpd_pin)
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
769
switch (hpd_pin) {
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
774
return SHOTPLUG_CTL_DDI_HPD_ENABLE(hpd_pin);
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
782
return icp_ddi_hotplug_mask(encoder->hpd_pin);
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
785
static u32 icp_tc_hotplug_mask(enum hpd_pin hpd_pin)
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
787
switch (hpd_pin) {
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
794
return ICP_TC_HPD_ENABLE(hpd_pin);
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
802
return icp_tc_hotplug_mask(encoder->hpd_pin);
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
817
icp_ddi_hotplug_mask(encoder->hpd_pin),
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
833
icp_tc_hotplug_mask(encoder->hpd_pin),
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
862
static u32 gen11_hotplug_mask(enum hpd_pin hpd_pin)
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
864
switch (hpd_pin) {
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
871
return GEN11_HOTPLUG_CTL_ENABLE(hpd_pin);
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
879
return gen11_hotplug_mask(encoder->hpd_pin);
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
917
gen11_hotplug_mask(encoder->hpd_pin),
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
933
gen11_hotplug_mask(encoder->hpd_pin),
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
966
static u32 mtp_ddi_hotplug_mask(enum hpd_pin hpd_pin)
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
968
switch (hpd_pin) {
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
971
return SHOTPLUG_CTL_DDI_HPD_ENABLE(hpd_pin);
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
979
return mtp_ddi_hotplug_mask(encoder->hpd_pin);
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
982
static u32 mtp_tc_hotplug_mask(enum hpd_pin hpd_pin)
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
984
switch (hpd_pin) {
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
989
return ICP_TC_HPD_ENABLE(hpd_pin);
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
997
return mtp_tc_hotplug_mask(encoder->hpd_pin);
drivers/gpu/drm/i915/display/intel_sdvo.c
3472
intel_encoder->hpd_pin = HPD_SDVO_B;
drivers/gpu/drm/i915/display/intel_sdvo.c
3474
intel_encoder->hpd_pin = HPD_SDVO_C;
drivers/gpu/drm/i915/display/intel_tc.c
1009
enum hpd_pin hpd_pin = dig_port->base.hpd_pin;
drivers/gpu/drm/i915/display/intel_tc.c
1010
u32 pica_isr_bits = display->hotplug.hpd[hpd_pin];
drivers/gpu/drm/i915/display/intel_tc.c
1011
u32 pch_isr_bit = display->hotplug.pch_hpd[hpd_pin];
drivers/gpu/drm/i915/display/intel_tc.c
526
u32 isr_bit = display->hotplug.pch_hpd[dig_port->base.hpd_pin];
drivers/gpu/drm/i915/display/intel_tc.c
814
enum hpd_pin hpd_pin = dig_port->base.hpd_pin;
drivers/gpu/drm/i915/display/intel_tc.c
815
u32 cpu_isr_bits = display->hotplug.hpd[hpd_pin];
drivers/gpu/drm/i915/display/intel_tc.c
816
u32 pch_isr_bit = display->hotplug.pch_hpd[hpd_pin];