i2c_wr32
i2c_wr32(sd, CECRCTL1, reg);
i2c_wr32(sd, CECADD, la);
i2c_wr32(sd, CECTCTL,
i2c_wr32(sd, CECTBUF1 + i * 4,
i2c_wr32(sd, CECTEN, MASK_CECTEN);
i2c_wr32(sd, CECICLR, clr);
i2c_wr32(sd, CSI_INT_CLR, MASK_ICRER);
i2c_wr32(sd, TXOPTIONCNTRL, 0);
i2c_wr32(sd, TXOPTIONCNTRL, MASK_CONTCLKMODE);
i2c_wr32(sd, CLW_CNTRL, MASK_CLW_LANEDISABLE);
i2c_wr32(sd, D0W_CNTRL, MASK_D0W_LANEDISABLE);
i2c_wr32(sd, D1W_CNTRL, MASK_D1W_LANEDISABLE);
i2c_wr32(sd, D2W_CNTRL, MASK_D2W_LANEDISABLE);
i2c_wr32(sd, D3W_CNTRL, MASK_D3W_LANEDISABLE);
i2c_wr32(sd, LINEINITCNT, pdata->lineinitcnt);
i2c_wr32(sd, LPTXTIMECNT, pdata->lptxtimecnt);
i2c_wr32(sd, TCLK_HEADERCNT, pdata->tclk_headercnt);
i2c_wr32(sd, TCLK_TRAILCNT, pdata->tclk_trailcnt);
i2c_wr32(sd, THS_HEADERCNT, pdata->ths_headercnt);
i2c_wr32(sd, TWAKEUP, pdata->twakeup);
i2c_wr32(sd, TCLK_POSTCNT, pdata->tclk_postcnt);
i2c_wr32(sd, THS_TRAILCNT, pdata->ths_trailcnt);
i2c_wr32(sd, HSTXVREGCNT, pdata->hstxvregcnt);
i2c_wr32(sd, HSTXVREGEN,
i2c_wr32(sd, TXOPTIONCNTRL, (state->bus.flags &
i2c_wr32(sd, STARTCNTRL, MASK_START);
i2c_wr32(sd, CSI_START, MASK_STRT);
i2c_wr32(sd, CSI_CONFW, MASK_MODE_SET |
i2c_wr32(sd, CSI_CONFW, MASK_MODE_SET |
i2c_wr32(sd, CSI_CONFW, MASK_MODE_CLEAR |
i2c_wr32(sd, CSI_CONFW, MASK_MODE_SET |
i2c_wr32(sd, CECIMSK, enable ? MASK_CECTIM | MASK_CECRIM : 0);
i2c_wr32(sd, CECICLR, MASK_CECTICLR | MASK_CECRICLR);
i2c_wr32(sd, CECEN, enable);
i2c_wr32(sd, CECREN, MASK_CECREN);