hnae3_get_field
hnae3_get_field(origin, 0x1 << (shift), shift)
hnae3_get_field(*fw_version, HNAE3_FW_VERSION_BYTE3_MASK,
hnae3_get_field(*fw_version, HNAE3_FW_VERSION_BYTE2_MASK,
hnae3_get_field(*fw_version, HNAE3_FW_VERSION_BYTE1_MASK,
hnae3_get_field(*fw_version, HNAE3_FW_VERSION_BYTE0_MASK,
hnae3_get_field(ol_info, HNS3_RXD_PTYPE_M,
ol4_type = hnae3_get_field(ol_info, HNS3_RXD_OL4ID_M,
l3_type = hnae3_get_field(l234info, HNS3_RXD_L3ID_M,
l4_type = hnae3_get_field(l234info, HNS3_RXD_L4ID_M,
ptype = hnae3_get_field(ol_info, HNS3_RXD_PTYPE_M,
switch (hnae3_get_field(l234info, HNS3_RXD_STRP_TAGP_M,
skb_shinfo(skb)->gso_size = hnae3_get_field(bd_base_info,
NAPI_GRO_CB(skb)->count = hnae3_get_field(l234info,
u32 ptype = hnae3_get_field(ol_info, HNS3_RXD_PTYPE_M,
l3_type = hnae3_get_field(l234info, HNS3_RXD_L3ID_M,
u32 ptype = hnae3_get_field(ol_info, HNS3_RXD_PTYPE_M,
int l3_type = hnae3_get_field(l234info, HNS3_RXD_L3ID_M,
int l4_type = hnae3_get_field(l234info, HNS3_RXD_L4ID_M,
l2_frame_type = hnae3_get_field(l234info, HNS3_RXD_DMAC_M,
hnae3_get_field(fw_version, HNAE3_FW_VERSION_BYTE3_MASK,
hnae3_get_field(fw_version, HNAE3_FW_VERSION_BYTE2_MASK,
hnae3_get_field(fw_version, HNAE3_FW_VERSION_BYTE1_MASK,
hnae3_get_field(fw_version, HNAE3_FW_VERSION_BYTE0_MASK,
hnae3_get_field(req->speed_dup, HCLGE_MAC_SPEED_MASK,
hnae3_get_field(scc_version_tmp, HNAE3_SCC_VERSION_BYTE3_MASK,
hnae3_get_field(scc_version_tmp, HNAE3_SCC_VERSION_BYTE2_MASK,
hnae3_get_field(scc_version_tmp, HNAE3_SCC_VERSION_BYTE1_MASK,
hnae3_get_field(scc_version_tmp, HNAE3_SCC_VERSION_BYTE0_MASK,
hnae3_get_field(hdev->fw_version, HNAE3_FW_VERSION_BYTE3_MASK,
hnae3_get_field(hdev->fw_version, HNAE3_FW_VERSION_BYTE2_MASK,
hnae3_get_field(hdev->fw_version, HNAE3_FW_VERSION_BYTE1_MASK,
hnae3_get_field(hdev->fw_version, HNAE3_FW_VERSION_BYTE0_MASK,
cfg->tc_num = hnae3_get_field(__le32_to_cpu(req->param[0]),
cfg->tqp_desc_num = hnae3_get_field(__le32_to_cpu(req->param[0]),
cfg->phy_addr = hnae3_get_field(__le32_to_cpu(req->param[1]),
cfg->media_type = hnae3_get_field(__le32_to_cpu(req->param[1]),
cfg->rx_buf_len = hnae3_get_field(__le32_to_cpu(req->param[1]),
mac_addr_tmp_high = hnae3_get_field(__le32_to_cpu(req->param[3]),
cfg->default_speed = hnae3_get_field(__le32_to_cpu(req->param[3]),
cfg->vf_rss_size_max = hnae3_get_field(__le32_to_cpu(req->param[3]),
cfg->speed_ability = hnae3_get_field(__le32_to_cpu(req->param[1]),
speed_ability_ext = hnae3_get_field(__le32_to_cpu(req->param[1]),
cfg->vlan_fliter_cap = hnae3_get_field(__le32_to_cpu(req->param[1]),
cfg->umv_space = hnae3_get_field(__le32_to_cpu(req->param[1]),
cfg->pf_rss_size_max = hnae3_get_field(__le32_to_cpu(req->param[2]),
cfg->tx_spare_buf_size = hnae3_get_field(__le32_to_cpu(req->param[2]),
req->int_vector_id_l = hnae3_get_field(vector_id,
req->int_vector_id_h = hnae3_get_field(vector_id,
hnae3_get_field(node->int_gl_idx,
hnae3_get_field(vector_id,
hnae3_get_field(vector_id,
mdix_ctrl = hnae3_get_field(retval, HCLGE_PHY_MDIX_CTRL_M,
int_gl_index = hnae3_get_field(tqp_type_and_id,
grp = hnae3_get_field(qs_id, grp_id_mask, grp_id_shift);
sub_grp = hnae3_get_field(qs_id, HCLGE_BP_SUB_GRP_ID_M,
qs_id_l = hnae3_get_field(*qset_id, HCLGE_TM_QS_ID_L_MSK,
qs_id_h = hnae3_get_field(*qset_id, HCLGE_TM_QS_ID_H_EXT_MSK,
qs_id_l = hnae3_get_field(qs_id, HCLGE_TM_QS_ID_L_MSK,
qs_id_h = hnae3_get_field(qs_id, HCLGE_TM_QS_ID_H_MSK,
hnae3_get_field((src), HCLGE_TM_SHAP_##string##_MSK, \
hnae3_get_field(hdev->fw_version, HNAE3_FW_VERSION_BYTE3_MASK,
hnae3_get_field(hdev->fw_version, HNAE3_FW_VERSION_BYTE2_MASK,
hnae3_get_field(hdev->fw_version, HNAE3_FW_VERSION_BYTE1_MASK,
hnae3_get_field(hdev->fw_version, HNAE3_FW_VERSION_BYTE0_MASK,
hnae3_get_field(le16_to_cpu(req->msixcap_localid_ba_rocee),
hnae3_get_field(le16_to_cpu(req->vf_intr_vector_number),
hnae3_get_field(le16_to_cpu(req->vf_intr_vector_number),
hnae3_get_field(node->int_gl_idx,