hw_config
.hw_config = amd_pmu_hw_config,
DEFINE_STATIC_CALL_RET0(amd_pmu_branch_hw_config, *x86_pmu.hw_config);
return x86_pmu.hw_config(event);
.hw_config = core_pmu_hw_config,
.hw_config = intel_pmu_hw_config,
x86_pmu.hw_config = hsw_hw_config;
x86_pmu.hw_config = hsw_hw_config;
x86_pmu.hw_config = hsw_hw_config;
x86_pmu.hw_config = hsw_hw_config;
x86_pmu.hw_config = hsw_hw_config;
x86_pmu.hw_config = adl_hw_config;
x86_pmu.hw_config = adl_hw_config;
x86_pmu.hw_config = adl_hw_config;
x86_pmu.hw_config = arl_h_hw_config;
x86_pmu.hw_config = adl_hw_config;
.hw_config = x86_pmu_hw_config,
.hw_config = p4_hw_config,
.hw_config = x86_pmu_hw_config,
if (pmu->type->ops->hw_config) {
ret = pmu->type->ops->hw_config(box, event);
int (*hw_config)(struct intel_uncore_box *, struct perf_event *);
.hw_config = nhmex_rbox_hw_config,
.hw_config = nhmex_bbox_hw_config,
.hw_config = nhmex_sbox_hw_config,
.hw_config = nhmex_mbox_hw_config,
.hw_config = snb_uncore_imc_hw_config,
.hw_config = uncore_freerunning_hw_config,
.hw_config = uncore_freerunning_hw_config,
.hw_config = snbep_cbox_hw_config,
.hw_config = snbep_pcu_hw_config,
.hw_config = snbep_qpi_hw_config,
.hw_config = ivbep_cbox_hw_config,
.hw_config = snbep_pcu_hw_config,
.hw_config = snbep_qpi_hw_config,
.hw_config = knl_cha_hw_config,
.hw_config = hswep_ubox_hw_config,
.hw_config = hswep_cbox_hw_config,
.hw_config = hswep_pcu_hw_config,
.hw_config = skx_cha_hw_config,
.hw_config = uncore_freerunning_hw_config,
.hw_config = hswep_pcu_hw_config,
.hw_config = snr_cha_hw_config,
.hw_config = snr_pcu_hw_config,
.hw_config = uncore_freerunning_hw_config,
.hw_config = icx_cha_hw_config,
.hw_config = uncore_freerunning_hw_config,
.hw_config = spr_cha_hw_config,
.hw_config = uncore_freerunning_hw_config,
.hw_config = uncore_freerunning_hw_config,
int (*hw_config)(struct perf_event *event);
.hw_config = x86_pmu_hw_config,
.hw_config = mei_me_hw_config,
.hw_config = mei_txe_hw_config,
int (*hw_config)(struct mei_device *dev);
return dev->ops->hw_config(dev);
.hw_config = mei_vsc_hw_config,
u32 hw_config;
bp->common.hw_config = SHMEM_RD(bp, dev_info.shared_hw_config.config);
BNX2X_DEV_INFO("hw_config 0x%08x\n", bp->common.hw_config);
bp->link_params.hw_led_mode = ((bp->common.hw_config &
u8 hw_ref_state, hw_dpll_state, hw_eec_mode, hw_config;
&hw_dpll_state, &hw_config,
*pin = hw_config & ICE_AQC_GET_CGU_DPLL_CONFIG_CLK_REF_SEL;
} hw_config[] = {
struct hw_config *p = hw_config;
int count = ARRAY_SIZE(hw_config);
unsigned short hw_config; /* hardware config (word 93)
struct snd_soc_tplg_hw_config hw_config[SND_SOC_TPLG_HW_CONFIG_MAX]; /* hw configs */
struct snd_soc_tplg_hw_config *hw_config;
hw_config = &cfg->hw_config[i];
if (hw_config->id != cfg->default_hw_config_id)
link->dai_fmt = le32_to_cpu(hw_config->fmt) &
switch (hw_config->clock_gated) {
invert_bclk = hw_config->invert_bclk;
invert_fsync = hw_config->invert_fsync;
bclk_provider = (hw_config->bclk_provider ==
fsync_provider = (hw_config->fsync_provider ==
static void sof_dai_set_format(struct snd_soc_tplg_hw_config *hw_config,
if (hw_config->bclk_provider == SND_SOC_TPLG_BCLK_CP) {
if (hw_config->fsync_provider == SND_SOC_TPLG_FSYNC_CP)
if (hw_config->fsync_provider == SND_SOC_TPLG_FSYNC_CP)
if (hw_config->invert_bclk) {
if (hw_config->invert_fsync)
if (hw_config->invert_fsync)
struct snd_soc_tplg_hw_config *hw_config = slink->hw_configs;
sof_dai_set_format(hw_config, config);
config->sai.mclk_rate = le32_to_cpu(hw_config->mclk_rate);
config->sai.bclk_rate = le32_to_cpu(hw_config->bclk_rate);
config->sai.fsync_rate = le32_to_cpu(hw_config->fsync_rate);
config->sai.mclk_direction = hw_config->mclk_direction;
config->sai.tdm_slots = le32_to_cpu(hw_config->tdm_slots);
config->sai.tdm_slot_width = le32_to_cpu(hw_config->tdm_slot_width);
config->sai.rx_slots = le32_to_cpu(hw_config->rx_slots);
config->sai.tx_slots = le32_to_cpu(hw_config->tx_slots);
struct snd_soc_tplg_hw_config *hw_config = slink->hw_configs;
sof_dai_set_format(hw_config, config);
config->esai.mclk_rate = le32_to_cpu(hw_config->mclk_rate);
config->esai.bclk_rate = le32_to_cpu(hw_config->bclk_rate);
config->esai.fsync_rate = le32_to_cpu(hw_config->fsync_rate);
config->esai.mclk_direction = hw_config->mclk_direction;
config->esai.tdm_slots = le32_to_cpu(hw_config->tdm_slots);
config->esai.tdm_slot_width = le32_to_cpu(hw_config->tdm_slot_width);
config->esai.rx_slots = le32_to_cpu(hw_config->rx_slots);
config->esai.tx_slots = le32_to_cpu(hw_config->tx_slots);
struct snd_soc_tplg_hw_config *hw_config = slink->hw_configs;
sof_dai_set_format(hw_config, config);
struct snd_soc_tplg_hw_config *hw_config = slink->hw_configs;
sof_dai_set_format(hw_config, config);
struct snd_soc_tplg_hw_config *hw_config = slink->hw_configs;
sof_dai_set_format(hw_config, config);
struct snd_soc_tplg_hw_config *hw_config = slink->hw_configs;
sof_dai_set_format(hw_config, config);
struct snd_soc_tplg_hw_config *hw_config = slink->hw_configs;
sof_dai_set_format(hw_config, config);
struct snd_soc_tplg_hw_config *hw_config = slink->hw_configs;
if (le32_to_cpu(hw_config[i].id) == slink->default_hw_cfg_id)
sof_dai_set_format(&hw_config[i], &config[i]);
config[i].ssp.mclk_rate = le32_to_cpu(hw_config[i].mclk_rate);
config[i].ssp.bclk_rate = le32_to_cpu(hw_config[i].bclk_rate);
config[i].ssp.fsync_rate = le32_to_cpu(hw_config[i].fsync_rate);
config[i].ssp.tdm_slots = le32_to_cpu(hw_config[i].tdm_slots);
config[i].ssp.tdm_slot_width = le32_to_cpu(hw_config[i].tdm_slot_width);
config[i].ssp.mclk_direction = hw_config[i].mclk_direction;
config[i].ssp.rx_slots = le32_to_cpu(hw_config[i].rx_slots);
config[i].ssp.tx_slots = le32_to_cpu(hw_config[i].tx_slots);
struct snd_soc_tplg_hw_config *hw_config = &slink->hw_configs[i];
if (params_rate(params) == le32_to_cpu(hw_config->fsync_rate) &&
params_width(params) == le32_to_cpu(hw_config->tdm_slot_width) &&
params_channels(params) <= le32_to_cpu(hw_config->tdm_slots)) {
current_config = le32_to_cpu(hw_config->id);
params_rate(params) == le32_to_cpu(hw_config->fsync_rate) &&
params_channels(params) <= le32_to_cpu(hw_config->tdm_slots)) {
current_config = le32_to_cpu(hw_config->id);
struct snd_soc_tplg_hw_config *hw_config;
hw_config = &slink->hw_configs[i];
if (dai->current_config == le32_to_cpu(hw_config->id)) {
*bit_depth = le32_to_cpu(hw_config->tdm_slot_width);
*channel_count = le32_to_cpu(hw_config->tdm_slots);
*sample_rate = le32_to_cpu(hw_config->fsync_rate);
struct snd_soc_tplg_hw_config *hw_config;
hw_config = &slink->hw_configs[i];
if (dai->current_config == le32_to_cpu(hw_config->id)) {
return le32_to_cpu(hw_config->mclk_rate);
return le32_to_cpu(hw_config->bclk_rate);
return le32_to_cpu(hw_config->tdm_slots);
slink->hw_configs = kmemdup_array(cfg->hw_config,