hv_set_msr
hv_set_msr(reg, value);
hv_set_msr(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
hv_set_msr(HV_X64_MSR_REFERENCE_TSC, tsc_msr.as_uint64);
void hv_set_msr(unsigned int reg, u64 value);
EXPORT_SYMBOL_GPL(hv_set_msr);
hv_set_msr(HV_MSR_STIMER0_CONFIG, timer_cfg.as_uint64);
hv_set_msr(HV_MSR_REFERENCE_TSC, tsc_msr.as_uint64);
hv_set_msr(HV_MSR_REFERENCE_TSC, tsc_msr.as_uint64);
hv_set_msr(HV_MSR_REFERENCE_TSC, tsc_msr.as_uint64);
hv_set_msr(HV_MSR_STIMER0_COUNT, current_tick);
hv_set_msr(HV_MSR_STIMER0_COUNT, 0);
hv_set_msr(HV_MSR_STIMER0_CONFIG, 0);
hv_set_msr(HV_MSR_SIMP, simp.as_uint64);
hv_set_msr(HV_MSR_SIEFP, siefp.as_uint64);
hv_set_msr(HV_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
hv_set_msr(HV_MSR_SCONTROL, sctrl.as_uint64);
hv_set_msr(HV_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
hv_set_msr(HV_MSR_SIMP, simp.as_uint64);
hv_set_msr(HV_MSR_SIEFP, siefp.as_uint64);
hv_set_msr(HV_MSR_SCONTROL, sctrl.as_uint64);
hv_set_msr(HV_MSR_CRASH_P0, 0);
hv_set_msr(HV_MSR_CRASH_P1, 0);
hv_set_msr(HV_MSR_CRASH_P2, 0);
hv_set_msr(HV_MSR_CRASH_P3, bytes_written ? virt_to_phys(hv_panic_page) : 0);
hv_set_msr(HV_MSR_CRASH_P4, bytes_written);
hv_set_msr(HV_MSR_CRASH_CTL,
hv_set_msr(HV_MSR_EOM, 0);
hv_set_msr(HV_MSR_SINT0 + HV_SYNIC_INTERCEPTION_SINT_INDEX,
hv_set_msr(HV_MSR_SINT0 + VTL2_VMBUS_SINT_INDEX,