hs_mode_bits
HS_CLR_EOI_EMPTY_INT | HS_CLR_HF_INT | cb_priv->hs_mode_bits,
cb_priv->hs_mode_bits &= ~HS_ENABLE_MASK;
cb_priv->hs_mode_bits |= HS_TX_ENABLE;
cb7210_write_byte(cb_priv, cb_priv->hs_mode_bits, HS_MODE);
cb_priv->hs_mode_bits &= ~HS_ENABLE_MASK;
cb7210_write_byte(cb_priv, cb_priv->hs_mode_bits, HS_MODE);
cb7210_write_byte(cb_priv, cb_priv->hs_mode_bits |
cb7210_write_byte(cb_priv, cb_priv->hs_mode_bits, HS_MODE);
if ((priv->hs_mode_bits & HS_ENABLE_MASK)) {
dev_dbg(board->gpib_dev, "status 0x%x, mode 0x%x\n", hs_status, priv->hs_mode_bits);
if (priv->hs_mode_bits & HS_TX_ENABLE)
else if (priv->hs_mode_bits & HS_RX_ENABLE)
if ((priv->hs_mode_bits & HS_TX_ENABLE) &&
cb7210_write_byte(priv, priv->hs_mode_bits | clear_bits, HS_MODE);
cb7210_write_byte(priv, priv->hs_mode_bits, HS_MODE);
HS_CLR_EOI_EMPTY_INT | HS_CLR_HF_INT | cb_priv->hs_mode_bits,
priv->hs_mode_bits |= HS_SYS_CONTROL;
priv->hs_mode_bits &= ~HS_SYS_CONTROL;
cb_priv->hs_mode_bits &= ~HS_ENABLE_MASK;
cb7210_write_byte(priv, priv->hs_mode_bits, HS_MODE);
cb7210_write_byte(cb_priv, cb_priv->hs_mode_bits, HS_MODE);
cb_priv->hs_mode_bits |= HS_RX_ENABLE;
cb7210_write_byte(cb_priv, cb_priv->hs_mode_bits, HS_MODE);
cb_priv->hs_mode_bits &= ~HS_ENABLE_MASK;
cb7210_write_byte(cb_priv, cb_priv->hs_mode_bits, nec7210_iobase(cb_priv) +
cb_priv->hs_mode_bits = HS_HF_INT_EN;
cb7210_write_byte(cb_priv, cb_priv->hs_mode_bits, HS_MODE);
u8 hs_mode_bits;