arch/mips/sgi-ip30/ip30-irq.c

114

heart_write(BIT_ULL(HEART_L2_INT_RESCHED_CPU_0),

arch/mips/sgi-ip30/ip30-irq.c

118

heart_write(BIT_ULL(HEART_L2_INT_RESCHED_CPU_1),

arch/mips/sgi-ip30/ip30-irq.c

122

heart_write(BIT_ULL(HEART_L2_INT_CALL_CPU_0),

arch/mips/sgi-ip30/ip30-irq.c

126

heart_write(BIT_ULL(HEART_L2_INT_CALL_CPU_1),

arch/mips/sgi-ip30/ip30-irq.c

141

heart_write(BIT_ULL(d->hwirq), &heart_regs->clear_isr);

arch/mips/sgi-ip30/ip30-irq.c

150

heart_write(*mask, &heart_regs->imr[hd->cpu]);

arch/mips/sgi-ip30/ip30-irq.c

159

heart_write(*mask, &heart_regs->imr[hd->cpu]);

arch/mips/sgi-ip30/ip30-irq.c

160

heart_write(BIT_ULL(d->hwirq), &heart_regs->clear_isr);

arch/mips/sgi-ip30/ip30-irq.c

169

heart_write(*mask, &heart_regs->imr[hd->cpu]);

arch/mips/sgi-ip30/ip30-irq.c

253

heart_write(BIT_ULL(HEART_L2_INT_RESCHED_CPU_0 + cpu),

arch/mips/sgi-ip30/ip30-irq.c

256

heart_write(BIT_ULL(HEART_L2_INT_CALL_CPU_0 + cpu),

arch/mips/sgi-ip30/ip30-irq.c

259

heart_write(*mask, &heart_regs->imr[cpu]);

arch/mips/sgi-ip30/ip30-irq.c

272

heart_write(HEART_CLR_ALL_MASK, &heart_regs->imr[0]);

arch/mips/sgi-ip30/ip30-irq.c

273

heart_write(HEART_CLR_ALL_MASK, &heart_regs->imr[1]);

arch/mips/sgi-ip30/ip30-irq.c

274

heart_write(HEART_CLR_ALL_MASK, &heart_regs->imr[2]);

arch/mips/sgi-ip30/ip30-irq.c

275

heart_write(HEART_CLR_ALL_MASK, &heart_regs->imr[3]);

arch/mips/sgi-ip30/ip30-irq.c

278

heart_write(HEART_ACK_ALL_MASK, &heart_regs->clear_isr);

arch/mips/sgi-ip30/ip30-irq.c

283

heart_write(*mask, &heart_regs->imr[0]);

arch/mips/sgi-ip30/ip30-irq.c

286

heart_write(*mask, &heart_regs->imr[1]);

arch/mips/sgi-ip30/ip30-irq.c

60

heart_write(mask & ~(pending), &heart_regs->imr[cpu]);

arch/mips/sgi-ip30/ip30-irq.c

63

heart_write(HEART_L4_INT_MASK, &heart_regs->clear_isr);

arch/mips/sgi-ip30/ip30-irq.c

94

heart_write(mask, &heart_regs->imr[cpu]);

arch/mips/sgi-ip30/ip30-power.c

29

heart_write((heart_read(&heart_regs->mode) | HM_COLD_RST),

arch/mips/sgi-ip30/ip30-smp.c

64

heart_write(BIT_ULL(irq), &heart_regs->set_isr);