hdmi_phy_write
hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG2, 0x00);
hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG0, 0x1b);
hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG1, 0xf2);
hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG4, 0x00);
hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG5, 0x00);
hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG6, 0x00);
hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG7, 0x00);
hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG8, 0x00);
hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG9, 0x00);
hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG10, 0x00);
hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG11, 0x00);
hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG3, 0x20);
hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG2, 0x7f);
hdmi_phy_write(phy, REG_HDMI_8996_PHY_PD_CTL, 0x0);
hdmi_phy_write(phy, REG_HDMI_8996_PHY_PD_CTL, 0x1);
hdmi_phy_write(phy, REG_HDMI_8996_PHY_TX0_TX1_LANE_CTL, 0x0F);
hdmi_phy_write(phy, REG_HDMI_8996_PHY_TX2_TX3_LANE_CTL, 0x0F);
hdmi_phy_write(phy, REG_HDMI_8996_PHY_MODE, cfg.phy_mode);
hdmi_phy_write(phy, REG_HDMI_8996_PHY_PD_CTL, 0x1F);
hdmi_phy_write(phy, REG_HDMI_8996_PHY_CFG, 0x1);
hdmi_phy_write(phy, REG_HDMI_8996_PHY_CFG, 0x19);
hdmi_phy_write(phy, REG_HDMI_8996_PHY_CFG, 0x18);
hdmi_phy_write(phy, REG_HDMI_8996_PHY_CFG, 0x19);
hdmi_phy_write(phy, REG_HDMI_8996_PHY_CFG, 0x6);
hdmi_phy_write(phy, REG_HDMI_8998_PHY_PD_CTL, 0x0);
hdmi_phy_write(phy, REG_HDMI_8998_PHY_PD_CTL, 0x1);
hdmi_phy_write(phy, REG_HDMI_8998_PHY_CMN_CTRL, 0x6);
hdmi_phy_write(phy, REG_HDMI_8998_PHY_MODE, cfg.phy_mode);
hdmi_phy_write(phy, REG_HDMI_8998_PHY_CFG, 0x1);
hdmi_phy_write(phy, REG_HDMI_8998_PHY_CFG, 0x59);
hdmi_phy_write(phy, REG_HDMI_8998_PHY_CFG, 0x58);
hdmi_phy_write(phy, REG_HDMI_8998_PHY_CFG, 0x59);
hdmi_phy_write(phy, REG_HDMI_8998_PHY_PD_CTL, 0);
hdmi_phy_write(phy, REG_HDMI_PHY_CTRL, 0);
hdmi_phy_write(phy, REG_HDMI_8x60_PHY_REG2,
hdmi_phy_write(phy, REG_HDMI_8x60_PHY_REG3, 0);
hdmi_phy_write(phy, REG_HDMI_8x60_PHY_REG2,
hdmi_phy_write(phy, REG_HDMI_8x60_PHY_REG0,
hdmi_phy_write(phy, REG_HDMI_8x60_PHY_REG1,
hdmi_phy_write(phy, REG_HDMI_8x60_PHY_REG1,
hdmi_phy_write(phy, REG_HDMI_8x60_PHY_REG2,
hdmi_phy_write(phy, REG_HDMI_8x60_PHY_REG2,
hdmi_phy_write(phy, REG_HDMI_8x60_PHY_REG2,
hdmi_phy_write(phy, REG_HDMI_8x60_PHY_REG3,
hdmi_phy_write(phy, REG_HDMI_8x60_PHY_REG9, 0);
hdmi_phy_write(phy, REG_HDMI_8x60_PHY_REG12,
hdmi_phy_write(phy, REG_HDMI_8x60_PHY_REG2,
hdmi_phy_write(phy, REG_HDMI_8x60_PHY_REG2,
hdmi_phy_write(phy, REG_HDMI_8x60_PHY_REG4, 0);
hdmi_phy_write(phy, REG_HDMI_8x60_PHY_REG5, 0);
hdmi_phy_write(phy, REG_HDMI_8x60_PHY_REG6, 0);
hdmi_phy_write(phy, REG_HDMI_8x60_PHY_REG7, 0);
hdmi_phy_write(phy, REG_HDMI_8x60_PHY_REG8, 0);
hdmi_phy_write(phy, REG_HDMI_8x60_PHY_REG9, 0);
hdmi_phy_write(phy, REG_HDMI_8x60_PHY_REG10, 0);
hdmi_phy_write(phy, REG_HDMI_8x60_PHY_REG11, 0);
hdmi_phy_write(phy, REG_HDMI_8x60_PHY_REG12,
hdmi_phy_write(phy, REG_HDMI_PHY_CTRL,
hdmi_phy_write(phy, REG_HDMI_8x74_ANA_CFG0, 0x1b);
hdmi_phy_write(phy, REG_HDMI_8x74_ANA_CFG1, 0xf2);
hdmi_phy_write(phy, REG_HDMI_8x74_BIST_CFG0, 0x0);
hdmi_phy_write(phy, REG_HDMI_8x74_BIST_PATN0, 0x0);
hdmi_phy_write(phy, REG_HDMI_8x74_BIST_PATN1, 0x0);
hdmi_phy_write(phy, REG_HDMI_8x74_BIST_PATN2, 0x0);
hdmi_phy_write(phy, REG_HDMI_8x74_BIST_PATN3, 0x0);
hdmi_phy_write(phy, REG_HDMI_8x74_PD_CTRL1, 0x20);
hdmi_phy_write(phy, REG_HDMI_8x74_PD_CTRL0, 0x7f);
hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG12, val);
hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG12, val);
hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG2, 0x3f);
hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG12, val);
hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG2, 0x80);
hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG12, val);