drivers/gpu/drm/msm/hdmi/hdmi.h

135

void (*powerup)(struct hdmi_phy *phy, unsigned long pixclock);

drivers/gpu/drm/msm/hdmi/hdmi.h

136

void (*powerdown)(struct hdmi_phy *phy);

drivers/gpu/drm/msm/hdmi/hdmi.h

158

static inline void hdmi_phy_write(struct hdmi_phy *phy, u32 reg, u32 data)

drivers/gpu/drm/msm/hdmi/hdmi.h

163

static inline u32 hdmi_phy_read(struct hdmi_phy *phy, u32 reg)

drivers/gpu/drm/msm/hdmi/hdmi.h

168

int msm_hdmi_phy_resource_enable(struct hdmi_phy *phy);

drivers/gpu/drm/msm/hdmi/hdmi.h

169

void msm_hdmi_phy_resource_disable(struct hdmi_phy *phy);

drivers/gpu/drm/msm/hdmi/hdmi.h

170

void msm_hdmi_phy_powerup(struct hdmi_phy *phy, unsigned long pixclock);

drivers/gpu/drm/msm/hdmi/hdmi.h

171

void msm_hdmi_phy_powerdown(struct hdmi_phy *phy);

drivers/gpu/drm/msm/hdmi/hdmi.h

22

struct hdmi_phy;

drivers/gpu/drm/msm/hdmi/hdmi.h

58

struct hdmi_phy *phy;

drivers/gpu/drm/msm/hdmi/hdmi_bridge.c

290

struct hdmi_phy *phy = hdmi->phy;

drivers/gpu/drm/msm/hdmi/hdmi_bridge.c

332

struct hdmi_phy *phy = hdmi->phy;

drivers/gpu/drm/msm/hdmi/hdmi_phy.c

105

void msm_hdmi_phy_powerdown(struct hdmi_phy *phy)

drivers/gpu/drm/msm/hdmi/hdmi_phy.c

11

static int msm_hdmi_phy_resource_init(struct hdmi_phy *phy)

drivers/gpu/drm/msm/hdmi/hdmi_phy.c

144

struct hdmi_phy *phy;

drivers/gpu/drm/msm/hdmi/hdmi_phy.c

55

int msm_hdmi_phy_resource_enable(struct hdmi_phy *phy)

drivers/gpu/drm/msm/hdmi/hdmi_phy.c

83

void msm_hdmi_phy_resource_disable(struct hdmi_phy *phy)

drivers/gpu/drm/msm/hdmi/hdmi_phy.c

97

void msm_hdmi_phy_powerup(struct hdmi_phy *phy, unsigned long pixclock)

drivers/gpu/drm/msm/hdmi/hdmi_phy_8960.c

28

static void hdmi_phy_8960_powerdown(struct hdmi_phy *phy)

drivers/gpu/drm/msm/hdmi/hdmi_phy_8960.c

9

static void hdmi_phy_8960_powerup(struct hdmi_phy *phy,

drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c

396

struct hdmi_phy *phy = pll_get_phy(pll);

drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c

540

static int hdmi_8996_phy_ready_status(struct hdmi_phy *phy)

drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c

592

struct hdmi_phy *phy = pll_get_phy(pll);

drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c

661

struct hdmi_phy *phy = pll_get_phy(pll);

drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c

78

static inline struct hdmi_phy *pll_get_phy(struct hdmi_pll_8996 *pll)

drivers/gpu/drm/msm/hdmi/hdmi_phy_8998.c

445

struct hdmi_phy *phy = pll_get_phy(pll);

drivers/gpu/drm/msm/hdmi/hdmi_phy_8998.c

566

static int hdmi_8998_phy_ready_status(struct hdmi_phy *phy)

drivers/gpu/drm/msm/hdmi/hdmi_phy_8998.c

610

struct hdmi_phy *phy = pll_get_phy(pll);

drivers/gpu/drm/msm/hdmi/hdmi_phy_8998.c

665

struct hdmi_phy *phy = pll_get_phy(pll);

drivers/gpu/drm/msm/hdmi/hdmi_phy_8998.c

77

static inline struct hdmi_phy *pll_get_phy(struct hdmi_pll_8998 *pll)

drivers/gpu/drm/msm/hdmi/hdmi_phy_8x60.c

11

static void hdmi_phy_8x60_powerup(struct hdmi_phy *phy,

drivers/gpu/drm/msm/hdmi/hdmi_phy_8x60.c

95

static void hdmi_phy_8x60_powerdown(struct hdmi_phy *phy)

drivers/gpu/drm/msm/hdmi/hdmi_phy_8x74.c

22

static void hdmi_phy_8x74_powerdown(struct hdmi_phy *phy)

drivers/gpu/drm/msm/hdmi/hdmi_phy_8x74.c

9

static void hdmi_phy_8x74_powerup(struct hdmi_phy *phy,

drivers/gpu/drm/msm/hdmi/hdmi_pll_8960.c

247

static inline struct hdmi_phy *pll_get_phy(struct hdmi_pll_8960 *pll)

drivers/gpu/drm/msm/hdmi/hdmi_pll_8960.c

255

struct hdmi_phy *phy = pll_get_phy(pll);

drivers/gpu/drm/msm/hdmi/hdmi_pll_8960.c

340

struct hdmi_phy *phy = pll_get_phy(pll);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

102

struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

103

void __iomem *base = hdmi_phy->regs;

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

138

struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

142

tmp = readl(hdmi_phy->regs + HDMI_CON6);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

159

tmp = readl(hdmi_phy->regs + HDMI_CON2);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

177

static void mtk_hdmi_phy_enable_tmds(struct mtk_hdmi_phy *hdmi_phy)

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

179

void __iomem *base = hdmi_phy->regs;

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

197

static void mtk_hdmi_phy_disable_tmds(struct mtk_hdmi_phy *hdmi_phy)

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

199

void __iomem *base = hdmi_phy->regs;

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

52

struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

53

void __iomem *base = hdmi_phy->regs;

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

74

struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);

drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c

75

void __iomem *base = hdmi_phy->regs;

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

107

struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

108

void __iomem *base = hdmi_phy->regs;

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

124

struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

126

hdmi_phy->pll_rate = req->rate;

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

138

struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

139

void __iomem *base = hdmi_phy->regs;

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

146

dev_dbg(hdmi_phy->dev, "%s: %lu Hz, parent: %lu Hz\n", __func__,

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

182

hdmi_ibias = hdmi_phy->ibias;

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

187

hdmi_ibias = hdmi_phy->ibias_up;

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

200

FIELD_PREP(RG_HDMITX_DRV_IMP_CLK, hdmi_phy->drv_imp_clk) |

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

201

FIELD_PREP(RG_HDMITX_DRV_IMP_D2, hdmi_phy->drv_imp_d2) |

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

202

FIELD_PREP(RG_HDMITX_DRV_IMP_D1, hdmi_phy->drv_imp_d1) |

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

203

FIELD_PREP(RG_HDMITX_DRV_IMP_D0, hdmi_phy->drv_imp_d0));

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

217

struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

219

return hdmi_phy->pll_rate;

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

230

static void mtk_hdmi_phy_enable_tmds(struct mtk_hdmi_phy *hdmi_phy)

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

232

mtk_phy_set_bits(hdmi_phy->regs + HDMI_CON3,

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

238

static void mtk_hdmi_phy_disable_tmds(struct mtk_hdmi_phy *hdmi_phy)

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

240

mtk_phy_clear_bits(hdmi_phy->regs + HDMI_CON3,

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

89

struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

90

void __iomem *base = hdmi_phy->regs;

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

211

static int mtk_hdmi_pll_calc(struct mtk_hdmi_phy *hdmi_phy, struct clk_hw *hw,

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

22

static void mtk_hdmi_ana_fifo_en(struct mtk_hdmi_phy *hdmi_phy)

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

227

hdmi_phy->tmds_over_340M = true;

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

229

hdmi_phy->tmds_over_340M = false;

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

25

mtk_phy_set_bits(hdmi_phy->regs + HDMI_ANA_CTL, REG_ANA_HDMI20_FIFO_EN);

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

29

mtk_phy_tmds_clk_ratio(struct mtk_hdmi_phy *hdmi_phy, bool enable)

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

304

struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

305

void __iomem *regs = hdmi_phy->regs;

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

309

u32 pixel_clk = hdmi_phy->pll_rate;

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

31

void __iomem *regs = hdmi_phy->regs;

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

33

mtk_hdmi_ana_fifo_en(hdmi_phy);

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

361

struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

362

void __iomem *regs = hdmi_phy->regs;

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

395

struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

396

void __iomem *regs = hdmi_phy->regs;

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

413

struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

415

dev_dbg(hdmi_phy->dev, "%s: %lu Hz, parent: %lu Hz\n", __func__, rate,

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

418

return mtk_hdmi_pll_calc(hdmi_phy, hw, rate, parent_rate);

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

424

struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

426

hdmi_phy->pll_rate = req->rate;

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

433

struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

435

return hdmi_phy->pll_rate;

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

446

static void vtx_signal_en(struct mtk_hdmi_phy *hdmi_phy, bool on)

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

448

void __iomem *regs = hdmi_phy->regs;

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

456

static void mtk_hdmi_phy_enable_tmds(struct mtk_hdmi_phy *hdmi_phy)

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

458

vtx_signal_en(hdmi_phy, true);

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

46

struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

462

static void mtk_hdmi_phy_disable_tmds(struct mtk_hdmi_phy *hdmi_phy)

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

464

vtx_signal_en(hdmi_phy, false);

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

47

void __iomem *regs = hdmi_phy->regs;

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

470

struct mtk_hdmi_phy *hdmi_phy = phy_get_drvdata(phy);

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

473

ret = clk_set_rate(hdmi_phy->pll, dp_opts->link_rate);

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

478

mtk_phy_tmds_clk_ratio(hdmi_phy, hdmi_phy->tmds_over_340M);

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

485

struct mtk_hdmi_phy *hdmi_phy = rdev_get_drvdata(rdev);

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

487

mtk_phy_set_bits(hdmi_phy->regs + HDMI_CTL_1, RG_HDMITX_PWR5V_O);

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

494

struct mtk_hdmi_phy *hdmi_phy = rdev_get_drvdata(rdev);

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

496

mtk_phy_clear_bits(hdmi_phy->regs + HDMI_CTL_1, RG_HDMITX_PWR5V_O);

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

503

struct mtk_hdmi_phy *hdmi_phy = rdev_get_drvdata(rdev);

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

505

return !!(readl(hdmi_phy->regs + HDMI_CTL_1) & RG_HDMITX_PWR5V_O);

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

58

struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

59

void __iomem *regs = hdmi_phy->regs;

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

91

struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);

drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c

92

void __iomem *regs = hdmi_phy->regs;

drivers/phy/mediatek/phy-mtk-hdmi.c

103

struct mtk_hdmi_phy *hdmi_phy;

drivers/phy/mediatek/phy-mtk-hdmi.c

115

hdmi_phy = devm_kzalloc(dev, sizeof(*hdmi_phy), GFP_KERNEL);

drivers/phy/mediatek/phy-mtk-hdmi.c

116

if (!hdmi_phy)

drivers/phy/mediatek/phy-mtk-hdmi.c

119

hdmi_phy->regs = devm_platform_ioremap_resource(pdev, 0);

drivers/phy/mediatek/phy-mtk-hdmi.c

120

if (IS_ERR(hdmi_phy->regs))

drivers/phy/mediatek/phy-mtk-hdmi.c

121

return PTR_ERR(hdmi_phy->regs);

drivers/phy/mediatek/phy-mtk-hdmi.c

135

hdmi_phy->dev = dev;

drivers/phy/mediatek/phy-mtk-hdmi.c

136

hdmi_phy->conf =

drivers/phy/mediatek/phy-mtk-hdmi.c

138

mtk_hdmi_phy_clk_get_data(hdmi_phy, &clk_init);

drivers/phy/mediatek/phy-mtk-hdmi.c

139

hdmi_phy->pll_hw.init = &clk_init;

drivers/phy/mediatek/phy-mtk-hdmi.c

140

hdmi_phy->pll = devm_clk_register(dev, &hdmi_phy->pll_hw);

drivers/phy/mediatek/phy-mtk-hdmi.c

141

if (IS_ERR(hdmi_phy->pll))

drivers/phy/mediatek/phy-mtk-hdmi.c

142

return dev_err_probe(dev, PTR_ERR(hdmi_phy->pll),

drivers/phy/mediatek/phy-mtk-hdmi.c

146

&hdmi_phy->ibias);

drivers/phy/mediatek/phy-mtk-hdmi.c

151

&hdmi_phy->ibias_up);

drivers/phy/mediatek/phy-mtk-hdmi.c

156

hdmi_phy->drv_imp_clk = 0x30;

drivers/phy/mediatek/phy-mtk-hdmi.c

157

hdmi_phy->drv_imp_d2 = 0x30;

drivers/phy/mediatek/phy-mtk-hdmi.c

158

hdmi_phy->drv_imp_d1 = 0x30;

drivers/phy/mediatek/phy-mtk-hdmi.c

159

hdmi_phy->drv_imp_d0 = 0x30;

drivers/phy/mediatek/phy-mtk-hdmi.c

161

phy = devm_phy_create(dev, NULL, mtk_hdmi_phy_dev_get_ops(hdmi_phy));

drivers/phy/mediatek/phy-mtk-hdmi.c

165

phy_set_drvdata(phy, hdmi_phy);

drivers/phy/mediatek/phy-mtk-hdmi.c

172

if (hdmi_phy->conf->pll_default_off)

drivers/phy/mediatek/phy-mtk-hdmi.c

173

hdmi_phy->conf->hdmi_phy_disable_tmds(hdmi_phy);

drivers/phy/mediatek/phy-mtk-hdmi.c

175

if (hdmi_phy->conf->hdmi_phy_regulator_desc) {

drivers/phy/mediatek/phy-mtk-hdmi.c

176

ret = mtk_hdmi_phy_register_regulators(hdmi_phy);

drivers/phy/mediatek/phy-mtk-hdmi.c

182

hdmi_phy->pll);

drivers/phy/mediatek/phy-mtk-hdmi.c

27

struct mtk_hdmi_phy *hdmi_phy = phy_get_drvdata(phy);

drivers/phy/mediatek/phy-mtk-hdmi.c

30

ret = clk_prepare_enable(hdmi_phy->pll);

drivers/phy/mediatek/phy-mtk-hdmi.c

34

hdmi_phy->conf->hdmi_phy_enable_tmds(hdmi_phy);

drivers/phy/mediatek/phy-mtk-hdmi.c

40

struct mtk_hdmi_phy *hdmi_phy = phy_get_drvdata(phy);

drivers/phy/mediatek/phy-mtk-hdmi.c

42

hdmi_phy->conf->hdmi_phy_disable_tmds(hdmi_phy);

drivers/phy/mediatek/phy-mtk-hdmi.c

43

clk_disable_unprepare(hdmi_phy->pll);

drivers/phy/mediatek/phy-mtk-hdmi.c

50

struct mtk_hdmi_phy *hdmi_phy = phy_get_drvdata(phy);

drivers/phy/mediatek/phy-mtk-hdmi.c

52

if (hdmi_phy->conf->hdmi_phy_configure)

drivers/phy/mediatek/phy-mtk-hdmi.c

53

return hdmi_phy->conf->hdmi_phy_configure(phy, opts);

drivers/phy/mediatek/phy-mtk-hdmi.c

59

mtk_hdmi_phy_dev_get_ops(const struct mtk_hdmi_phy *hdmi_phy)

drivers/phy/mediatek/phy-mtk-hdmi.c

61

if (hdmi_phy && hdmi_phy->conf &&

drivers/phy/mediatek/phy-mtk-hdmi.c

62

hdmi_phy->conf->hdmi_phy_enable_tmds &&

drivers/phy/mediatek/phy-mtk-hdmi.c

63

hdmi_phy->conf->hdmi_phy_disable_tmds)

drivers/phy/mediatek/phy-mtk-hdmi.c

66

if (hdmi_phy)

drivers/phy/mediatek/phy-mtk-hdmi.c

67

dev_err(hdmi_phy->dev, "Failed to get dev ops of phy\n");

drivers/phy/mediatek/phy-mtk-hdmi.c

71

static void mtk_hdmi_phy_clk_get_data(struct mtk_hdmi_phy *hdmi_phy,

drivers/phy/mediatek/phy-mtk-hdmi.c

74

clk_init->flags = hdmi_phy->conf->flags;

drivers/phy/mediatek/phy-mtk-hdmi.c

75

clk_init->ops = hdmi_phy->conf->hdmi_phy_clk_ops;

drivers/phy/mediatek/phy-mtk-hdmi.c

78

static int mtk_hdmi_phy_register_regulators(struct mtk_hdmi_phy *hdmi_phy)

drivers/phy/mediatek/phy-mtk-hdmi.c

80

const struct regulator_desc *vreg_desc = hdmi_phy->conf->hdmi_phy_regulator_desc;

drivers/phy/mediatek/phy-mtk-hdmi.c

87

.dev = hdmi_phy->dev,

drivers/phy/mediatek/phy-mtk-hdmi.c

88

.driver_data = hdmi_phy,

drivers/phy/mediatek/phy-mtk-hdmi.c

90

.of_node = hdmi_phy->dev->of_node

drivers/phy/mediatek/phy-mtk-hdmi.c

93

hdmi_phy->rdev = devm_regulator_register(hdmi_phy->dev, vreg_desc, &vreg_config);

drivers/phy/mediatek/phy-mtk-hdmi.c

94

if (IS_ERR(hdmi_phy->rdev))

drivers/phy/mediatek/phy-mtk-hdmi.c

95

return PTR_ERR(hdmi_phy->rdev);

drivers/phy/mediatek/phy-mtk-hdmi.h

27

void (*hdmi_phy_enable_tmds)(struct mtk_hdmi_phy *hdmi_phy);

drivers/phy/mediatek/phy-mtk-hdmi.h

28

void (*hdmi_phy_disable_tmds)(struct mtk_hdmi_phy *hdmi_phy);