Symbol: hdmi
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
11526
if ((new_con_state->hdmi.broadcast_rgb != old_con_state->hdmi.broadcast_rgb) &&
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
6788
if (connector->display_info.hdmi.y420_dc_modes & DRM_EDID_YCBCR420_DC_48)
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
6790
else if (connector->display_info.hdmi.y420_dc_modes & DRM_EDID_YCBCR420_DC_36)
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
6792
else if (connector->display_info.hdmi.y420_dc_modes & DRM_EDID_YCBCR420_DC_30)
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
6880
if (connector_state->hdmi.broadcast_rgb == DRM_HDMI_BROADCAST_RGB_LIMITED)
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7656
connector->display_info.hdmi.scdc.scrambling.low_rates;
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c
585
link->hdmi.frl_enabled = config->frl_enabled;
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
1134
void populate_hdmi_info_from_connector(bool enable_frl, struct drm_hdmi_info *hdmi, struct dc_edid_caps *edid_caps)
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
1136
edid_caps->scdc_present = hdmi->scdc.supported;
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
1138
edid_caps->max_frl_rate = get_max_frl_rate(hdmi->max_lanes, hdmi->max_frl_rate_per_lane);
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
1139
edid_caps->frl_dsc_support = hdmi->dsc_cap.v_1p2;
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
1141
if (hdmi->dsc_cap.bpc_supported == 10)
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
1143
else if (hdmi->dsc_cap.bpc_supported == 12)
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
1145
edid_caps->frl_dsc_all_bpp = hdmi->dsc_cap.all_bpp;
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
1146
edid_caps->frl_dsc_native_420 = hdmi->dsc_cap.native_420;
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
1147
edid_caps->frl_dsc_max_slices = get_dsc_max_slices(hdmi->dsc_cap.max_slices, hdmi->dsc_cap.clk_per_slice);
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
1148
edid_caps->frl_dsc_max_frl_rate = get_max_frl_rate(hdmi->dsc_cap.max_lanes, hdmi->dsc_cap.max_frl_rate_per_lane);
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
1149
edid_caps->frl_dsc_total_chunk_kbytes = hdmi->dsc_cap.total_chunk_kbytes;
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
189
populate_hdmi_info_from_connector(link->dc->config.enable_frl, &connector->display_info.hdmi, edid_caps);
drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h
412
hdcp->connection.link.hdmi.frl_enabled);
drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h
310
struct mod_hdcp_hdmi hdmi;
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
104
struct imx8mp_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
106
dw_hdmi_remove(hdmi->dw_hdmi);
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
108
component_unbind_all(dev, &hdmi->plat_data);
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
122
struct imx8mp_hdmi *hdmi;
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
124
hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
125
if (!hdmi)
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
128
plat_data = &hdmi->plat_data;
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
130
hdmi->pixclk = devm_clk_get(dev, "pix");
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
131
if (IS_ERR(hdmi->pixclk))
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
132
return dev_err_probe(dev, PTR_ERR(hdmi->pixclk),
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
138
plat_data->priv_data = hdmi;
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
142
platform_set_drvdata(pdev, hdmi);
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
147
hdmi->dw_hdmi = dw_hdmi_probe(pdev, plat_data);
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
148
if (IS_ERR(hdmi->dw_hdmi))
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
149
return PTR_ERR(hdmi->dw_hdmi);
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
163
struct imx8mp_hdmi *hdmi = platform_get_drvdata(pdev);
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
172
dw_hdmi_remove(hdmi->dw_hdmi);
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
183
struct imx8mp_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
185
dw_hdmi_resume(hdmi->dw_hdmi);
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
26
struct imx8mp_hdmi *hdmi = (struct imx8mp_hdmi *)data;
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
35
round_rate = clk_round_rate(hdmi->pixclk, mode->clock * 1000);
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
64
static void im8mp_hdmi_phy_setup_hpd(struct dw_hdmi *hdmi, void *data)
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
70
dw_hdmi_phy_gen1_reset(hdmi);
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
72
dw_hdmi_phy_setup_hpd(hdmi, data);
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
86
struct imx8mp_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
89
ret = component_bind_all(dev, &hdmi->plat_data);
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
93
hdmi->dw_hdmi = dw_hdmi_probe(pdev, &hdmi->plat_data);
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
94
if (IS_ERR(hdmi->dw_hdmi)) {
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
95
component_unbind_all(dev, &hdmi->plat_data);
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
96
return PTR_ERR(hdmi->dw_hdmi);
drivers/gpu/drm/bridge/inno-hdmi.c
1001
ret = inno_hdmi_i2c_read(hdmi, &msgs[i]);
drivers/gpu/drm/bridge/inno-hdmi.c
1003
ret = inno_hdmi_i2c_write(hdmi, &msgs[i]);
drivers/gpu/drm/bridge/inno-hdmi.c
1013
hdmi_writeb(hdmi, HDMI_INTERRUPT_MASK1, 0);
drivers/gpu/drm/bridge/inno-hdmi.c
1030
static struct i2c_adapter *inno_hdmi_i2c_adapter(struct inno_hdmi *hdmi)
drivers/gpu/drm/bridge/inno-hdmi.c
1036
i2c = devm_kzalloc(hdmi->dev, sizeof(*i2c), GFP_KERNEL);
drivers/gpu/drm/bridge/inno-hdmi.c
1045
adap->dev.parent = hdmi->dev;
drivers/gpu/drm/bridge/inno-hdmi.c
1046
adap->dev.of_node = hdmi->dev->of_node;
drivers/gpu/drm/bridge/inno-hdmi.c
1049
i2c_set_adapdata(adap, hdmi);
drivers/gpu/drm/bridge/inno-hdmi.c
1051
ret = devm_i2c_add_adapter(hdmi->dev, adap);
drivers/gpu/drm/bridge/inno-hdmi.c
1053
dev_warn(hdmi->dev, "cannot add %s I2C adapter\n", adap->name);
drivers/gpu/drm/bridge/inno-hdmi.c
1057
hdmi->i2c = i2c;
drivers/gpu/drm/bridge/inno-hdmi.c
1059
DRM_DEV_INFO(hdmi->dev, "registered %s I2C bus driver\n", adap->name);
drivers/gpu/drm/bridge/inno-hdmi.c
1069
struct inno_hdmi *hdmi;
drivers/gpu/drm/bridge/inno-hdmi.c
1078
hdmi = devm_drm_bridge_alloc(dev, struct inno_hdmi, bridge, &inno_hdmi_bridge_funcs);
drivers/gpu/drm/bridge/inno-hdmi.c
1079
if (IS_ERR(hdmi))
drivers/gpu/drm/bridge/inno-hdmi.c
1080
return ERR_CAST(hdmi);
drivers/gpu/drm/bridge/inno-hdmi.c
1082
hdmi->dev = dev;
drivers/gpu/drm/bridge/inno-hdmi.c
1083
hdmi->plat_data = plat_data;
drivers/gpu/drm/bridge/inno-hdmi.c
1085
hdmi->regs = devm_platform_ioremap_resource(pdev, 0);
drivers/gpu/drm/bridge/inno-hdmi.c
1086
if (IS_ERR(hdmi->regs))
drivers/gpu/drm/bridge/inno-hdmi.c
1087
return ERR_CAST(hdmi->regs);
drivers/gpu/drm/bridge/inno-hdmi.c
1089
hdmi->pclk = devm_clk_get_enabled(hdmi->dev, "pclk");
drivers/gpu/drm/bridge/inno-hdmi.c
1090
if (IS_ERR(hdmi->pclk)) {
drivers/gpu/drm/bridge/inno-hdmi.c
1091
dev_err_probe(dev, PTR_ERR(hdmi->pclk), "Unable to get HDMI pclk\n");
drivers/gpu/drm/bridge/inno-hdmi.c
1092
return ERR_CAST(hdmi->pclk);
drivers/gpu/drm/bridge/inno-hdmi.c
1095
hdmi->refclk = devm_clk_get_optional_enabled(hdmi->dev, "ref");
drivers/gpu/drm/bridge/inno-hdmi.c
1096
if (IS_ERR(hdmi->refclk)) {
drivers/gpu/drm/bridge/inno-hdmi.c
1097
dev_err_probe(dev, PTR_ERR(hdmi->refclk), "Unable to get HDMI refclk\n");
drivers/gpu/drm/bridge/inno-hdmi.c
1098
return ERR_CAST(hdmi->refclk);
drivers/gpu/drm/bridge/inno-hdmi.c
1101
inno_hdmi_init_hw(hdmi);
drivers/gpu/drm/bridge/inno-hdmi.c
1109
dev_name(dev), hdmi);
drivers/gpu/drm/bridge/inno-hdmi.c
1113
hdmi->bridge.driver_private = hdmi;
drivers/gpu/drm/bridge/inno-hdmi.c
1114
hdmi->bridge.ops = DRM_BRIDGE_OP_DETECT |
drivers/gpu/drm/bridge/inno-hdmi.c
1118
hdmi->bridge.of_node = pdev->dev.of_node;
drivers/gpu/drm/bridge/inno-hdmi.c
1119
hdmi->bridge.type = DRM_MODE_CONNECTOR_HDMIA;
drivers/gpu/drm/bridge/inno-hdmi.c
1120
hdmi->bridge.vendor = "Inno";
drivers/gpu/drm/bridge/inno-hdmi.c
1121
hdmi->bridge.product = "Inno HDMI";
drivers/gpu/drm/bridge/inno-hdmi.c
1123
hdmi->bridge.ddc = inno_hdmi_i2c_adapter(hdmi);
drivers/gpu/drm/bridge/inno-hdmi.c
1124
if (IS_ERR(hdmi->bridge.ddc))
drivers/gpu/drm/bridge/inno-hdmi.c
1125
return ERR_CAST(hdmi->bridge.ddc);
drivers/gpu/drm/bridge/inno-hdmi.c
1127
ret = devm_drm_bridge_add(dev, &hdmi->bridge);
drivers/gpu/drm/bridge/inno-hdmi.c
1131
ret = drm_bridge_attach(encoder, &hdmi->bridge, NULL, DRM_BRIDGE_ATTACH_NO_CONNECTOR);
drivers/gpu/drm/bridge/inno-hdmi.c
1135
return hdmi;
drivers/gpu/drm/bridge/inno-hdmi.c
454
static int inno_hdmi_find_phy_config(struct inno_hdmi *hdmi,
drivers/gpu/drm/bridge/inno-hdmi.c
457
const struct inno_hdmi_phy_config *phy_configs = hdmi->plat_data->phy_configs;
drivers/gpu/drm/bridge/inno-hdmi.c
465
DRM_DEV_DEBUG(hdmi->dev, "No phy configuration for pixelclock %lu\n",
drivers/gpu/drm/bridge/inno-hdmi.c
471
static inline u8 hdmi_readb(struct inno_hdmi *hdmi, u16 offset)
drivers/gpu/drm/bridge/inno-hdmi.c
473
return readl_relaxed(hdmi->regs + (offset) * 0x04);
drivers/gpu/drm/bridge/inno-hdmi.c
476
static inline void hdmi_writeb(struct inno_hdmi *hdmi, u16 offset, u32 val)
drivers/gpu/drm/bridge/inno-hdmi.c
478
writel_relaxed(val, hdmi->regs + (offset) * 0x04);
drivers/gpu/drm/bridge/inno-hdmi.c
481
static inline void hdmi_modb(struct inno_hdmi *hdmi, u16 offset,
drivers/gpu/drm/bridge/inno-hdmi.c
484
u8 temp = hdmi_readb(hdmi, offset) & ~msk;
drivers/gpu/drm/bridge/inno-hdmi.c
487
hdmi_writeb(hdmi, offset, temp);
drivers/gpu/drm/bridge/inno-hdmi.c
490
static void inno_hdmi_i2c_init(struct inno_hdmi *hdmi, unsigned long long rate)
drivers/gpu/drm/bridge/inno-hdmi.c
496
hdmi_writeb(hdmi, DDC_BUS_FREQ_L, ddc_bus_freq & 0xFF);
drivers/gpu/drm/bridge/inno-hdmi.c
497
hdmi_writeb(hdmi, DDC_BUS_FREQ_H, (ddc_bus_freq >> 8) & 0xFF);
drivers/gpu/drm/bridge/inno-hdmi.c
500
hdmi_writeb(hdmi, HDMI_INTERRUPT_MASK1, 0);
drivers/gpu/drm/bridge/inno-hdmi.c
501
hdmi_writeb(hdmi, HDMI_INTERRUPT_STATUS1, m_INT_EDID_READY);
drivers/gpu/drm/bridge/inno-hdmi.c
504
static void inno_hdmi_sys_power(struct inno_hdmi *hdmi, bool enable)
drivers/gpu/drm/bridge/inno-hdmi.c
507
hdmi_modb(hdmi, HDMI_SYS_CTRL, m_POWER, v_PWR_ON);
drivers/gpu/drm/bridge/inno-hdmi.c
509
hdmi_modb(hdmi, HDMI_SYS_CTRL, m_POWER, v_PWR_OFF);
drivers/gpu/drm/bridge/inno-hdmi.c
512
static void inno_hdmi_standby(struct inno_hdmi *hdmi)
drivers/gpu/drm/bridge/inno-hdmi.c
514
inno_hdmi_sys_power(hdmi, false);
drivers/gpu/drm/bridge/inno-hdmi.c
516
hdmi_writeb(hdmi, HDMI_PHY_DRIVER, 0x00);
drivers/gpu/drm/bridge/inno-hdmi.c
517
hdmi_writeb(hdmi, HDMI_PHY_PRE_EMPHASIS, 0x00);
drivers/gpu/drm/bridge/inno-hdmi.c
518
hdmi_writeb(hdmi, HDMI_PHY_CHG_PWR, 0x00);
drivers/gpu/drm/bridge/inno-hdmi.c
519
hdmi_writeb(hdmi, HDMI_PHY_SYS_CTL, 0x15);
drivers/gpu/drm/bridge/inno-hdmi.c
522
static void inno_hdmi_power_up(struct inno_hdmi *hdmi,
drivers/gpu/drm/bridge/inno-hdmi.c
526
int ret = inno_hdmi_find_phy_config(hdmi, mpixelclock);
drivers/gpu/drm/bridge/inno-hdmi.c
529
phy_config = hdmi->plat_data->default_phy_config;
drivers/gpu/drm/bridge/inno-hdmi.c
530
DRM_DEV_ERROR(hdmi->dev,
drivers/gpu/drm/bridge/inno-hdmi.c
534
phy_config = &hdmi->plat_data->phy_configs[ret];
drivers/gpu/drm/bridge/inno-hdmi.c
537
inno_hdmi_sys_power(hdmi, false);
drivers/gpu/drm/bridge/inno-hdmi.c
539
hdmi_writeb(hdmi, HDMI_PHY_PRE_EMPHASIS, phy_config->pre_emphasis);
drivers/gpu/drm/bridge/inno-hdmi.c
540
hdmi_writeb(hdmi, HDMI_PHY_DRIVER, phy_config->voltage_level_control);
drivers/gpu/drm/bridge/inno-hdmi.c
541
hdmi_writeb(hdmi, HDMI_PHY_SYS_CTL, 0x15);
drivers/gpu/drm/bridge/inno-hdmi.c
542
hdmi_writeb(hdmi, HDMI_PHY_SYS_CTL, 0x14);
drivers/gpu/drm/bridge/inno-hdmi.c
543
hdmi_writeb(hdmi, HDMI_PHY_SYS_CTL, 0x10);
drivers/gpu/drm/bridge/inno-hdmi.c
544
hdmi_writeb(hdmi, HDMI_PHY_CHG_PWR, 0x0f);
drivers/gpu/drm/bridge/inno-hdmi.c
545
hdmi_writeb(hdmi, HDMI_PHY_SYNC, 0x00);
drivers/gpu/drm/bridge/inno-hdmi.c
546
hdmi_writeb(hdmi, HDMI_PHY_SYNC, 0x01);
drivers/gpu/drm/bridge/inno-hdmi.c
548
inno_hdmi_sys_power(hdmi, true);
drivers/gpu/drm/bridge/inno-hdmi.c
551
static void inno_hdmi_init_hw(struct inno_hdmi *hdmi)
drivers/gpu/drm/bridge/inno-hdmi.c
556
hdmi_modb(hdmi, HDMI_SYS_CTRL, m_RST_DIGITAL, v_NOT_RST_DIGITAL);
drivers/gpu/drm/bridge/inno-hdmi.c
559
hdmi_modb(hdmi, HDMI_SYS_CTRL, m_RST_ANALOG, v_NOT_RST_ANALOG);
drivers/gpu/drm/bridge/inno-hdmi.c
564
hdmi_modb(hdmi, HDMI_SYS_CTRL, msk, val);
drivers/gpu/drm/bridge/inno-hdmi.c
566
inno_hdmi_standby(hdmi);
drivers/gpu/drm/bridge/inno-hdmi.c
575
if (hdmi->refclk)
drivers/gpu/drm/bridge/inno-hdmi.c
576
inno_hdmi_i2c_init(hdmi, clk_get_rate(hdmi->refclk));
drivers/gpu/drm/bridge/inno-hdmi.c
578
inno_hdmi_i2c_init(hdmi, clk_get_rate(hdmi->pclk));
drivers/gpu/drm/bridge/inno-hdmi.c
581
hdmi_modb(hdmi, HDMI_STATUS, m_MASK_INT_HOTPLUG, v_MASK_INT_HOTPLUG(1));
drivers/gpu/drm/bridge/inno-hdmi.c
586
struct inno_hdmi *hdmi = bridge_to_inno_hdmi(bridge);
drivers/gpu/drm/bridge/inno-hdmi.c
588
hdmi_writeb(hdmi, HDMI_CONTROL_PACKET_BUF_INDEX, INFOFRAME_AVI);
drivers/gpu/drm/bridge/inno-hdmi.c
596
struct inno_hdmi *hdmi = bridge_to_inno_hdmi(bridge);
drivers/gpu/drm/bridge/inno-hdmi.c
602
hdmi_writeb(hdmi, HDMI_CONTROL_PACKET_ADDR + i, buffer[i]);
drivers/gpu/drm/bridge/inno-hdmi.c
622
static int inno_hdmi_config_video_csc(struct inno_hdmi *hdmi,
drivers/gpu/drm/bridge/inno-hdmi.c
644
hdmi_writeb(hdmi, HDMI_VIDEO_CONTRL1, v_DE_EXTERNAL |
drivers/gpu/drm/bridge/inno-hdmi.c
651
hdmi_writeb(hdmi, HDMI_VIDEO_CONTRL2, value);
drivers/gpu/drm/bridge/inno-hdmi.c
653
if (conn_state->hdmi.output_format == DRM_OUTPUT_COLOR_FORMAT_RGB444) {
drivers/gpu/drm/bridge/inno-hdmi.c
654
if (conn_state->hdmi.is_limited_range) {
drivers/gpu/drm/bridge/inno-hdmi.c
662
hdmi_writeb(hdmi, HDMI_VIDEO_CONTRL3, value);
drivers/gpu/drm/bridge/inno-hdmi.c
664
hdmi_modb(hdmi, HDMI_VIDEO_CONTRL,
drivers/gpu/drm/bridge/inno-hdmi.c
672
if (conn_state->hdmi.output_format == DRM_OUTPUT_COLOR_FORMAT_YCBCR444) {
drivers/gpu/drm/bridge/inno-hdmi.c
679
if (conn_state->hdmi.output_format == DRM_OUTPUT_COLOR_FORMAT_YCBCR444) {
drivers/gpu/drm/bridge/inno-hdmi.c
689
hdmi_writeb(hdmi, HDMI_VIDEO_CSC_COEF + i, coeff_csc[csc_mode][i]);
drivers/gpu/drm/bridge/inno-hdmi.c
692
hdmi_writeb(hdmi, HDMI_VIDEO_CONTRL3, value);
drivers/gpu/drm/bridge/inno-hdmi.c
693
hdmi_modb(hdmi, HDMI_VIDEO_CONTRL, m_VIDEO_AUTO_CSC |
drivers/gpu/drm/bridge/inno-hdmi.c
700
static int inno_hdmi_config_video_timing(struct inno_hdmi *hdmi,
drivers/gpu/drm/bridge/inno-hdmi.c
703
const struct inno_hdmi_plat_ops *plat_ops = hdmi->plat_data->ops;
drivers/gpu/drm/bridge/inno-hdmi.c
707
plat_ops->enable(hdmi->dev, mode);
drivers/gpu/drm/bridge/inno-hdmi.c
717
hdmi_writeb(hdmi, HDMI_VIDEO_TIMING_CTL, value);
drivers/gpu/drm/bridge/inno-hdmi.c
721
hdmi_writeb(hdmi, HDMI_VIDEO_EXT_HTOTAL_L, value & 0xFF);
drivers/gpu/drm/bridge/inno-hdmi.c
722
hdmi_writeb(hdmi, HDMI_VIDEO_EXT_HTOTAL_H, (value >> 8) & 0xFF);
drivers/gpu/drm/bridge/inno-hdmi.c
725
hdmi_writeb(hdmi, HDMI_VIDEO_EXT_HBLANK_L, value & 0xFF);
drivers/gpu/drm/bridge/inno-hdmi.c
726
hdmi_writeb(hdmi, HDMI_VIDEO_EXT_HBLANK_H, (value >> 8) & 0xFF);
drivers/gpu/drm/bridge/inno-hdmi.c
729
hdmi_writeb(hdmi, HDMI_VIDEO_EXT_HDELAY_L, value & 0xFF);
drivers/gpu/drm/bridge/inno-hdmi.c
730
hdmi_writeb(hdmi, HDMI_VIDEO_EXT_HDELAY_H, (value >> 8) & 0xFF);
drivers/gpu/drm/bridge/inno-hdmi.c
733
hdmi_writeb(hdmi, HDMI_VIDEO_EXT_HDURATION_L, value & 0xFF);
drivers/gpu/drm/bridge/inno-hdmi.c
734
hdmi_writeb(hdmi, HDMI_VIDEO_EXT_HDURATION_H, (value >> 8) & 0xFF);
drivers/gpu/drm/bridge/inno-hdmi.c
737
hdmi_writeb(hdmi, HDMI_VIDEO_EXT_VTOTAL_L, value & 0xFF);
drivers/gpu/drm/bridge/inno-hdmi.c
738
hdmi_writeb(hdmi, HDMI_VIDEO_EXT_VTOTAL_H, (value >> 8) & 0xFF);
drivers/gpu/drm/bridge/inno-hdmi.c
741
hdmi_writeb(hdmi, HDMI_VIDEO_EXT_VBLANK, value & 0xFF);
drivers/gpu/drm/bridge/inno-hdmi.c
744
hdmi_writeb(hdmi, HDMI_VIDEO_EXT_VDELAY, value & 0xFF);
drivers/gpu/drm/bridge/inno-hdmi.c
747
hdmi_writeb(hdmi, HDMI_VIDEO_EXT_VDURATION, value & 0xFF);
drivers/gpu/drm/bridge/inno-hdmi.c
749
hdmi_writeb(hdmi, HDMI_PHY_PRE_DIV_RATIO, 0x1e);
drivers/gpu/drm/bridge/inno-hdmi.c
750
hdmi_writeb(hdmi, HDMI_PHY_FEEDBACK_DIV_RATIO_LOW, 0x2c);
drivers/gpu/drm/bridge/inno-hdmi.c
751
hdmi_writeb(hdmi, HDMI_PHY_FEEDBACK_DIV_RATIO_HIGH, 0x01);
drivers/gpu/drm/bridge/inno-hdmi.c
756
static int inno_hdmi_setup(struct inno_hdmi *hdmi, struct drm_atomic_commit *state)
drivers/gpu/drm/bridge/inno-hdmi.c
758
struct drm_bridge *bridge = &hdmi->bridge;
drivers/gpu/drm/bridge/inno-hdmi.c
777
hdmi_modb(hdmi, HDMI_AV_MUTE, m_AUDIO_MUTE | m_VIDEO_BLACK,
drivers/gpu/drm/bridge/inno-hdmi.c
781
hdmi_writeb(hdmi, HDMI_HDCP_CTRL, v_HDMI_DVI(info->is_hdmi));
drivers/gpu/drm/bridge/inno-hdmi.c
783
inno_hdmi_config_video_timing(hdmi, &new_crtc_state->adjusted_mode);
drivers/gpu/drm/bridge/inno-hdmi.c
785
inno_hdmi_config_video_csc(hdmi, connector, &new_crtc_state->adjusted_mode);
drivers/gpu/drm/bridge/inno-hdmi.c
795
inno_hdmi_i2c_init(hdmi, new_conn_state->hdmi.tmds_char_rate);
drivers/gpu/drm/bridge/inno-hdmi.c
798
hdmi_modb(hdmi, HDMI_AV_MUTE, m_AUDIO_MUTE | m_VIDEO_BLACK,
drivers/gpu/drm/bridge/inno-hdmi.c
801
inno_hdmi_power_up(hdmi, new_conn_state->hdmi.tmds_char_rate);
drivers/gpu/drm/bridge/inno-hdmi.c
810
struct inno_hdmi *hdmi = bridge_to_inno_hdmi(bridge);
drivers/gpu/drm/bridge/inno-hdmi.c
823
if (inno_hdmi_find_phy_config(hdmi, mpixelclk) < 0)
drivers/gpu/drm/bridge/inno-hdmi.c
826
if (hdmi->refclk) {
drivers/gpu/drm/bridge/inno-hdmi.c
827
rounded_refclk = clk_round_rate(hdmi->refclk, mpixelclk);
drivers/gpu/drm/bridge/inno-hdmi.c
843
struct inno_hdmi *hdmi = bridge_to_inno_hdmi(bridge);
drivers/gpu/drm/bridge/inno-hdmi.c
845
return (hdmi_readb(hdmi, HDMI_STATUS) & m_HOTPLUG) ?
drivers/gpu/drm/bridge/inno-hdmi.c
852
struct inno_hdmi *hdmi = bridge_to_inno_hdmi(bridge);
drivers/gpu/drm/bridge/inno-hdmi.c
857
dev_dbg(hdmi->dev, "failed to get edid\n");
drivers/gpu/drm/bridge/inno-hdmi.c
865
struct inno_hdmi *hdmi = bridge_to_inno_hdmi(bridge);
drivers/gpu/drm/bridge/inno-hdmi.c
867
inno_hdmi_setup(hdmi, state);
drivers/gpu/drm/bridge/inno-hdmi.c
873
struct inno_hdmi *hdmi = bridge_to_inno_hdmi(bridge);
drivers/gpu/drm/bridge/inno-hdmi.c
875
inno_hdmi_standby(hdmi);
drivers/gpu/drm/bridge/inno-hdmi.c
893
static irqreturn_t inno_hdmi_i2c_irq(struct inno_hdmi *hdmi)
drivers/gpu/drm/bridge/inno-hdmi.c
895
struct inno_hdmi_i2c *i2c = hdmi->i2c;
drivers/gpu/drm/bridge/inno-hdmi.c
898
stat = hdmi_readb(hdmi, HDMI_INTERRUPT_STATUS1);
drivers/gpu/drm/bridge/inno-hdmi.c
903
hdmi_writeb(hdmi, HDMI_INTERRUPT_STATUS1, m_INT_EDID_READY);
drivers/gpu/drm/bridge/inno-hdmi.c
912
struct inno_hdmi *hdmi = dev_id;
drivers/gpu/drm/bridge/inno-hdmi.c
916
if (hdmi->i2c)
drivers/gpu/drm/bridge/inno-hdmi.c
917
ret = inno_hdmi_i2c_irq(hdmi);
drivers/gpu/drm/bridge/inno-hdmi.c
919
interrupt = hdmi_readb(hdmi, HDMI_STATUS);
drivers/gpu/drm/bridge/inno-hdmi.c
921
hdmi_modb(hdmi, HDMI_STATUS, m_INT_HOTPLUG, m_INT_HOTPLUG);
drivers/gpu/drm/bridge/inno-hdmi.c
930
struct inno_hdmi *hdmi = dev_id;
drivers/gpu/drm/bridge/inno-hdmi.c
932
drm_helper_hpd_irq_event(hdmi->bridge.dev);
drivers/gpu/drm/bridge/inno-hdmi.c
937
static int inno_hdmi_i2c_read(struct inno_hdmi *hdmi, struct i2c_msg *msgs)
drivers/gpu/drm/bridge/inno-hdmi.c
943
ret = wait_for_completion_timeout(&hdmi->i2c->cmp, HZ / 10);
drivers/gpu/drm/bridge/inno-hdmi.c
948
*buf++ = hdmi_readb(hdmi, HDMI_EDID_FIFO_ADDR);
drivers/gpu/drm/bridge/inno-hdmi.c
953
static int inno_hdmi_i2c_write(struct inno_hdmi *hdmi, struct i2c_msg *msgs)
drivers/gpu/drm/bridge/inno-hdmi.c
963
reinit_completion(&hdmi->i2c->cmp);
drivers/gpu/drm/bridge/inno-hdmi.c
966
hdmi->i2c->segment_addr = msgs->buf[0];
drivers/gpu/drm/bridge/inno-hdmi.c
968
hdmi->i2c->ddc_addr = msgs->buf[0];
drivers/gpu/drm/bridge/inno-hdmi.c
971
hdmi_writeb(hdmi, HDMI_EDID_FIFO_OFFSET, 0x00);
drivers/gpu/drm/bridge/inno-hdmi.c
974
hdmi_writeb(hdmi, HDMI_EDID_WORD_ADDR, hdmi->i2c->ddc_addr);
drivers/gpu/drm/bridge/inno-hdmi.c
977
hdmi_writeb(hdmi, HDMI_EDID_SEGMENT_POINTER, hdmi->i2c->segment_addr);
drivers/gpu/drm/bridge/inno-hdmi.c
985
struct inno_hdmi *hdmi = i2c_get_adapdata(adap);
drivers/gpu/drm/bridge/inno-hdmi.c
986
struct inno_hdmi_i2c *i2c = hdmi->i2c;
drivers/gpu/drm/bridge/inno-hdmi.c
992
hdmi_writeb(hdmi, HDMI_INTERRUPT_MASK1, m_INT_EDID_READY);
drivers/gpu/drm/bridge/inno-hdmi.c
993
hdmi_writeb(hdmi, HDMI_INTERRUPT_STATUS1, m_INT_EDID_READY);
drivers/gpu/drm/bridge/inno-hdmi.c
996
DRM_DEV_DEBUG(hdmi->dev,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c
329
eld = dw->data.get_eld(dw->data.hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c
450
dw_hdmi_set_sample_rate(dw->data.hdmi, runtime->rate);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c
463
dw_hdmi_set_channel_count(dw->data.hdmi, runtime->channels);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c
464
dw_hdmi_set_channel_allocation(dw->data.hdmi, ca);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c
498
dw_hdmi_audio_enable(dw->data.hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c
507
dw_hdmi_audio_disable(dw->data.hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-audio.h
11
struct dw_hdmi *hdmi;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-audio.h
12
u8 *(*get_eld)(struct dw_hdmi *hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-audio.h
16
struct dw_hdmi *hdmi;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-audio.h
18
void (*write)(struct dw_hdmi *hdmi, u8 val, int offset);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-audio.h
19
u8 (*read)(struct dw_hdmi *hdmi, int offset);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-audio.h
20
u8 *(*get_eld)(struct dw_hdmi *hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c
203
cec->ops->disable(cec->hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c
213
cec->ops->enable(cec->hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c
257
cec->hdmi = data->hdmi;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c
55
struct dw_hdmi *hdmi;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c
73
cec->ops->write(cec->hdmi, val, offset);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c
78
return cec->ops->read(cec->hdmi, offset);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.h
10
void (*disable)(struct dw_hdmi *hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.h
14
struct dw_hdmi *hdmi;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.h
7
void (*write)(struct dw_hdmi *hdmi, u8 val, int offset);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.h
8
u8 (*read)(struct dw_hdmi *hdmi, int offset);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.h
9
void (*enable)(struct dw_hdmi *hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-gp-audio.c
111
dw_hdmi_audio_enable(dw->data.hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-gp-audio.c
113
dw_hdmi_audio_disable(dw->data.hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-gp-audio.c
124
eld = audio->get_eld(audio->hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-gp-audio.c
140
return dw_hdmi_set_plugged_cb(dw->data.hdmi, fn, codec_dev);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-gp-audio.c
82
dw_hdmi_set_sample_rate(dw->data.hdmi, params->sample_rate);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-gp-audio.c
86
dw_hdmi_set_channel_count(dw->data.hdmi, params->channels);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-gp-audio.c
87
dw_hdmi_set_channel_allocation(dw->data.hdmi, ca);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-gp-audio.c
89
dw_hdmi_set_sample_non_pcm(dw->data.hdmi,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-gp-audio.c
91
dw_hdmi_set_sample_width(dw->data.hdmi, params->sample_width);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-gp-audio.c
94
dw_hdmi_set_sample_iec958(dw->data.hdmi, 1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-gp-audio.c
96
dw_hdmi_set_sample_iec958(dw->data.hdmi, 0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
104
dw_hdmi_set_sample_rate(hdmi, hparms->sample_rate);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
105
dw_hdmi_set_channel_status(hdmi, hparms->iec.status);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
106
dw_hdmi_set_channel_count(hdmi, hparms->channels);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
107
dw_hdmi_set_channel_allocation(hdmi, hparms->cea.channel_allocation);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
119
struct dw_hdmi *hdmi = audio->hdmi;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
121
dw_hdmi_audio_enable(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
129
struct dw_hdmi *hdmi = audio->hdmi;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
131
dw_hdmi_audio_disable(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
140
eld = audio->get_eld(audio->hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
176
struct dw_hdmi *hdmi = audio->hdmi;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
178
return dw_hdmi_set_plugged_cb(hdmi, fn, codec_dev);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
25
struct dw_hdmi *hdmi = audio->hdmi;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
27
audio->write(hdmi, val, offset);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
32
struct dw_hdmi *hdmi = audio->hdmi;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
34
return audio->read(hdmi, offset);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
42
struct dw_hdmi *hdmi = audio->hdmi;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1005
dw_hdmi_qp_write_infoframe(hdmi, buffer, len, PKT_AUDI_CONTENTS0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1008
dw_hdmi_qp_mod(hdmi,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1014
dw_hdmi_qp_mod(hdmi, PKTSCHED_AUDS_TX_EN, PKTSCHED_AUDS_TX_EN, PKTSCHED_PKT_EN);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1022
struct dw_hdmi_qp *hdmi = dev_id;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1023
struct dw_hdmi_qp_cec *cec = hdmi->cec;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1027
stat = dw_hdmi_qp_read(hdmi, CEC_INT_STATUS);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1031
dw_hdmi_qp_write(hdmi, stat, CEC_INT_CLEAR);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1050
val = dw_hdmi_qp_read(hdmi, CEC_RX_COUNT_STATUS);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1057
val = dw_hdmi_qp_read(hdmi, CEC_RX_DATA3_0 + i * 4);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1064
dw_hdmi_qp_write(hdmi, 1, CEC_LOCK_CONTROL);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1077
struct dw_hdmi_qp *hdmi = dev_id;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1078
struct dw_hdmi_qp_cec *cec = hdmi->cec;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1097
struct dw_hdmi_qp *hdmi = dw_hdmi_qp_from_bridge(bridge);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1098
struct dw_hdmi_qp_cec *cec = hdmi->cec;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1102
dw_hdmi_qp_write(hdmi, 0, CEC_TX_COUNT);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1103
dw_hdmi_qp_write(hdmi, ~0, CEC_INT_CLEAR);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1104
dw_hdmi_qp_write(hdmi, 0, CEC_INT_MASK_N);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1106
return devm_request_threaded_irq(hdmi->dev, cec->irq,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1109
dev_name(hdmi->dev), hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1114
struct dw_hdmi_qp *hdmi = dw_hdmi_qp_from_bridge(bridge);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1115
struct dw_hdmi_qp_cec *cec = hdmi->cec;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1122
dw_hdmi_qp_write(hdmi, cec->addresses, CEC_ADDR);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1129
struct dw_hdmi_qp *hdmi = dw_hdmi_qp_from_bridge(bridge);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1134
dw_hdmi_qp_write(hdmi, 0, CEC_INT_MASK_N);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1135
dw_hdmi_qp_write(hdmi, ~0, CEC_INT_CLEAR);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1137
swdisable = dw_hdmi_qp_read(hdmi, GLOBAL_SWDISABLE);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1139
dw_hdmi_qp_write(hdmi, swdisable, GLOBAL_SWDISABLE);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1141
swdisable = dw_hdmi_qp_read(hdmi, GLOBAL_SWDISABLE);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1143
dw_hdmi_qp_write(hdmi, swdisable, GLOBAL_SWDISABLE);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1145
dw_hdmi_qp_write(hdmi, ~0, CEC_INT_CLEAR);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1146
dw_hdmi_qp_write(hdmi, 1, CEC_LOCK_CONTROL);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1152
dw_hdmi_qp_write(hdmi, ~0, CEC_INT_CLEAR);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1153
dw_hdmi_qp_write(hdmi, irqs, CEC_INT_MASK_N);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1162
struct dw_hdmi_qp *hdmi = dw_hdmi_qp_from_bridge(bridge);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1177
dw_hdmi_qp_write(hdmi, val, CEC_TX_DATA3_0 + (i / 4) * 4);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1180
dw_hdmi_qp_write(hdmi, msg->len - 1, CEC_TX_COUNT);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1181
dw_hdmi_qp_write(hdmi, CEC_CTRL_START, CEC_TX_CONTROL);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1222
struct dw_hdmi_qp *hdmi = dev_id;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1223
struct dw_hdmi_qp_i2c *i2c = hdmi->i2c;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1226
stat = dw_hdmi_qp_read(hdmi, MAINUNIT_1_INT_STATUS);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1232
dw_hdmi_qp_write(hdmi, i2c->stat, MAINUNIT_1_INT_CLEAR);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1249
static void dw_hdmi_qp_init_hw(struct dw_hdmi_qp *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1251
dw_hdmi_qp_write(hdmi, 0, MAINUNIT_0_INT_MASK_N);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1252
dw_hdmi_qp_write(hdmi, 0, MAINUNIT_1_INT_MASK_N);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1253
dw_hdmi_qp_write(hdmi, hdmi->ref_clk_rate, TIMER_BASE_CONFIG0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1256
dw_hdmi_qp_write(hdmi, 0x01, I2CM_CONTROL0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1257
dw_hdmi_qp_write(hdmi, 0x085c085c, I2CM_FM_SCL_CONFIG0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1258
dw_hdmi_qp_mod(hdmi, 0, I2CM_FM_EN, I2CM_INTERFACE_CONTROL0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1261
dw_hdmi_qp_write(hdmi, I2CM_OP_DONE_CLEAR | I2CM_NACK_RCVD_CLEAR,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1264
if (hdmi->phy.ops->setup_hpd)
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1265
hdmi->phy.ops->setup_hpd(hdmi, hdmi->phy.data);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1273
struct dw_hdmi_qp *hdmi;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1283
hdmi = devm_drm_bridge_alloc(dev, struct dw_hdmi_qp, bridge,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1285
if (IS_ERR(hdmi))
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1286
return ERR_CAST(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1288
hdmi->dev = dev;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1294
hdmi->regm = devm_regmap_init_mmio(dev, regs, &dw_hdmi_qp_regmap_config);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1295
if (IS_ERR(hdmi->regm)) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1297
return ERR_CAST(hdmi->regm);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1300
hdmi->phy.ops = plat_data->phy_ops;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1301
hdmi->phy.data = plat_data->phy_data;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1304
hdmi->ref_clk_rate = plat_data->ref_clk_rate;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1306
hdmi->ref_clk_rate = 428571429;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1310
dw_hdmi_qp_init_hw(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1312
hdmi->main_irq = plat_data->main_irq;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1315
IRQF_SHARED, dev_name(dev), hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1319
hdmi->no_hpd = device_property_read_bool(dev, "no-hpd");
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1321
hdmi->bridge.driver_private = hdmi;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1322
hdmi->bridge.ops = DRM_BRIDGE_OP_DETECT |
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1328
if (!hdmi->no_hpd)
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1329
hdmi->bridge.ops |= DRM_BRIDGE_OP_HPD;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1330
hdmi->bridge.of_node = pdev->dev.of_node;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1331
hdmi->bridge.type = DRM_MODE_CONNECTOR_HDMIA;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1332
hdmi->bridge.vendor = "Synopsys";
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1333
hdmi->bridge.product = "DW HDMI QP TX";
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1336
hdmi->bridge.supported_formats = plat_data->supported_formats;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1339
hdmi->bridge.max_bpc = plat_data->max_bpc;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1341
hdmi->bridge.ddc = dw_hdmi_qp_i2c_adapter(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1342
if (IS_ERR(hdmi->bridge.ddc))
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1343
return ERR_CAST(hdmi->bridge.ddc);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1345
hdmi->bridge.hdmi_audio_max_i2s_playback_channels = 8;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1346
hdmi->bridge.hdmi_audio_dev = dev;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1347
hdmi->bridge.hdmi_audio_dai_port = 1;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1351
hdmi->bridge.ops |= DRM_BRIDGE_OP_HDMI_CEC_ADAPTER;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1352
hdmi->bridge.hdmi_cec_dev = dev;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1353
hdmi->bridge.hdmi_cec_adapter_name = dev_name(dev);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1355
hdmi->cec = devm_kzalloc(hdmi->dev, sizeof(*hdmi->cec), GFP_KERNEL);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1356
if (!hdmi->cec)
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1359
hdmi->cec->irq = plat_data->cec_irq;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1365
ret = devm_drm_bridge_add(dev, &hdmi->bridge);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1369
ret = drm_bridge_attach(encoder, &hdmi->bridge, NULL,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1374
return hdmi;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1378
void dw_hdmi_qp_suspend(struct device *dev, struct dw_hdmi_qp *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1380
disable_irq(hdmi->main_irq);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1384
void dw_hdmi_qp_resume(struct device *dev, struct dw_hdmi_qp *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1386
dw_hdmi_qp_init_hw(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
1387
enable_irq(hdmi->main_irq);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
172
static void dw_hdmi_qp_write(struct dw_hdmi_qp *hdmi, unsigned int val,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
175
regmap_write(hdmi->regm, offset, val);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
178
static unsigned int dw_hdmi_qp_read(struct dw_hdmi_qp *hdmi, int offset)
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
182
regmap_read(hdmi->regm, offset, &val);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
187
static void dw_hdmi_qp_mod(struct dw_hdmi_qp *hdmi, unsigned int data,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
190
regmap_update_bits(hdmi->regm, reg, mask, data);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
198
static void dw_hdmi_qp_set_cts_n(struct dw_hdmi_qp *hdmi, unsigned int cts,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
202
dw_hdmi_qp_mod(hdmi, n, AUDPKT_ACR_N_VALUE, AUDPKT_ACR_CONTROL0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
206
dw_hdmi_qp_mod(hdmi, AUDPKT_ACR_CTS_OVR_EN, AUDPKT_ACR_CTS_OVR_EN_MSK,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
209
dw_hdmi_qp_mod(hdmi, 0, AUDPKT_ACR_CTS_OVR_EN_MSK,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
212
dw_hdmi_qp_mod(hdmi, AUDPKT_ACR_CTS_OVR_VAL(cts), AUDPKT_ACR_CTS_OVR_VAL_MSK,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
216
static int dw_hdmi_qp_match_tmds_n_table(struct dw_hdmi_qp *hdmi,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
257
static unsigned int dw_hdmi_qp_compute_n(struct dw_hdmi_qp *hdmi,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
294
static unsigned int dw_hdmi_qp_find_n(struct dw_hdmi_qp *hdmi, unsigned long pixel_clk,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
297
int n = dw_hdmi_qp_match_tmds_n_table(hdmi, pixel_clk, sample_rate);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
302
dev_warn(hdmi->dev, "Rate %lu missing; compute N dynamically\n",
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
305
return dw_hdmi_qp_compute_n(hdmi, pixel_clk, sample_rate);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
308
static unsigned int dw_hdmi_qp_find_cts(struct dw_hdmi_qp *hdmi, unsigned long pixel_clk,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
340
static void dw_hdmi_qp_set_audio_interface(struct dw_hdmi_qp *hdmi,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
347
dw_hdmi_qp_write(hdmi, AVP_DATAPATH_PACKET_AUDIO_SWINIT_P, GLOBAL_SWRESET_REQUEST);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
350
dw_hdmi_qp_mod(hdmi, 0,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
355
dw_hdmi_qp_write(hdmi, AUDIO_FIFO_CLR_P, AUDIO_INTERFACE_CONTROL0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
358
dw_hdmi_qp_mod(hdmi, AUD_IF_I2S, AUD_IF_SEL_MSK, AUDIO_INTERFACE_CONFIG0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
376
dw_hdmi_qp_mod(hdmi, conf0, I2S_LINES_EN_MSK, AUDIO_INTERFACE_CONFIG0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
392
dw_hdmi_qp_mod(hdmi, conf0, I2S_BPCUV_RCV_MSK | AUD_FORMAT_MSK,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
396
dw_hdmi_qp_mod(hdmi, AUD_FIFO_INIT_ON_OVF_EN, AUD_FIFO_INIT_ON_OVF_MSK,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
408
static void dw_hdmi_qp_set_channel_status(struct dw_hdmi_qp *hdmi,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
433
if ((dw_hdmi_qp_read(hdmi, AUDIO_INTERFACE_CONFIG0) & GENMASK(25, 24)) == AUD_HBR) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
439
dw_hdmi_qp_write(hdmi, channel_status[0] | (channel_status[1] << 8),
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
442
regmap_bulk_write(hdmi->regm, AUDPKT_CHSTATUS_OVR1, &channel_status[3], 1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
445
dw_hdmi_qp_mod(hdmi, 0,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
449
dw_hdmi_qp_mod(hdmi, AUDPKT_PBIT_FORCE_EN | AUDPKT_CHSTATUS_OVR_EN,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
454
static void dw_hdmi_qp_set_sample_rate(struct dw_hdmi_qp *hdmi, unsigned long long tmds_char_rate,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
459
n = dw_hdmi_qp_find_n(hdmi, tmds_char_rate, sample_rate);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
460
cts = dw_hdmi_qp_find_cts(hdmi, tmds_char_rate, sample_rate);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
462
dw_hdmi_qp_set_cts_n(hdmi, cts, n);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
468
struct dw_hdmi_qp *hdmi = dw_hdmi_qp_from_bridge(bridge);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
470
if (hdmi->tmds_char_rate)
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
471
dw_hdmi_qp_mod(hdmi, 0, AVP_DATAPATH_PACKET_AUDIO_SWDISABLE, GLOBAL_SWDISABLE);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
481
struct dw_hdmi_qp *hdmi = dw_hdmi_qp_from_bridge(bridge);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
484
if (!hdmi->tmds_char_rate)
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
488
dev_err(hdmi->dev, "unsupported clock settings\n");
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
495
dw_hdmi_qp_set_audio_interface(hdmi, fmt, hparms);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
496
dw_hdmi_qp_set_sample_rate(hdmi, hdmi->tmds_char_rate, hparms->sample_rate);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
497
dw_hdmi_qp_set_channel_status(hdmi, hparms->iec.status, ref2stream);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
503
static void dw_hdmi_qp_audio_disable_regs(struct dw_hdmi_qp *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
512
dw_hdmi_qp_mod(hdmi, I2S_BPCUV_RCV_DIS, I2S_BPCUV_RCV_MSK,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
514
dw_hdmi_qp_mod(hdmi, AUDPKT_PBIT_FORCE_EN | AUDPKT_CHSTATUS_OVR_EN,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
518
dw_hdmi_qp_mod(hdmi, AVP_DATAPATH_PACKET_AUDIO_SWDISABLE,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
525
struct dw_hdmi_qp *hdmi = dw_hdmi_qp_from_bridge(bridge);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
529
if (hdmi->tmds_char_rate)
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
530
dw_hdmi_qp_audio_disable_regs(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
533
static int dw_hdmi_qp_i2c_read(struct dw_hdmi_qp *hdmi,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
536
struct dw_hdmi_qp_i2c *i2c = hdmi->i2c;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
540
dev_dbg(hdmi->dev, "set read register address to 0\n");
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
548
dw_hdmi_qp_mod(hdmi, i2c->slave_reg++ << 12, I2CM_ADDR,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
552
dw_hdmi_qp_mod(hdmi, I2CM_EXT_READ, I2CM_WR_MASK,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
555
dw_hdmi_qp_mod(hdmi, I2CM_FM_READ, I2CM_WR_MASK,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
560
if (hdmi->no_hpd)
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
561
dev_dbg_ratelimited(hdmi->dev,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
564
dev_err(hdmi->dev, "i2c read timed out\n");
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
565
dw_hdmi_qp_write(hdmi, 0x01, I2CM_CONTROL0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
571
if (hdmi->no_hpd)
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
572
dev_dbg_ratelimited(hdmi->dev,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
575
dev_err(hdmi->dev, "i2c read error\n");
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
576
dw_hdmi_qp_write(hdmi, 0x01, I2CM_CONTROL0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
580
*buf++ = dw_hdmi_qp_read(hdmi, I2CM_INTERFACE_RDDATA_0_3) & 0xff;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
581
dw_hdmi_qp_mod(hdmi, 0, I2CM_WR_MASK, I2CM_INTERFACE_CONTROL0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
589
static int dw_hdmi_qp_i2c_write(struct dw_hdmi_qp *hdmi,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
592
struct dw_hdmi_qp_i2c *i2c = hdmi->i2c;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
606
dw_hdmi_qp_write(hdmi, *buf++, I2CM_INTERFACE_WRDATA_0_3);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
607
dw_hdmi_qp_mod(hdmi, i2c->slave_reg++ << 12, I2CM_ADDR,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
609
dw_hdmi_qp_mod(hdmi, I2CM_FM_WRITE, I2CM_WR_MASK,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
614
dev_err(hdmi->dev, "i2c write time out!\n");
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
615
dw_hdmi_qp_write(hdmi, 0x01, I2CM_CONTROL0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
621
dev_err(hdmi->dev, "i2c write nack!\n");
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
622
dw_hdmi_qp_write(hdmi, 0x01, I2CM_CONTROL0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
626
dw_hdmi_qp_mod(hdmi, 0, I2CM_WR_MASK, I2CM_INTERFACE_CONTROL0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
635
struct dw_hdmi_qp *hdmi = i2c_get_adapdata(adap);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
636
struct dw_hdmi_qp_i2c *i2c = hdmi->i2c;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
651
dev_err(hdmi->dev,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
661
dw_hdmi_qp_mod(hdmi, I2CM_NACK_RCVD_MASK_N | I2CM_OP_DONE_MASK_N,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
669
dw_hdmi_qp_mod(hdmi, addr << 5, I2CM_SLVADDR, I2CM_INTERFACE_CONTROL0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
680
dw_hdmi_qp_mod(hdmi, DDC_SEGMENT_ADDR, I2CM_SEG_ADDR,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
682
dw_hdmi_qp_mod(hdmi, *msgs[i].buf << 7, I2CM_SEG_PTR,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
686
ret = dw_hdmi_qp_i2c_read(hdmi, msgs[i].buf,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
689
ret = dw_hdmi_qp_i2c_write(hdmi, msgs[i].buf,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
700
dw_hdmi_qp_mod(hdmi, 0, I2CM_OP_DONE_MASK_N | I2CM_NACK_RCVD_MASK_N,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
716
static struct i2c_adapter *dw_hdmi_qp_i2c_adapter(struct dw_hdmi_qp *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
722
i2c = devm_kzalloc(hdmi->dev, sizeof(*i2c), GFP_KERNEL);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
731
adap->dev.parent = hdmi->dev;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
735
i2c_set_adapdata(adap, hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
737
ret = devm_i2c_add_adapter(hdmi->dev, adap);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
739
dev_warn(hdmi->dev, "cannot add %s I2C adapter\n", adap->name);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
740
devm_kfree(hdmi->dev, i2c);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
744
hdmi->i2c = i2c;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
745
dev_info(hdmi->dev, "registered %s I2C bus driver\n", adap->name);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
753
struct dw_hdmi_qp *hdmi = bridge->driver_private;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
767
dev_dbg(hdmi->dev, "%s mode=HDMI %s rate=%llu bpc=%u\n", __func__,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
768
drm_hdmi_connector_get_output_format_name(conn_state->hdmi.output_format),
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
769
conn_state->hdmi.tmds_char_rate, conn_state->hdmi.output_bpc);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
771
hdmi->tmds_char_rate = conn_state->hdmi.tmds_char_rate;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
773
dev_dbg(hdmi->dev, "%s mode=DVI\n", __func__);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
777
hdmi->phy.ops->init(hdmi, hdmi->phy.data);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
779
dw_hdmi_qp_mod(hdmi, HDCP2_BYPASS, HDCP2_BYPASS, HDCP2LOGIC_CONFIG0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
780
dw_hdmi_qp_mod(hdmi, op_mode, OPMODE_DVI, LINK_CONFIG0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
788
struct dw_hdmi_qp *hdmi = bridge->driver_private;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
790
hdmi->tmds_char_rate = 0;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
792
hdmi->phy.ops->disable(hdmi, hdmi->phy.data);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
798
struct dw_hdmi_qp *hdmi = bridge->driver_private;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
801
if (hdmi->no_hpd) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
809
return hdmi->phy.ops->read_hpd(hdmi, hdmi->phy.data);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
816
struct dw_hdmi_qp *hdmi = bridge->driver_private;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
821
dev_dbg(hdmi->dev, "failed to get edid\n");
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
831
struct dw_hdmi_qp *hdmi = bridge->driver_private;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
839
dev_dbg(hdmi->dev, "Unsupported TMDS char rate: %lld\n", rate);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
848
struct dw_hdmi_qp *hdmi = bridge->driver_private;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
850
dw_hdmi_qp_mod(hdmi, 0, PKTSCHED_AVI_TX_EN | PKTSCHED_GCP_TX_EN,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
858
struct dw_hdmi_qp *hdmi = bridge->driver_private;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
860
dw_hdmi_qp_mod(hdmi, 0, PKTSCHED_VSI_TX_EN, PKTSCHED_PKT_EN);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
867
struct dw_hdmi_qp *hdmi = bridge->driver_private;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
869
dw_hdmi_qp_mod(hdmi, 0, PKTSCHED_DRMI_TX_EN, PKTSCHED_PKT_EN);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
876
struct dw_hdmi_qp *hdmi = bridge->driver_private;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
878
dw_hdmi_qp_mod(hdmi, 0, PKTSCHED_SPDI_TX_EN, PKTSCHED_PKT_EN);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
885
struct dw_hdmi_qp *hdmi = bridge->driver_private;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
887
dw_hdmi_qp_mod(hdmi, 0,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
896
static void dw_hdmi_qp_write_pkt(struct dw_hdmi_qp *hdmi, const u8 *buffer,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
905
dw_hdmi_qp_write(hdmi, val, reg);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
908
static void dw_hdmi_qp_write_infoframe(struct dw_hdmi_qp *hdmi, const u8 *buffer,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
914
dw_hdmi_qp_write_pkt(hdmi, buffer, 1, 2, reg);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
918
dw_hdmi_qp_write_pkt(hdmi, buffer + 3, i, min(len - i - 3, 4),
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
925
struct dw_hdmi_qp *hdmi = bridge->driver_private;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
929
dw_hdmi_qp_write_infoframe(hdmi, buffer, len, PKT_AVI_CONTENTS0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
931
dw_hdmi_qp_mod(hdmi, 0, PKTSCHED_AVI_FIELDRATE, PKTSCHED_PKT_CONFIG1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
932
dw_hdmi_qp_mod(hdmi, PKTSCHED_AVI_TX_EN | PKTSCHED_GCP_TX_EN,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
941
struct dw_hdmi_qp *hdmi = bridge->driver_private;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
945
dw_hdmi_qp_write_infoframe(hdmi, buffer, len, PKT_VSI_CONTENTS0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
947
dw_hdmi_qp_mod(hdmi, 0, PKTSCHED_VSI_FIELDRATE, PKTSCHED_PKT_CONFIG1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
948
dw_hdmi_qp_mod(hdmi, PKTSCHED_VSI_TX_EN, PKTSCHED_VSI_TX_EN,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
957
struct dw_hdmi_qp *hdmi = bridge->driver_private;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
961
dw_hdmi_qp_write_infoframe(hdmi, buffer, len, PKT_DRMI_CONTENTS0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
963
dw_hdmi_qp_mod(hdmi, 0, PKTSCHED_DRMI_FIELDRATE, PKTSCHED_PKT_CONFIG1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
964
dw_hdmi_qp_mod(hdmi, PKTSCHED_DRMI_TX_EN, PKTSCHED_DRMI_TX_EN,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
973
struct dw_hdmi_qp *hdmi = bridge->driver_private;
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
977
dw_hdmi_qp_write_infoframe(hdmi, buffer, len, PKT_SPDI_CONTENTS0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
979
dw_hdmi_qp_mod(hdmi, PKTSCHED_SPDI_TX_EN, PKTSCHED_SPDI_TX_EN,
drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
988
struct dw_hdmi_qp *hdmi = bridge->driver_private;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1015
static void hdmi_video_sample(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1020
switch (hdmi->hdmi_data.enc_in_bus_format) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1068
hdmi_writeb(hdmi, val, HDMI_TX_INVID0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1074
hdmi_writeb(hdmi, val, HDMI_TX_INSTUFFING);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1075
hdmi_writeb(hdmi, 0x0, HDMI_TX_GYDATA0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1076
hdmi_writeb(hdmi, 0x0, HDMI_TX_GYDATA1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1077
hdmi_writeb(hdmi, 0x0, HDMI_TX_RCRDATA0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1078
hdmi_writeb(hdmi, 0x0, HDMI_TX_RCRDATA1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1079
hdmi_writeb(hdmi, 0x0, HDMI_TX_BCBDATA0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1080
hdmi_writeb(hdmi, 0x0, HDMI_TX_BCBDATA1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1083
static int is_color_space_conversion(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1085
struct hdmi_data_info *hdmi_data = &hdmi->hdmi_data;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1095
static int is_color_space_decimation(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1097
if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format))
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1100
if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format) ||
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1101
hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_in_bus_format))
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1107
static int is_color_space_interpolation(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1109
if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_in_bus_format))
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1112
if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format) ||
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1113
hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format))
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1119
static bool is_csc_needed(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1121
return is_color_space_conversion(hdmi) ||
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1122
is_color_space_decimation(hdmi) ||
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1123
is_color_space_interpolation(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1126
static void dw_hdmi_update_csc_coeffs(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1133
is_input_rgb = hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1134
is_output_rgb = hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1137
if (hdmi->hdmi_data.enc_out_encoding == V4L2_YCBCR_ENC_601)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1142
if (hdmi->hdmi_data.enc_out_encoding == V4L2_YCBCR_ENC_601)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1148
hdmi->hdmi_data.rgb_limited_range) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1158
hdmi_writeb(hdmi, coeff_a & 0xff, HDMI_CSC_COEF_A1_LSB + i * 2);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1159
hdmi_writeb(hdmi, coeff_a >> 8, HDMI_CSC_COEF_A1_MSB + i * 2);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1160
hdmi_writeb(hdmi, coeff_b & 0xff, HDMI_CSC_COEF_B1_LSB + i * 2);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1161
hdmi_writeb(hdmi, coeff_b >> 8, HDMI_CSC_COEF_B1_MSB + i * 2);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1162
hdmi_writeb(hdmi, coeff_c & 0xff, HDMI_CSC_COEF_C1_LSB + i * 2);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1163
hdmi_writeb(hdmi, coeff_c >> 8, HDMI_CSC_COEF_C1_MSB + i * 2);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1166
hdmi_modb(hdmi, csc_scale, HDMI_CSC_SCALE_CSCSCALE_MASK,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1170
static void hdmi_video_csc(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1177
if (is_color_space_interpolation(hdmi))
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1179
else if (is_color_space_decimation(hdmi))
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1182
switch (hdmi_bus_fmt_color_depth(hdmi->hdmi_data.enc_out_bus_format)) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1201
hdmi_writeb(hdmi, interpolation | decimation, HDMI_CSC_CFG);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1202
hdmi_modb(hdmi, color_depth, HDMI_CSC_SCALE_CSC_COLORDE_PTH_MASK,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1205
dw_hdmi_update_csc_coeffs(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1213
static void hdmi_video_packetize(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1218
struct hdmi_data_info *hdmi_data = &hdmi->hdmi_data;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1223
if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format) ||
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1224
hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format) ||
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1225
hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format)) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1227
hdmi->hdmi_data.enc_out_bus_format)) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1245
} else if (hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1247
hdmi->hdmi_data.enc_out_bus_format)) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
127
int (*configure)(struct dw_hdmi *hdmi,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1274
hdmi_writeb(hdmi, val, HDMI_VP_PR_CD);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1282
val = hdmi_readb(hdmi, HDMI_FC_DATAUTO3);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1287
hdmi_writeb(hdmi, val, HDMI_FC_DATAUTO3);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1289
hdmi_modb(hdmi, HDMI_VP_STUFF_PR_STUFFING_STUFFING_MODE,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1301
hdmi_modb(hdmi, vp_conf,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1305
hdmi_modb(hdmi, 1 << HDMI_VP_STUFF_IDEFAULT_PHASE_OFFSET,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1308
hdmi_writeb(hdmi, remap_size, HDMI_VP_REMAP);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1326
hdmi_modb(hdmi, vp_conf,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1330
hdmi_modb(hdmi, HDMI_VP_STUFF_PP_STUFFING_STUFFING_MODE |
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1335
hdmi_modb(hdmi, output_select, HDMI_VP_CONF_OUTPUT_SELECTOR_MASK,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1343
static inline void hdmi_phy_test_clear(struct dw_hdmi *hdmi,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1346
hdmi_modb(hdmi, bit << HDMI_PHY_TST0_TSTCLR_OFFSET,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1350
static bool hdmi_phy_wait_i2c_done(struct dw_hdmi *hdmi, int msec)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1354
while ((val = hdmi_readb(hdmi, HDMI_IH_I2CMPHY_STAT0) & 0x3) == 0) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1359
hdmi_writeb(hdmi, val, HDMI_IH_I2CMPHY_STAT0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1364
void dw_hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1367
hdmi_writeb(hdmi, 0xFF, HDMI_IH_I2CMPHY_STAT0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1368
hdmi_writeb(hdmi, addr, HDMI_PHY_I2CM_ADDRESS_ADDR);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1369
hdmi_writeb(hdmi, (unsigned char)(data >> 8),
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1371
hdmi_writeb(hdmi, (unsigned char)(data >> 0),
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1373
hdmi_writeb(hdmi, HDMI_PHY_I2CM_OPERATION_ADDR_WRITE,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1375
hdmi_phy_wait_i2c_done(hdmi, 1000);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1380
static bool dw_hdmi_support_scdc(struct dw_hdmi *hdmi,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1384
if (hdmi->version < 0x200a)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1388
if (!hdmi->ddc)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1392
if (!display->hdmi.scdc.supported ||
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1393
!display->hdmi.scdc.scrambling.supported)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1400
if (!display->hdmi.scdc.scrambling.low_rates &&
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1420
void dw_hdmi_set_high_tmds_clock_ratio(struct dw_hdmi *hdmi,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1423
unsigned long mtmdsclock = hdmi->hdmi_data.video_mode.mtmdsclock;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1426
if (dw_hdmi_support_scdc(hdmi, display)) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1428
drm_scdc_set_high_tmds_clock_ratio(hdmi->curr_conn, 1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1430
drm_scdc_set_high_tmds_clock_ratio(hdmi->curr_conn, 0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1435
static void dw_hdmi_phy_enable_powerdown(struct dw_hdmi *hdmi, bool enable)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1437
hdmi_mask_writeb(hdmi, !enable, HDMI_PHY_CONF0,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1442
static void dw_hdmi_phy_enable_tmds(struct dw_hdmi *hdmi, u8 enable)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1444
hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1449
static void dw_hdmi_phy_enable_svsret(struct dw_hdmi *hdmi, u8 enable)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1451
hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1456
void dw_hdmi_phy_gen2_pddq(struct dw_hdmi *hdmi, u8 enable)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1458
hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1464
void dw_hdmi_phy_gen2_txpwron(struct dw_hdmi *hdmi, u8 enable)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1466
hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1472
static void dw_hdmi_phy_sel_data_en_pol(struct dw_hdmi *hdmi, u8 enable)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1474
hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1479
static void dw_hdmi_phy_sel_interface_control(struct dw_hdmi *hdmi, u8 enable)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1481
hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1486
void dw_hdmi_phy_gen1_reset(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1489
hdmi_writeb(hdmi, 0, HDMI_MC_PHYRSTZ);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1490
hdmi_writeb(hdmi, HDMI_MC_PHYRSTZ_PHYRSTZ, HDMI_MC_PHYRSTZ);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1494
void dw_hdmi_phy_gen2_reset(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1497
hdmi_writeb(hdmi, HDMI_MC_PHYRSTZ_PHYRSTZ, HDMI_MC_PHYRSTZ);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1498
hdmi_writeb(hdmi, 0, HDMI_MC_PHYRSTZ);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1502
void dw_hdmi_phy_i2c_set_addr(struct dw_hdmi *hdmi, u8 address)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1504
hdmi_phy_test_clear(hdmi, 1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1505
hdmi_writeb(hdmi, address, HDMI_PHY_I2CM_SLAVE_ADDR);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1506
hdmi_phy_test_clear(hdmi, 0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1510
static void dw_hdmi_phy_power_off(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1512
const struct dw_hdmi_phy_data *phy = hdmi->phy.data;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1517
dw_hdmi_phy_enable_tmds(hdmi, 0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1518
dw_hdmi_phy_enable_powerdown(hdmi, true);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1522
dw_hdmi_phy_gen2_txpwron(hdmi, 0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1529
val = hdmi_readb(hdmi, HDMI_PHY_STAT0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1537
dev_warn(hdmi->dev, "PHY failed to power down\n");
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1539
dev_dbg(hdmi->dev, "PHY powered down in %u iterations\n", i);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1541
dw_hdmi_phy_gen2_pddq(hdmi, 1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1544
static int dw_hdmi_phy_power_on(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1546
const struct dw_hdmi_phy_data *phy = hdmi->phy.data;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1551
dw_hdmi_phy_enable_powerdown(hdmi, false);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1554
dw_hdmi_phy_enable_tmds(hdmi, 0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1555
dw_hdmi_phy_enable_tmds(hdmi, 1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1559
dw_hdmi_phy_gen2_txpwron(hdmi, 1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1560
dw_hdmi_phy_gen2_pddq(hdmi, 0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1564
val = hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_TX_PHY_LOCK;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1572
dev_err(hdmi->dev, "PHY PLL failed to lock\n");
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1576
dev_dbg(hdmi->dev, "PHY PLL locked %u iterations\n", i);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1585
static int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1613
dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[0].cpce,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1615
dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[0].gmp,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1617
dw_hdmi_phy_i2c_write(hdmi, curr_ctrl->curr[0],
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1620
dw_hdmi_phy_i2c_write(hdmi, 0, HDMI_3D_TX_PHY_PLLPHBYCTRL);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1621
dw_hdmi_phy_i2c_write(hdmi, HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_FB_CLK,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1624
dw_hdmi_phy_i2c_write(hdmi, phy_config->term, HDMI_3D_TX_PHY_TXTERM);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1625
dw_hdmi_phy_i2c_write(hdmi, phy_config->sym_ctr,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1627
dw_hdmi_phy_i2c_write(hdmi, phy_config->vlev_ctr,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1631
dw_hdmi_phy_i2c_write(hdmi, HDMI_3D_TX_PHY_CKCALCTRL_OVERRIDE,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1637
static int hdmi_phy_configure(struct dw_hdmi *hdmi,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1640
const struct dw_hdmi_phy_data *phy = hdmi->phy.data;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1641
const struct dw_hdmi_plat_data *pdata = hdmi->plat_data;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1642
unsigned long mpixelclock = hdmi->hdmi_data.video_mode.mpixelclock;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1643
unsigned long mtmdsclock = hdmi->hdmi_data.video_mode.mtmdsclock;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1646
dw_hdmi_phy_power_off(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1648
dw_hdmi_set_high_tmds_clock_ratio(hdmi, display);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1652
dw_hdmi_phy_enable_svsret(hdmi, 1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1654
dw_hdmi_phy_gen2_reset(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1656
hdmi_writeb(hdmi, HDMI_MC_HEACPHY_RST_ASSERT, HDMI_MC_HEACPHY_RST);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1658
dw_hdmi_phy_i2c_set_addr(hdmi, HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1662
ret = pdata->configure_phy(hdmi, pdata->priv_data, mpixelclock);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1664
ret = phy->configure(hdmi, pdata, mpixelclock);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1666
dev_err(hdmi->dev, "PHY configuration failed (clock %lu)\n",
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1675
return dw_hdmi_phy_power_on(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1678
static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1686
dw_hdmi_phy_sel_data_en_pol(hdmi, 1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1687
dw_hdmi_phy_sel_interface_control(hdmi, 0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1689
ret = hdmi_phy_configure(hdmi, display);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1697
static void dw_hdmi_phy_disable(struct dw_hdmi *hdmi, void *data)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1699
dw_hdmi_phy_power_off(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1702
enum drm_connector_status dw_hdmi_phy_read_hpd(struct dw_hdmi *hdmi,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1705
return hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_HPD ?
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1710
void dw_hdmi_phy_update_hpd(struct dw_hdmi *hdmi, void *data,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1713
u8 old_mask = hdmi->phy_mask;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1716
hdmi->phy_mask |= HDMI_PHY_RX_SENSE;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1718
hdmi->phy_mask &= ~HDMI_PHY_RX_SENSE;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1720
if (old_mask != hdmi->phy_mask)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1721
hdmi_writeb(hdmi, hdmi->phy_mask, HDMI_PHY_MASK0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1725
void dw_hdmi_phy_setup_hpd(struct dw_hdmi *hdmi, void *data)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1731
hdmi_writeb(hdmi, HDMI_PHY_HPD | HDMI_PHY_RX_SENSE, HDMI_PHY_POL0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1732
hdmi_writeb(hdmi, HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1736
hdmi_writeb(hdmi, hdmi->phy_mask, HDMI_PHY_MASK0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1739
hdmi_writeb(hdmi, HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1741
hdmi_writeb(hdmi, ~(HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE),
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1758
static void hdmi_tx_hdcp_config(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1762
if (hdmi->hdmi_data.video_mode.mdataenablepolarity)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1768
hdmi_modb(hdmi, HDMI_A_HDCPCFG0_RXDETECT_DISABLE,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1771
hdmi_modb(hdmi, de, HDMI_A_VIDPOLCFG_DATAENPOL_MASK, HDMI_A_VIDPOLCFG);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1773
hdmi_modb(hdmi, HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_DISABLE,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1777
static void hdmi_config_AVI(struct dw_hdmi *hdmi,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1787
if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format)) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1789
hdmi->hdmi_data.rgb_limited_range ?
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1798
if (hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format))
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1800
else if (hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format))
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1802
else if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format))
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1808
if (!hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format)) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1809
switch (hdmi->hdmi_data.enc_out_encoding) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1811
if (hdmi->hdmi_data.enc_in_encoding == V4L2_YCBCR_ENC_XV601)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1819
if (hdmi->hdmi_data.enc_in_encoding == V4L2_YCBCR_ENC_XV709)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1856
hdmi_writeb(hdmi, val, HDMI_FC_AVICONF0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1862
hdmi_writeb(hdmi, val, HDMI_FC_AVICONF1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1870
hdmi_writeb(hdmi, val, HDMI_FC_AVICONF2);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1874
hdmi_writeb(hdmi, val, HDMI_FC_AVIVID);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1877
val = (((hdmi->hdmi_data.video_mode.mpixelrepetitioninput + 1) <<
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1880
((hdmi->hdmi_data.video_mode.mpixelrepetitionoutput <<
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1883
hdmi_writeb(hdmi, val, HDMI_FC_PRCONF);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1891
hdmi_writeb(hdmi, val, HDMI_FC_AVICONF3);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1894
hdmi_writeb(hdmi, frame.top_bar & 0xff, HDMI_FC_AVIETB0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1895
hdmi_writeb(hdmi, (frame.top_bar >> 8) & 0xff, HDMI_FC_AVIETB1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1896
hdmi_writeb(hdmi, frame.bottom_bar & 0xff, HDMI_FC_AVISBB0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1897
hdmi_writeb(hdmi, (frame.bottom_bar >> 8) & 0xff, HDMI_FC_AVISBB1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1898
hdmi_writeb(hdmi, frame.left_bar & 0xff, HDMI_FC_AVIELB0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1899
hdmi_writeb(hdmi, (frame.left_bar >> 8) & 0xff, HDMI_FC_AVIELB1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
190
void (*enable_audio)(struct dw_hdmi *hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1900
hdmi_writeb(hdmi, frame.right_bar & 0xff, HDMI_FC_AVISRB0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1901
hdmi_writeb(hdmi, (frame.right_bar >> 8) & 0xff, HDMI_FC_AVISRB1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1904
static void hdmi_config_vendor_specific_infoframe(struct dw_hdmi *hdmi,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
191
void (*disable_audio)(struct dw_hdmi *hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1925
dev_err(hdmi->dev, "Failed to pack vendor infoframe: %zd\n",
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1929
hdmi_mask_writeb(hdmi, 0, HDMI_FC_DATAUTO0, HDMI_FC_DATAUTO0_VSD_OFFSET,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1933
hdmi_writeb(hdmi, buffer[2], HDMI_FC_VSDSIZE);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1936
hdmi_writeb(hdmi, buffer[4], HDMI_FC_VSDIEEEID0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1937
hdmi_writeb(hdmi, buffer[5], HDMI_FC_VSDIEEEID1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1938
hdmi_writeb(hdmi, buffer[6], HDMI_FC_VSDIEEEID2);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1941
hdmi_writeb(hdmi, buffer[7], HDMI_FC_VSDPAYLOAD0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1942
hdmi_writeb(hdmi, buffer[8], HDMI_FC_VSDPAYLOAD1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1945
hdmi_writeb(hdmi, buffer[9], HDMI_FC_VSDPAYLOAD2);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1948
hdmi_writeb(hdmi, 1, HDMI_FC_DATAUTO1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1951
hdmi_writeb(hdmi, 0x11, HDMI_FC_DATAUTO2);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1954
hdmi_mask_writeb(hdmi, 1, HDMI_FC_DATAUTO0, HDMI_FC_DATAUTO0_VSD_OFFSET,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1958
static void hdmi_config_drm_infoframe(struct dw_hdmi *hdmi,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1967
if (!hdmi->plat_data->use_drm_infoframe)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1970
hdmi_modb(hdmi, HDMI_FC_PACKET_TX_EN_DRM_DISABLE,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1979
dev_err(hdmi->dev, "Failed to pack drm infoframe: %zd\n", err);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1983
hdmi_writeb(hdmi, frame.version, HDMI_FC_DRM_HB0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1984
hdmi_writeb(hdmi, frame.length, HDMI_FC_DRM_HB1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1987
hdmi_writeb(hdmi, buffer[4 + i], HDMI_FC_DRM_PB0 + i);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1989
hdmi_writeb(hdmi, 1, HDMI_FC_DRM_UP);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1990
hdmi_modb(hdmi, HDMI_FC_PACKET_TX_EN_DRM_ENABLE,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1994
static void hdmi_av_composer(struct dw_hdmi *hdmi,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
1999
const struct drm_hdmi_info *hdmi_info = &display->hdmi;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2000
struct hdmi_vmode *vmode = &hdmi->hdmi_data.video_mode;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2006
dev_dbg(hdmi->dev, "final pixclk = %d\n", vmode->mpixelclock);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
201
const struct dw_hdmi_plat_data *dw_hdmi_to_plat_data(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2010
if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2012
hdmi->hdmi_data.enc_out_bus_format)) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2025
if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format))
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2028
dev_dbg(hdmi->dev, "final tmdsclock = %d\n", vmode->mtmdsclock);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
203
return hdmi->plat_data;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2031
inv_val = (hdmi->hdmi_data.hdcp_enable ||
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2032
(dw_hdmi_support_scdc(hdmi, display) &&
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2050
if (hdmi->vic == 39)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2061
inv_val |= hdmi->sink_is_hdmi ?
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2065
hdmi_writeb(hdmi, inv_val, HDMI_FC_INVIDCONF);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2076
if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format)) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2100
if (dw_hdmi_support_scdc(hdmi, display)) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2112
drm_scdc_readb(hdmi->ddc, SCDC_SINK_VERSION,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2114
drm_scdc_writeb(hdmi->ddc, SCDC_SOURCE_VERSION,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2118
drm_scdc_set_scrambling(hdmi->curr_conn, 1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2127
hdmi_writeb(hdmi, (u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2129
hdmi_writeb(hdmi, 1, HDMI_FC_SCRAMBLER_CTRL);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2131
hdmi_writeb(hdmi, 0, HDMI_FC_SCRAMBLER_CTRL);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2132
hdmi_writeb(hdmi, (u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2134
drm_scdc_set_scrambling(hdmi->curr_conn, 0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2139
hdmi_writeb(hdmi, hdisplay >> 8, HDMI_FC_INHACTV1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2140
hdmi_writeb(hdmi, hdisplay, HDMI_FC_INHACTV0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2143
hdmi_writeb(hdmi, vdisplay >> 8, HDMI_FC_INVACTV1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2144
hdmi_writeb(hdmi, vdisplay, HDMI_FC_INVACTV0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2147
hdmi_writeb(hdmi, hblank >> 8, HDMI_FC_INHBLANK1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2148
hdmi_writeb(hdmi, hblank, HDMI_FC_INHBLANK0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
215
static inline void hdmi_writeb(struct dw_hdmi *hdmi, u8 val, int offset)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2151
hdmi_writeb(hdmi, vblank, HDMI_FC_INVBLANK);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2154
hdmi_writeb(hdmi, h_de_hs >> 8, HDMI_FC_HSYNCINDELAY1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2155
hdmi_writeb(hdmi, h_de_hs, HDMI_FC_HSYNCINDELAY0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2158
hdmi_writeb(hdmi, v_de_vs, HDMI_FC_VSYNCINDELAY);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2161
hdmi_writeb(hdmi, hsync_len >> 8, HDMI_FC_HSYNCINWIDTH1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2162
hdmi_writeb(hdmi, hsync_len, HDMI_FC_HSYNCINWIDTH0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2165
hdmi_writeb(hdmi, vsync_len, HDMI_FC_VSYNCINWIDTH);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2169
static void dw_hdmi_enable_video_path(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
217
regmap_write(hdmi->regm, offset << hdmi->reg_shift, val);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2172
hdmi_writeb(hdmi, 12, HDMI_FC_CTRLDUR);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2173
hdmi_writeb(hdmi, 32, HDMI_FC_EXCTRLDUR);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2174
hdmi_writeb(hdmi, 1, HDMI_FC_EXCTRLSPAC);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2177
hdmi_writeb(hdmi, 0x0B, HDMI_FC_CH0PREAM);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2178
hdmi_writeb(hdmi, 0x16, HDMI_FC_CH1PREAM);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2179
hdmi_writeb(hdmi, 0x21, HDMI_FC_CH2PREAM);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2182
hdmi->mc_clkdis |= HDMI_MC_CLKDIS_HDCPCLK_DISABLE |
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2187
hdmi->mc_clkdis &= ~HDMI_MC_CLKDIS_PIXELCLK_DISABLE;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2188
hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2190
hdmi->mc_clkdis &= ~HDMI_MC_CLKDIS_TMDSCLK_DISABLE;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2191
hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2194
if (is_csc_needed(hdmi)) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2195
hdmi->mc_clkdis &= ~HDMI_MC_CLKDIS_CSCCLK_DISABLE;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2196
hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2198
hdmi_writeb(hdmi, HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_IN_PATH,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
220
static inline u8 hdmi_readb(struct dw_hdmi *hdmi, int offset)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2201
hdmi->mc_clkdis |= HDMI_MC_CLKDIS_CSCCLK_DISABLE;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2202
hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2204
hdmi_writeb(hdmi, HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_BYPASS,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2210
static void dw_hdmi_clear_overflow(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2231
switch (hdmi->version) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
224
regmap_read(hdmi->regm, offset << hdmi->reg_shift, &val);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2241
hdmi_writeb(hdmi, (u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ, HDMI_MC_SWRSTZ);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2243
val = hdmi_readb(hdmi, HDMI_FC_INVIDCONF);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2245
hdmi_writeb(hdmi, val, HDMI_FC_INVIDCONF);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2248
static void hdmi_disable_overflow_interrupts(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2250
hdmi_writeb(hdmi, HDMI_IH_MUTE_FC_STAT2_OVERFLOW_MASK,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2254
static int dw_hdmi_setup(struct dw_hdmi *hdmi,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2260
hdmi_disable_overflow_interrupts(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2262
hdmi->vic = drm_match_cea_mode(mode);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2264
if (!hdmi->vic) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2265
dev_dbg(hdmi->dev, "Non-CEA mode used in HDMI\n");
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2267
dev_dbg(hdmi->dev, "CEA mode used vic=%d\n", hdmi->vic);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2270
if ((hdmi->vic == 6) || (hdmi->vic == 7) ||
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2271
(hdmi->vic == 21) || (hdmi->vic == 22) ||
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2272
(hdmi->vic == 2) || (hdmi->vic == 3) ||
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2273
(hdmi->vic == 17) || (hdmi->vic == 18))
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2274
hdmi->hdmi_data.enc_out_encoding = V4L2_YCBCR_ENC_601;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2276
hdmi->hdmi_data.enc_out_encoding = V4L2_YCBCR_ENC_709;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2278
hdmi->hdmi_data.video_mode.mpixelrepetitionoutput = 0;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2279
hdmi->hdmi_data.video_mode.mpixelrepetitioninput = 0;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2281
if (hdmi->hdmi_data.enc_in_bus_format == MEDIA_BUS_FMT_FIXED)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2282
hdmi->hdmi_data.enc_in_bus_format = MEDIA_BUS_FMT_RGB888_1X24;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2285
if (hdmi->plat_data->input_bus_encoding)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2286
hdmi->hdmi_data.enc_in_encoding =
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2287
hdmi->plat_data->input_bus_encoding;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2289
hdmi->hdmi_data.enc_in_encoding = V4L2_YCBCR_ENC_DEFAULT;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
229
static void handle_plugged_change(struct dw_hdmi *hdmi, bool plugged)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2291
if (hdmi->hdmi_data.enc_out_bus_format == MEDIA_BUS_FMT_FIXED)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2292
hdmi->hdmi_data.enc_out_bus_format = MEDIA_BUS_FMT_RGB888_1X24;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2294
hdmi->hdmi_data.rgb_limited_range = hdmi->sink_is_hdmi &&
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2298
hdmi->hdmi_data.pix_repet_factor = 0;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2299
hdmi->hdmi_data.hdcp_enable = 0;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2300
hdmi->hdmi_data.video_mode.mdataenablepolarity = true;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2303
hdmi_av_composer(hdmi, &connector->display_info, mode);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2306
ret = hdmi->phy.ops->init(hdmi, hdmi->phy.data,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2308
&hdmi->previous_mode);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
231
if (hdmi->plugged_cb && hdmi->codec_dev)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2311
hdmi->phy.enabled = true;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2314
dw_hdmi_enable_video_path(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2316
if (hdmi->sink_has_audio) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2317
dev_dbg(hdmi->dev, "sink has audio support\n");
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
232
hdmi->plugged_cb(hdmi->codec_dev, plugged);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2320
hdmi_clk_regenerator_update_pixel_clock(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2321
hdmi_enable_audio_clk(hdmi, hdmi->audio_enable);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2325
if (hdmi->sink_is_hdmi) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2326
dev_dbg(hdmi->dev, "%s HDMI mode\n", __func__);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2329
hdmi_config_AVI(hdmi, connector, mode);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2330
hdmi_config_vendor_specific_infoframe(hdmi, connector, mode);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2331
hdmi_config_drm_infoframe(hdmi, connector);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2333
dev_dbg(hdmi->dev, "%s DVI mode\n", __func__);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2336
hdmi_video_packetize(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2337
hdmi_video_csc(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2338
hdmi_video_sample(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2339
hdmi_tx_hdcp_config(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2341
dw_hdmi_clear_overflow(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2346
static void initialize_hdmi_ih_mutes(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
235
int dw_hdmi_set_plugged_cb(struct dw_hdmi *hdmi, hdmi_codec_plugged_cb fn,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2357
ih_mute = hdmi_readb(hdmi, HDMI_IH_MUTE) |
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2361
hdmi_writeb(hdmi, ih_mute, HDMI_IH_MUTE);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2364
hdmi_writeb(hdmi, 0xff, HDMI_VP_MASK);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2365
hdmi_writeb(hdmi, 0xff, HDMI_FC_MASK0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2366
hdmi_writeb(hdmi, 0xff, HDMI_FC_MASK1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2367
hdmi_writeb(hdmi, 0xff, HDMI_FC_MASK2);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2368
hdmi_writeb(hdmi, 0xff, HDMI_PHY_MASK0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2369
hdmi_writeb(hdmi, 0xff, HDMI_PHY_I2CM_INT_ADDR);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2370
hdmi_writeb(hdmi, 0xff, HDMI_PHY_I2CM_CTLINT_ADDR);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2371
hdmi_writeb(hdmi, 0xff, HDMI_AUD_INT);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2372
hdmi_writeb(hdmi, 0xff, HDMI_AUD_SPDIFINT);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2373
hdmi_writeb(hdmi, 0xff, HDMI_AUD_HBR_MASK);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2374
hdmi_writeb(hdmi, 0xff, HDMI_GP_MASK);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2375
hdmi_writeb(hdmi, 0xff, HDMI_A_APIINTMSK);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2376
hdmi_writeb(hdmi, 0xff, HDMI_I2CM_INT);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2377
hdmi_writeb(hdmi, 0xff, HDMI_I2CM_CTLINT);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2380
hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_FC_STAT0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2381
hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_FC_STAT1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2382
hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_FC_STAT2);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2383
hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_AS_STAT0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2384
hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_PHY_STAT0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2385
hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_I2CM_STAT0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2386
hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_CEC_STAT0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2387
hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_VP_STAT0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2388
hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_I2CMPHY_STAT0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2389
hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_AHBDMAAUD_STAT0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2394
hdmi_writeb(hdmi, ih_mute, HDMI_IH_MUTE);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2397
static void dw_hdmi_poweron(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2399
hdmi->bridge_is_on = true;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
240
mutex_lock(&hdmi->mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2405
dw_hdmi_setup(hdmi, hdmi->curr_conn, &hdmi->previous_mode);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2408
static void dw_hdmi_poweroff(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
241
hdmi->plugged_cb = fn;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2410
if (hdmi->phy.enabled) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2411
hdmi->phy.ops->disable(hdmi, hdmi->phy.data);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2412
hdmi->phy.enabled = false;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2415
hdmi->bridge_is_on = false;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2418
static void dw_hdmi_update_power(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
242
hdmi->codec_dev = codec_dev;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2420
int force = hdmi->force;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2422
if (hdmi->disabled) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2425
if (hdmi->rxsense)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
243
plugged = hdmi->last_connector_result == connector_status_connected;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2432
if (hdmi->bridge_is_on)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2433
dw_hdmi_poweroff(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2435
if (!hdmi->bridge_is_on)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2436
dw_hdmi_poweron(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
244
handle_plugged_change(hdmi, plugged);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
245
mutex_unlock(&hdmi->mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2452
static void dw_hdmi_update_phy_mask(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2454
if (hdmi->phy.ops->update_hpd)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2455
hdmi->phy.ops->update_hpd(hdmi, hdmi->phy.data,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2456
hdmi->force, hdmi->disabled,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2457
hdmi->rxsense);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2460
static enum drm_connector_status dw_hdmi_detect(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2464
result = hdmi->phy.ops->read_hpd(hdmi, hdmi->phy.data);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2465
hdmi->last_connector_result = result;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2470
static const struct drm_edid *dw_hdmi_edid_read(struct dw_hdmi *hdmi,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2476
if (!hdmi->ddc)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2479
drm_edid = drm_edid_read_ddc(connector, hdmi->ddc);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2481
dev_dbg(hdmi->dev, "failed to get edid\n");
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2492
dev_dbg(hdmi->dev, "got edid: width[%d] x height[%d]\n",
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2495
hdmi->sink_is_hdmi = drm_detect_hdmi_monitor(edid);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2496
hdmi->sink_has_audio = drm_detect_monitor_audio(edid);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2508
struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
251
static void hdmi_modb(struct dw_hdmi *hdmi, u8 data, u8 mask, unsigned reg)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2510
return dw_hdmi_detect(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2515
struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2520
drm_edid = dw_hdmi_edid_read(hdmi, connector);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2523
cec_notifier_set_phys_addr(hdmi->cec_notifier,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
253
regmap_update_bits(hdmi->regm, reg << hdmi->reg_shift, mask, data);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2557
struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
256
static void hdmi_mask_writeb(struct dw_hdmi *hdmi, u8 data, unsigned int reg,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2560
mutex_lock(&hdmi->mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2561
hdmi->force = connector->force;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2562
dw_hdmi_update_power(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2563
dw_hdmi_update_phy_mask(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2564
mutex_unlock(&hdmi->mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2582
static int dw_hdmi_connector_create(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2584
struct drm_connector *connector = &hdmi->connector;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2588
if (hdmi->version >= 0x200a)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
259
hdmi_modb(hdmi, data << shift, mask, reg);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2590
hdmi->plat_data->ycbcr_420_allowed;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2599
drm_connector_init_with_ddc(hdmi->bridge.dev, connector,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2602
hdmi->ddc);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2612
if (hdmi->version >= 0x200a && hdmi->plat_data->use_drm_infoframe)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2615
drm_connector_attach_encoder(connector, hdmi->bridge.encoder);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2619
notifier = cec_notifier_conn_register(hdmi->dev, NULL, &conn_info);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
262
static void dw_hdmi_i2c_init(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2623
mutex_lock(&hdmi->cec_notifier_mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2624
hdmi->cec_notifier = notifier;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2625
mutex_unlock(&hdmi->cec_notifier_mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
264
hdmi_writeb(hdmi, HDMI_PHY_I2CM_INT_ADDR_DONE_POL,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2666
bool is_hdmi2_sink = info->hdmi.scdc.supported ||
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
267
hdmi_writeb(hdmi, HDMI_PHY_I2CM_CTLINT_ADDR_NAC_POL |
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2697
(info->hdmi.y420_dc_modes & DRM_EDID_YCBCR420_DC_48))
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2701
(info->hdmi.y420_dc_modes & DRM_EDID_YCBCR420_DC_36))
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2705
(info->hdmi.y420_dc_modes & DRM_EDID_YCBCR420_DC_30))
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
272
hdmi_writeb(hdmi, 0x00, HDMI_I2CM_SOFTRSTZ);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
275
hdmi_writeb(hdmi, 0x00, HDMI_I2CM_DIV);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
278
hdmi_writeb(hdmi, HDMI_I2CM_INT_DONE_POL, HDMI_I2CM_INT);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
279
hdmi_writeb(hdmi, HDMI_I2CM_CTLINT_NAC_POL | HDMI_I2CM_CTLINT_ARB_POL,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
283
hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0_ERROR | HDMI_IH_I2CM_STAT0_DONE,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
287
hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0_ERROR | HDMI_IH_I2CM_STAT0_DONE,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2892
struct dw_hdmi *hdmi = bridge->driver_private;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2894
hdmi->hdmi_data.enc_out_bus_format =
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2897
hdmi->hdmi_data.enc_in_bus_format =
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2900
dev_dbg(hdmi->dev, "input format 0x%04x, output format 0x%04x\n",
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
291
static bool dw_hdmi_i2c_unwedge(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2911
struct dw_hdmi *hdmi = bridge->driver_private;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2914
if (WARN_ON((flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR) && !hdmi->plat_data->output_port))
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2919
of_graph_get_remote_node(hdmi->dev->of_node,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2920
hdmi->plat_data->output_port, -1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2932
return dw_hdmi_connector_create(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2937
struct dw_hdmi *hdmi = bridge->driver_private;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2939
mutex_lock(&hdmi->cec_notifier_mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
294
if (!hdmi->unwedge_state)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2940
cec_notifier_conn_unregister(hdmi->cec_notifier);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2941
hdmi->cec_notifier = NULL;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2942
mutex_unlock(&hdmi->cec_notifier_mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2950
struct dw_hdmi *hdmi = bridge->driver_private;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2951
const struct dw_hdmi_plat_data *pdata = hdmi->plat_data;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2959
mode_status = pdata->mode_valid(hdmi, pdata->priv_data, info,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2969
struct dw_hdmi *hdmi = bridge->driver_private;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
297
dev_info(hdmi->dev, "Attempting to unwedge stuck i2c bus\n");
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2971
mutex_lock(&hdmi->mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2974
drm_mode_copy(&hdmi->previous_mode, mode);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2976
mutex_unlock(&hdmi->mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2982
struct dw_hdmi *hdmi = bridge->driver_private;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2984
mutex_lock(&hdmi->mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2985
hdmi->disabled = true;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2986
hdmi->curr_conn = NULL;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2987
dw_hdmi_update_power(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2988
dw_hdmi_update_phy_mask(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2989
handle_plugged_change(hdmi, false);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2990
mutex_unlock(&hdmi->mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
2996
struct dw_hdmi *hdmi = bridge->driver_private;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3002
mutex_lock(&hdmi->mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3003
hdmi->disabled = false;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3004
hdmi->curr_conn = connector;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3005
dw_hdmi_update_power(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3006
dw_hdmi_update_phy_mask(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3007
handle_plugged_change(hdmi, true);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3008
mutex_unlock(&hdmi->mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3014
struct dw_hdmi *hdmi = bridge->driver_private;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3016
return dw_hdmi_detect(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3022
struct dw_hdmi *hdmi = bridge->driver_private;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3024
return dw_hdmi_edid_read(hdmi, connector);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3048
static irqreturn_t dw_hdmi_i2c_irq(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3050
struct dw_hdmi_i2c *i2c = hdmi->i2c;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3053
stat = hdmi_readb(hdmi, HDMI_IH_I2CM_STAT0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3057
hdmi_writeb(hdmi, stat, HDMI_IH_I2CM_STAT0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3068
struct dw_hdmi *hdmi = dev_id;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3072
if (hdmi->i2c)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3073
ret = dw_hdmi_i2c_irq(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3075
intr_stat = hdmi_readb(hdmi, HDMI_IH_PHY_STAT0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3077
hdmi_writeb(hdmi, ~0, HDMI_IH_MUTE_PHY_STAT0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3084
void dw_hdmi_setup_rx_sense(struct dw_hdmi *hdmi, bool hpd, bool rx_sense)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3086
mutex_lock(&hdmi->mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3088
if (!hdmi->force) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3094
hdmi->rxsense = false;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3103
hdmi->rxsense = true;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3105
dw_hdmi_update_power(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3106
dw_hdmi_update_phy_mask(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3108
mutex_unlock(&hdmi->mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3114
struct dw_hdmi *hdmi = dev_id;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3118
intr_stat = hdmi_readb(hdmi, HDMI_IH_PHY_STAT0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3119
phy_int_pol = hdmi_readb(hdmi, HDMI_PHY_POL0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3120
phy_stat = hdmi_readb(hdmi, HDMI_PHY_STAT0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3135
hdmi_modb(hdmi, ~phy_int_pol, phy_pol_mask, HDMI_PHY_POL0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3146
dw_hdmi_setup_rx_sense(hdmi,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3151
mutex_lock(&hdmi->cec_notifier_mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3152
cec_notifier_phys_addr_invalidate(hdmi->cec_notifier);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3153
mutex_unlock(&hdmi->cec_notifier_mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3164
dev_dbg(hdmi->dev, "EVENT=%s\n",
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3168
if (hdmi->bridge.dev) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3169
drm_helper_hpd_irq_event(hdmi->bridge.dev);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3170
drm_bridge_hpd_notify(&hdmi->bridge, status);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3174
hdmi_writeb(hdmi, intr_stat, HDMI_IH_PHY_STAT0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3175
hdmi_writeb(hdmi, ~(HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE),
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3220
static int dw_hdmi_detect_phy(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3225
phy_type = hdmi->plat_data->phy_force_vendor ?
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3227
hdmi_readb(hdmi, HDMI_CONFIG2_ID);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3231
if (!hdmi->plat_data->phy_ops || !hdmi->plat_data->phy_name) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3232
dev_err(hdmi->dev,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3237
hdmi->phy.ops = hdmi->plat_data->phy_ops;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3238
hdmi->phy.data = hdmi->plat_data->phy_data;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3239
hdmi->phy.name = hdmi->plat_data->phy_name;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3246
hdmi->phy.ops = &dw_hdmi_synopsys_phy_ops;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3247
hdmi->phy.name = dw_hdmi_phys[i].name;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3248
hdmi->phy.data = (void *)&dw_hdmi_phys[i];
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3251
!hdmi->plat_data->configure_phy) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3252
dev_err(hdmi->dev, "%s requires platform support\n",
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3253
hdmi->phy.name);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3261
dev_err(hdmi->dev, "Unsupported HDMI PHY type (%02x)\n", phy_type);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3265
static void dw_hdmi_cec_enable(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3267
mutex_lock(&hdmi->mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3268
hdmi->mc_clkdis &= ~HDMI_MC_CLKDIS_CECCLK_DISABLE;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3269
hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3270
mutex_unlock(&hdmi->mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3273
static void dw_hdmi_cec_disable(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3275
mutex_lock(&hdmi->mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3276
hdmi->mc_clkdis |= HDMI_MC_CLKDIS_CECCLK_DISABLE;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3277
hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3278
mutex_unlock(&hdmi->mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3302
static void dw_hdmi_init_hw(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3304
initialize_hdmi_ih_mutes(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
331
pinctrl_select_state(hdmi->pinctrl, hdmi->unwedge_state);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3311
dw_hdmi_i2c_init(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3313
if (hdmi->phy.ops->setup_hpd)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3314
hdmi->phy.ops->setup_hpd(hdmi, hdmi->phy.data);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3321
bool dw_hdmi_bus_fmt_is_420(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3323
return hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
333
pinctrl_select_state(hdmi->pinctrl, hdmi->default_state);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3335
struct dw_hdmi *hdmi;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3346
hdmi = devm_drm_bridge_alloc(dev, struct dw_hdmi, bridge, &dw_hdmi_bridge_funcs);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3347
if (IS_ERR(hdmi))
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3348
return hdmi;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3350
hdmi->plat_data = plat_data;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3351
hdmi->dev = dev;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3352
hdmi->sample_rate = 48000;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3353
hdmi->channels = 2;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3354
hdmi->disabled = true;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3355
hdmi->rxsense = true;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3356
hdmi->phy_mask = (u8)~(HDMI_PHY_HPD | HDMI_PHY_RX_SENSE);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3357
hdmi->mc_clkdis = 0x7f;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3358
hdmi->last_connector_result = connector_status_disconnected;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3360
mutex_init(&hdmi->mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3361
mutex_init(&hdmi->audio_mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3362
mutex_init(&hdmi->cec_notifier_mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3363
spin_lock_init(&hdmi->audio_lock);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3367
hdmi->ddc = of_get_i2c_adapter_by_node(ddc_node);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3369
if (!hdmi->ddc) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3370
dev_dbg(hdmi->dev, "failed to read ddc node\n");
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3375
dev_dbg(hdmi->dev, "no ddc property found\n");
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
338
static int dw_hdmi_i2c_wait(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3385
hdmi->reg_shift = 2;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3396
hdmi->regs = devm_ioremap_resource(dev, iores);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3397
if (IS_ERR(hdmi->regs)) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3398
ret = PTR_ERR(hdmi->regs);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
340
struct dw_hdmi_i2c *i2c = hdmi->i2c;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3402
hdmi->regm = devm_regmap_init_mmio(dev, hdmi->regs, reg_config);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3403
if (IS_ERR(hdmi->regm)) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3405
ret = PTR_ERR(hdmi->regm);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3409
hdmi->regm = plat_data->regm;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3412
clk = devm_clk_get_enabled(hdmi->dev, "isfr");
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3415
dev_err(hdmi->dev, "Unable to get HDMI isfr clk: %d\n", ret);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3419
clk = devm_clk_get_enabled(hdmi->dev, "iahb");
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3422
dev_err(hdmi->dev, "Unable to get HDMI iahb clk: %d\n", ret);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3426
clk = devm_clk_get_optional_enabled(hdmi->dev, "cec");
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3430
dev_err(hdmi->dev, "Cannot get HDMI cec clock: %d\n",
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3436
hdmi->version = (hdmi_readb(hdmi, HDMI_DESIGN_ID) << 8)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3437
| (hdmi_readb(hdmi, HDMI_REVISION_ID) << 0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3438
prod_id0 = hdmi_readb(hdmi, HDMI_PRODUCT_ID0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3439
prod_id1 = hdmi_readb(hdmi, HDMI_PRODUCT_ID1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3444
hdmi->version, prod_id0, prod_id1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3449
ret = dw_hdmi_detect_phy(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3454
hdmi->version >> 12, hdmi->version & 0xfff,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3456
hdmi->phy.name);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3458
dw_hdmi_init_hw(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
346
if (!dw_hdmi_i2c_unwedge(hdmi))
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3468
dev_name(dev), hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3476
hdmi_init_clk_regenerator(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3479
if (!hdmi->ddc) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3481
hdmi->pinctrl = devm_pinctrl_get(dev);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3482
if (!IS_ERR(hdmi->pinctrl)) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3483
hdmi->unwedge_state =
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3484
pinctrl_lookup_state(hdmi->pinctrl, "unwedge");
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3485
hdmi->default_state =
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3486
pinctrl_lookup_state(hdmi->pinctrl, "default");
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3488
if (IS_ERR(hdmi->default_state) ||
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3489
IS_ERR(hdmi->unwedge_state)) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3490
if (!IS_ERR(hdmi->unwedge_state))
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3493
hdmi->default_state = NULL;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3494
hdmi->unwedge_state = NULL;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3498
hdmi->ddc = dw_hdmi_i2c_adapter(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3499
if (IS_ERR(hdmi->ddc))
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3500
hdmi->ddc = NULL;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3503
hdmi->bridge.driver_private = hdmi;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3504
hdmi->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3506
hdmi->bridge.interlace_allowed = true;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3507
hdmi->bridge.ddc = hdmi->ddc;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3508
hdmi->bridge.of_node = pdev->dev.of_node;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3509
hdmi->bridge.type = DRM_MODE_CONNECTOR_HDMIA;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3511
if (hdmi->version >= 0x200a)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3512
hdmi->bridge.ycbcr_420_allowed = plat_data->ycbcr_420_allowed;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3518
config0 = hdmi_readb(hdmi, HDMI_CONFIG0_ID);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3519
config3 = hdmi_readb(hdmi, HDMI_CONFIG3_ID);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3525
audio.base = hdmi->regs;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3527
audio.hdmi = hdmi;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3529
hdmi->enable_audio = dw_hdmi_ahb_audio_enable;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3530
hdmi->disable_audio = dw_hdmi_ahb_audio_disable;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3536
hdmi->audio = platform_device_register_full(&pdevinfo);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3540
audio.hdmi = hdmi;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3544
hdmi->enable_audio = dw_hdmi_i2s_audio_enable;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3545
hdmi->disable_audio = dw_hdmi_i2s_audio_disable;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3551
hdmi->audio = platform_device_register_full(&pdevinfo);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3556
audio.base = hdmi->regs;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3558
audio.hdmi = hdmi;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3561
hdmi->enable_audio = dw_hdmi_gp_audio_enable;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3562
hdmi->disable_audio = dw_hdmi_gp_audio_disable;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3569
hdmi->audio = platform_device_register_full(&pdevinfo);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3573
cec.hdmi = hdmi;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3582
hdmi->cec = platform_device_register_full(&pdevinfo);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3585
drm_bridge_add(&hdmi->bridge);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3587
return hdmi;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3590
i2c_put_adapter(hdmi->ddc);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3596
void dw_hdmi_remove(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3598
drm_bridge_remove(&hdmi->bridge);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3600
if (hdmi->audio && !IS_ERR(hdmi->audio))
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3601
platform_device_unregister(hdmi->audio);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3602
if (!IS_ERR(hdmi->cec))
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3603
platform_device_unregister(hdmi->cec);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3606
hdmi_writeb(hdmi, ~0, HDMI_IH_MUTE_PHY_STAT0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3608
if (hdmi->i2c)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3609
i2c_del_adapter(&hdmi->i2c->adap);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3611
i2c_put_adapter(hdmi->ddc);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
362
static int dw_hdmi_i2c_read(struct dw_hdmi *hdmi,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3622
struct dw_hdmi *hdmi;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3625
hdmi = dw_hdmi_probe(pdev, plat_data);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3626
if (IS_ERR(hdmi))
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3627
return hdmi;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3629
ret = drm_bridge_attach(encoder, &hdmi->bridge, NULL, 0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3631
dw_hdmi_remove(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3635
return hdmi;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3639
void dw_hdmi_unbind(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3641
dw_hdmi_remove(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3645
void dw_hdmi_resume(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
3647
dw_hdmi_init_hw(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
365
struct dw_hdmi_i2c *i2c = hdmi->i2c;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
369
dev_dbg(hdmi->dev, "set read register address to 0\n");
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
377
hdmi_writeb(hdmi, i2c->slave_reg++, HDMI_I2CM_ADDRESS);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
379
hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_READ_EXT,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
382
hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_READ,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
385
ret = dw_hdmi_i2c_wait(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
389
*buf++ = hdmi_readb(hdmi, HDMI_I2CM_DATAI);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
396
static int dw_hdmi_i2c_write(struct dw_hdmi *hdmi,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
399
struct dw_hdmi_i2c *i2c = hdmi->i2c;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
413
hdmi_writeb(hdmi, *buf++, HDMI_I2CM_DATAO);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
414
hdmi_writeb(hdmi, i2c->slave_reg++, HDMI_I2CM_ADDRESS);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
415
hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_WRITE,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
418
ret = dw_hdmi_i2c_wait(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
429
struct dw_hdmi *hdmi = i2c_get_adapdata(adap);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
430
struct dw_hdmi_i2c *i2c = hdmi->i2c;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
443
dev_dbg(hdmi->dev, "xfer: num: %d, addr: %#x\n", num, addr);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
447
dev_dbg(hdmi->dev,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
457
hdmi_writeb(hdmi, 0x00, HDMI_IH_MUTE_I2CM_STAT0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
460
hdmi_writeb(hdmi, addr, HDMI_I2CM_SLAVE);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
469
dev_dbg(hdmi->dev, "xfer: num: %d/%d, len: %d, flags: %#x\n",
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
473
hdmi_writeb(hdmi, DDC_SEGMENT_ADDR, HDMI_I2CM_SEGADDR);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
474
hdmi_writeb(hdmi, *msgs[i].buf, HDMI_I2CM_SEGPTR);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
477
ret = dw_hdmi_i2c_read(hdmi, msgs[i].buf,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
480
ret = dw_hdmi_i2c_write(hdmi, msgs[i].buf,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
491
hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0_ERROR | HDMI_IH_I2CM_STAT0_DONE,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
509
static struct i2c_adapter *dw_hdmi_i2c_adapter(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
515
i2c = devm_kzalloc(hdmi->dev, sizeof(*i2c), GFP_KERNEL);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
524
adap->dev.parent = hdmi->dev;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
527
i2c_set_adapdata(adap, hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
531
dev_warn(hdmi->dev, "cannot add %s I2C adapter\n", adap->name);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
532
devm_kfree(hdmi->dev, i2c);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
536
hdmi->i2c = i2c;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
538
dev_info(hdmi->dev, "registered %s I2C bus driver\n", adap->name);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
543
static void hdmi_set_cts_n(struct dw_hdmi *hdmi, unsigned int cts,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
547
hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
550
hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_N_SHIFT_MASK, HDMI_AUD_CTS3);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
554
hdmi_writeb(hdmi, ((cts >> 16) &
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
559
hdmi_writeb(hdmi, 0, HDMI_AUD_CTS3);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
560
hdmi_writeb(hdmi, (cts >> 8) & 0xff, HDMI_AUD_CTS2);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
561
hdmi_writeb(hdmi, cts & 0xff, HDMI_AUD_CTS1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
563
hdmi_writeb(hdmi, (n >> 16) & 0x0f, HDMI_AUD_N3);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
564
hdmi_writeb(hdmi, (n >> 8) & 0xff, HDMI_AUD_N2);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
565
hdmi_writeb(hdmi, n & 0xff, HDMI_AUD_N1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
638
void dw_hdmi_set_channel_status(struct dw_hdmi *hdmi,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
645
hdmi_writeb(hdmi, channel_status[3], HDMI_FC_AUDSCHNLS7);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
646
hdmi_writeb(hdmi, channel_status[4], HDMI_FC_AUDSCHNLS8);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
650
static void hdmi_set_clk_regenerator(struct dw_hdmi *hdmi,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
660
config3 = hdmi_readb(hdmi, HDMI_CONFIG3_ID);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
675
dev_dbg(hdmi->dev, "%s: fs=%uHz ftdms=%lu.%03luMHz N=%d cts=%d\n",
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
683
spin_lock_irq(&hdmi->audio_lock);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
684
hdmi->audio_n = n;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
685
hdmi->audio_cts = cts;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
686
hdmi_set_cts_n(hdmi, cts, hdmi->audio_enable ? n : 0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
687
spin_unlock_irq(&hdmi->audio_lock);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
690
static void hdmi_init_clk_regenerator(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
692
mutex_lock(&hdmi->audio_mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
693
hdmi_set_clk_regenerator(hdmi, 74250000, hdmi->sample_rate);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
694
mutex_unlock(&hdmi->audio_mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
697
static void hdmi_clk_regenerator_update_pixel_clock(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
699
mutex_lock(&hdmi->audio_mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
700
hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mtmdsclock,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
701
hdmi->sample_rate);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
702
mutex_unlock(&hdmi->audio_mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
705
void dw_hdmi_set_sample_width(struct dw_hdmi *hdmi, unsigned int width)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
707
mutex_lock(&hdmi->audio_mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
708
hdmi->sample_width = width;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
709
mutex_unlock(&hdmi->audio_mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
713
void dw_hdmi_set_sample_non_pcm(struct dw_hdmi *hdmi, unsigned int non_pcm)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
715
mutex_lock(&hdmi->audio_mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
716
hdmi->sample_non_pcm = non_pcm;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
717
mutex_unlock(&hdmi->audio_mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
721
void dw_hdmi_set_sample_iec958(struct dw_hdmi *hdmi, unsigned int iec958)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
723
mutex_lock(&hdmi->audio_mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
724
hdmi->sample_iec958 = iec958;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
725
mutex_unlock(&hdmi->audio_mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
729
void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
731
mutex_lock(&hdmi->audio_mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
732
hdmi->sample_rate = rate;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
733
hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mtmdsclock,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
734
hdmi->sample_rate);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
735
mutex_unlock(&hdmi->audio_mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
739
void dw_hdmi_set_channel_count(struct dw_hdmi *hdmi, unsigned int cnt)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
743
mutex_lock(&hdmi->audio_mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
744
hdmi->channels = cnt;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
755
hdmi_modb(hdmi, layout, HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_MASK,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
759
hdmi_modb(hdmi, (cnt - 1) << HDMI_FC_AUDICONF0_CC_OFFSET,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
762
mutex_unlock(&hdmi->audio_mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
766
void dw_hdmi_set_channel_allocation(struct dw_hdmi *hdmi, unsigned int ca)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
768
mutex_lock(&hdmi->audio_mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
770
hdmi_writeb(hdmi, ca, HDMI_FC_AUDICONF2);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
772
mutex_unlock(&hdmi->audio_mutex);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
776
static void hdmi_enable_audio_clk(struct dw_hdmi *hdmi, bool enable)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
779
hdmi->mc_clkdis &= ~HDMI_MC_CLKDIS_AUDCLK_DISABLE;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
781
hdmi->mc_clkdis |= HDMI_MC_CLKDIS_AUDCLK_DISABLE;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
782
hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
785
static u8 *hdmi_audio_get_eld(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
787
if (!hdmi->curr_conn)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
790
return hdmi->curr_conn->eld;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
793
static void dw_hdmi_gp_audio_enable(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
795
const struct dw_hdmi_plat_data *pdata = hdmi->plat_data;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
797
int ch_mask = BIT(hdmi->channels) - 1;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
799
switch (hdmi->sample_rate) {
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
832
hdmi_set_cts_n(hdmi, hdmi->audio_cts, hdmi->audio_n);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
833
hdmi_enable_audio_clk(hdmi, true);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
835
hdmi_writeb(hdmi, 0x1, HDMI_FC_AUDSCHNLS0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
836
hdmi_writeb(hdmi, hdmi->channels, HDMI_FC_AUDSCHNLS2);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
837
hdmi_writeb(hdmi, 0x22, HDMI_FC_AUDSCHNLS3);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
838
hdmi_writeb(hdmi, 0x22, HDMI_FC_AUDSCHNLS4);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
839
hdmi_writeb(hdmi, 0x11, HDMI_FC_AUDSCHNLS5);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
840
hdmi_writeb(hdmi, 0x11, HDMI_FC_AUDSCHNLS6);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
841
hdmi_writeb(hdmi, (0x3 << 4) | sample_freq, HDMI_FC_AUDSCHNLS7);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
842
hdmi_writeb(hdmi, (org_sample_freq << 4) | 0xb, HDMI_FC_AUDSCHNLS8);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
844
hdmi_writeb(hdmi, ch_mask, HDMI_GP_CONF1);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
845
hdmi_writeb(hdmi, 0x02, HDMI_GP_CONF2);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
846
hdmi_writeb(hdmi, 0x01, HDMI_GP_CONF0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
848
hdmi_modb(hdmi, 0x3, 0x3, HDMI_FC_DATAUTO3);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
851
if (hdmi->sample_rate == 192000 && hdmi->channels == 8 &&
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
852
hdmi->sample_width == 32 && hdmi->sample_non_pcm)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
853
hdmi_modb(hdmi, 0x01, 0x01, HDMI_GP_CONF2);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
856
pdata->enable_audio(hdmi,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
857
hdmi->channels,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
858
hdmi->sample_width,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
859
hdmi->sample_rate,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
860
hdmi->sample_non_pcm,
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
861
hdmi->sample_iec958);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
864
static void dw_hdmi_gp_audio_disable(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
866
const struct dw_hdmi_plat_data *pdata = hdmi->plat_data;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
868
hdmi_set_cts_n(hdmi, hdmi->audio_cts, 0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
870
hdmi_modb(hdmi, 0, 0x3, HDMI_FC_DATAUTO3);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
872
pdata->disable_audio(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
874
hdmi_enable_audio_clk(hdmi, false);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
877
static void dw_hdmi_ahb_audio_enable(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
879
hdmi_set_cts_n(hdmi, hdmi->audio_cts, hdmi->audio_n);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
882
static void dw_hdmi_ahb_audio_disable(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
884
hdmi_set_cts_n(hdmi, hdmi->audio_cts, 0);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
887
static void dw_hdmi_i2s_audio_enable(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
889
hdmi_set_cts_n(hdmi, hdmi->audio_cts, hdmi->audio_n);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
890
hdmi_enable_audio_clk(hdmi, true);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
893
static void dw_hdmi_i2s_audio_disable(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
895
hdmi_enable_audio_clk(hdmi, false);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
898
void dw_hdmi_audio_enable(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
902
spin_lock_irqsave(&hdmi->audio_lock, flags);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
903
hdmi->audio_enable = true;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
904
if (hdmi->enable_audio)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
905
hdmi->enable_audio(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
906
spin_unlock_irqrestore(&hdmi->audio_lock, flags);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
910
void dw_hdmi_audio_disable(struct dw_hdmi *hdmi)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
914
spin_lock_irqsave(&hdmi->audio_lock, flags);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
915
hdmi->audio_enable = false;
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
916
if (hdmi->disable_audio)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
917
hdmi->disable_audio(hdmi);
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
918
spin_unlock_irqrestore(&hdmi->audio_lock, flags);
drivers/gpu/drm/bridge/tda998x_drv.c
1245
if (priv->hdmi->irq) {
drivers/gpu/drm/bridge/tda998x_drv.c
1250
dev_err(&priv->hdmi->dev, "read edid wait err %d\n", i);
drivers/gpu/drm/bridge/tda998x_drv.c
1266
dev_err(&priv->hdmi->dev, "read edid timeout\n");
drivers/gpu/drm/bridge/tda998x_drv.c
1273
dev_err(&priv->hdmi->dev, "failed to read edid block %d: %d\n",
drivers/gpu/drm/bridge/tda998x_drv.c
1321
dev_warn(&priv->hdmi->dev, "failed to read EDID\n");
drivers/gpu/drm/bridge/tda998x_drv.c
1357
if (priv->hdmi->irq)
drivers/gpu/drm/bridge/tda998x_drv.c
1704
dev_dbg(&priv->hdmi->dev, "failed to get edid\n");
drivers/gpu/drm/bridge/tda998x_drv.c
1715
dev_dbg(&priv->hdmi->dev, "got edid: width[%d] x height[%d]\n",
drivers/gpu/drm/bridge/tda998x_drv.c
1775
dev_err(&priv->hdmi->dev,
drivers/gpu/drm/bridge/tda998x_drv.c
1795
dev_err(&priv->hdmi->dev,
drivers/gpu/drm/bridge/tda998x_drv.c
1801
dev_err(&priv->hdmi->dev, "invalid zero port config\n");
drivers/gpu/drm/bridge/tda998x_drv.c
1806
dev_err(&priv->hdmi->dev,
drivers/gpu/drm/bridge/tda998x_drv.c
1853
priv->hdmi = client;
drivers/gpu/drm/bridge/tda998x_drv.c
2046
free_irq(priv->hdmi->irq, priv);
drivers/gpu/drm/bridge/tda998x_drv.c
416
ret = i2c_transfer(priv->hdmi->adapter, &msg, 1);
drivers/gpu/drm/bridge/tda998x_drv.c
418
dev_err(&priv->hdmi->dev, "Error %d writing to cec:0x%x\n",
drivers/gpu/drm/bridge/tda998x_drv.c
440
ret = i2c_transfer(priv->hdmi->adapter, msg, ARRAY_SIZE(msg));
drivers/gpu/drm/bridge/tda998x_drv.c
442
dev_err(&priv->hdmi->dev, "Error %d reading from cec:0x%x\n",
drivers/gpu/drm/bridge/tda998x_drv.c
498
if (priv->hdmi->irq > 0)
drivers/gpu/drm/bridge/tda998x_drv.c
499
disable_irq(priv->hdmi->irq);
drivers/gpu/drm/bridge/tda998x_drv.c
511
if (priv->hdmi->irq > 0)
drivers/gpu/drm/bridge/tda998x_drv.c
512
enable_irq(priv->hdmi->irq);
drivers/gpu/drm/bridge/tda998x_drv.c
521
calib = gpiod_get(&priv->hdmi->dev, "nxp,calib", GPIOD_ASIS);
drivers/gpu/drm/bridge/tda998x_drv.c
523
dev_warn(&priv->hdmi->dev, "failed to get calibration gpio: %ld\n",
drivers/gpu/drm/bridge/tda998x_drv.c
54
struct i2c_client *hdmi;
drivers/gpu/drm/bridge/tda998x_drv.c
562
struct i2c_client *client = priv->hdmi;
drivers/gpu/drm/bridge/tda998x_drv.c
581
struct i2c_client *client = priv->hdmi;
drivers/gpu/drm/bridge/tda998x_drv.c
612
struct i2c_client *client = priv->hdmi;
drivers/gpu/drm/bridge/tda998x_drv.c
653
struct i2c_client *client = priv->hdmi;
drivers/gpu/drm/bridge/tda998x_drv.c
672
struct i2c_client *client = priv->hdmi;
drivers/gpu/drm/bridge/tda998x_drv.c
838
dev_err(&priv->hdmi->dev,
drivers/gpu/drm/bridge/tda998x_drv.c
878
if (drm_hdmi_vendor_infoframe_from_display_mode(&frame.vendor.hdmi,
drivers/gpu/drm/bridge/tda998x_drv.c
909
dev_err(&priv->hdmi->dev, "no audio configuration found\n");
drivers/gpu/drm/bridge/tda998x_drv.c
935
dev_dbg(&priv->hdmi->dev,
drivers/gpu/drm/bridge/tda998x_drv.c
987
dev_err(&priv->hdmi->dev, "unsupported bclk ratio %ufs\n",
drivers/gpu/drm/bridge/th1520-dw-hdmi.c
107
struct th1520_hdmi *hdmi;
drivers/gpu/drm/bridge/th1520-dw-hdmi.c
111
hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
drivers/gpu/drm/bridge/th1520-dw-hdmi.c
112
if (!hdmi)
drivers/gpu/drm/bridge/th1520-dw-hdmi.c
115
plat_data = &hdmi->plat_data;
drivers/gpu/drm/bridge/th1520-dw-hdmi.c
117
hdmi->pixclk = devm_clk_get_enabled(dev, "pix");
drivers/gpu/drm/bridge/th1520-dw-hdmi.c
118
if (IS_ERR(hdmi->pixclk))
drivers/gpu/drm/bridge/th1520-dw-hdmi.c
119
return dev_err_probe(dev, PTR_ERR(hdmi->pixclk),
drivers/gpu/drm/bridge/th1520-dw-hdmi.c
122
hdmi->mainrst = devm_reset_control_get_exclusive_deasserted(dev, "main");
drivers/gpu/drm/bridge/th1520-dw-hdmi.c
123
if (IS_ERR(hdmi->mainrst))
drivers/gpu/drm/bridge/th1520-dw-hdmi.c
124
return dev_err_probe(dev, PTR_ERR(hdmi->mainrst),
drivers/gpu/drm/bridge/th1520-dw-hdmi.c
127
hdmi->prst = devm_reset_control_get_exclusive_deasserted(dev, "apb");
drivers/gpu/drm/bridge/th1520-dw-hdmi.c
128
if (IS_ERR(hdmi->prst))
drivers/gpu/drm/bridge/th1520-dw-hdmi.c
129
return dev_err_probe(dev, PTR_ERR(hdmi->prst),
drivers/gpu/drm/bridge/th1520-dw-hdmi.c
135
plat_data->priv_data = hdmi;
drivers/gpu/drm/bridge/th1520-dw-hdmi.c
137
hdmi->dw_hdmi = dw_hdmi_probe(pdev, plat_data);
drivers/gpu/drm/bridge/th1520-dw-hdmi.c
138
if (IS_ERR(hdmi))
drivers/gpu/drm/bridge/th1520-dw-hdmi.c
139
return PTR_ERR(hdmi);
drivers/gpu/drm/bridge/th1520-dw-hdmi.c
141
platform_set_drvdata(pdev, hdmi);
drivers/gpu/drm/bridge/th1520-dw-hdmi.c
148
struct dw_hdmi *hdmi = platform_get_drvdata(pdev);
drivers/gpu/drm/bridge/th1520-dw-hdmi.c
150
dw_hdmi_remove(hdmi);
drivers/gpu/drm/bridge/th1520-dw-hdmi.c
58
th1520_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data,
drivers/gpu/drm/bridge/th1520-dw-hdmi.c
72
static void th1520_hdmi_phy_set_params(struct dw_hdmi *hdmi,
drivers/gpu/drm/bridge/th1520-dw-hdmi.c
75
dw_hdmi_phy_i2c_write(hdmi, params->opmode_pllcfg,
drivers/gpu/drm/bridge/th1520-dw-hdmi.c
77
dw_hdmi_phy_i2c_write(hdmi, params->pllcurrgmpctrl,
drivers/gpu/drm/bridge/th1520-dw-hdmi.c
79
dw_hdmi_phy_i2c_write(hdmi, params->plldivctrl,
drivers/gpu/drm/bridge/th1520-dw-hdmi.c
81
dw_hdmi_phy_i2c_write(hdmi, params->vlevctrl,
drivers/gpu/drm/bridge/th1520-dw-hdmi.c
83
dw_hdmi_phy_i2c_write(hdmi, params->cksymtxctrl,
drivers/gpu/drm/bridge/th1520-dw-hdmi.c
85
dw_hdmi_phy_i2c_write(hdmi, params->txterm,
drivers/gpu/drm/bridge/th1520-dw-hdmi.c
89
static int th1520_hdmi_phy_configure(struct dw_hdmi *hdmi, void *data,
drivers/gpu/drm/bridge/th1520-dw-hdmi.c
96
th1520_hdmi_phy_set_params(hdmi,
drivers/gpu/drm/display/drm_bridge_connector.c
217
struct drm_bridge *hdmi = bridge_connector->bridge_hdmi;
drivers/gpu/drm/display/drm_bridge_connector.c
223
if (hdmi)
drivers/gpu/drm/display/drm_bridge_connector.c
248
struct drm_bridge *hdmi = bridge_connector->bridge_hdmi;
drivers/gpu/drm/display/drm_bridge_connector.c
250
if (hdmi)
drivers/gpu/drm/display/drm_bridge_connector.c
568
.hdmi = {
drivers/gpu/drm/display/drm_dp_helper.c
3952
struct drm_hdmi_info *hdmi = &connector->display_info.hdmi;
drivers/gpu/drm/display/drm_dp_helper.c
3954
for (i = 0; i < hdmi->max_lanes; i++) {
drivers/gpu/drm/display/drm_hdmi_state_helper.c
1005
const struct drm_connector_hdmi_funcs *funcs = connector->hdmi.funcs;
drivers/gpu/drm/display/drm_hdmi_state_helper.c
1021
mutex_lock(&connector->hdmi.infoframes.lock);
drivers/gpu/drm/display/drm_hdmi_state_helper.c
1025
&old_conn_state->hdmi.infoframes.avi,
drivers/gpu/drm/display/drm_hdmi_state_helper.c
1026
&new_conn_state->hdmi.infoframes.avi);
drivers/gpu/drm/display/drm_hdmi_state_helper.c
1030
if (connector->hdmi.infoframes.audio.set) {
drivers/gpu/drm/display/drm_hdmi_state_helper.c
1033
&connector->hdmi.infoframes.audio);
drivers/gpu/drm/display/drm_hdmi_state_helper.c
1040
&old_conn_state->hdmi.infoframes.hdr_drm,
drivers/gpu/drm/display/drm_hdmi_state_helper.c
1041
&new_conn_state->hdmi.infoframes.hdr_drm);
drivers/gpu/drm/display/drm_hdmi_state_helper.c
1047
&old_conn_state->hdmi.infoframes.spd,
drivers/gpu/drm/display/drm_hdmi_state_helper.c
1048
&new_conn_state->hdmi.infoframes.spd);
drivers/gpu/drm/display/drm_hdmi_state_helper.c
1054
&funcs->hdmi, "HDMI-VS",
drivers/gpu/drm/display/drm_hdmi_state_helper.c
1055
&old_conn_state->hdmi.infoframes.hdmi,
drivers/gpu/drm/display/drm_hdmi_state_helper.c
1056
&new_conn_state->hdmi.infoframes.hdmi);
drivers/gpu/drm/display/drm_hdmi_state_helper.c
1062
mutex_unlock(&connector->hdmi.infoframes.lock);
drivers/gpu/drm/display/drm_hdmi_state_helper.c
1083
const struct drm_connector_hdmi_funcs *funcs = connector->hdmi.funcs;
drivers/gpu/drm/display/drm_hdmi_state_helper.c
1085
&connector->hdmi.infoframes.audio;
drivers/gpu/drm/display/drm_hdmi_state_helper.c
1097
mutex_lock(&connector->hdmi.infoframes.lock);
drivers/gpu/drm/display/drm_hdmi_state_helper.c
1104
mutex_unlock(&connector->hdmi.infoframes.lock);
drivers/gpu/drm/display/drm_hdmi_state_helper.c
1124
const struct drm_connector_hdmi_funcs *funcs = connector->hdmi.funcs;
drivers/gpu/drm/display/drm_hdmi_state_helper.c
1126
&connector->hdmi.infoframes.audio;
drivers/gpu/drm/display/drm_hdmi_state_helper.c
1138
mutex_lock(&connector->hdmi.infoframes.lock);
drivers/gpu/drm/display/drm_hdmi_state_helper.c
1146
mutex_unlock(&connector->hdmi.infoframes.lock);
drivers/gpu/drm/display/drm_hdmi_state_helper.c
1166
if (connector->hdmi.funcs->read_edid)
drivers/gpu/drm/display/drm_hdmi_state_helper.c
1167
drm_edid = connector->hdmi.funcs->read_edid(connector);
drivers/gpu/drm/display/drm_hdmi_state_helper.c
325
new_conn_state->hdmi.broadcast_rgb = DRM_HDMI_BROADCAST_RGB_AUTO;
drivers/gpu/drm/display/drm_hdmi_state_helper.c
382
if (conn_state->hdmi.output_format != DRM_OUTPUT_COLOR_FORMAT_RGB444)
drivers/gpu/drm/display/drm_hdmi_state_helper.c
385
if (conn_state->hdmi.broadcast_rgb == DRM_HDMI_BROADCAST_RGB_FULL)
drivers/gpu/drm/display/drm_hdmi_state_helper.c
388
if (conn_state->hdmi.broadcast_rgb == DRM_HDMI_BROADCAST_RGB_LIMITED)
drivers/gpu/drm/display/drm_hdmi_state_helper.c
428
if (!(connector->hdmi.supported_formats & BIT(format))) {
drivers/gpu/drm/display/drm_hdmi_state_helper.c
481
if (bpc == 10 && !(info->hdmi.y420_dc_modes & DRM_EDID_YCBCR420_DC_30)) {
drivers/gpu/drm/display/drm_hdmi_state_helper.c
486
if (bpc == 12 && !(info->hdmi.y420_dc_modes & DRM_EDID_YCBCR420_DC_36)) {
drivers/gpu/drm/display/drm_hdmi_state_helper.c
491
if (bpc == 16 && !(info->hdmi.y420_dc_modes & DRM_EDID_YCBCR420_DC_48)) {
drivers/gpu/drm/display/drm_hdmi_state_helper.c
555
const struct drm_connector_hdmi_funcs *funcs = connector->hdmi.funcs;
drivers/gpu/drm/display/drm_hdmi_state_helper.c
589
conn_state->hdmi.tmds_char_rate = clock;
drivers/gpu/drm/display/drm_hdmi_state_helper.c
625
bpc, conn_state->hdmi.tmds_char_rate);
drivers/gpu/drm/display/drm_hdmi_state_helper.c
645
conn_state->hdmi.output_bpc = bpc;
drivers/gpu/drm/display/drm_hdmi_state_helper.c
646
conn_state->hdmi.output_format = fmt;
drivers/gpu/drm/display/drm_hdmi_state_helper.c
651
conn_state->hdmi.output_bpc,
drivers/gpu/drm/display/drm_hdmi_state_helper.c
652
drm_hdmi_connector_get_output_format_name(conn_state->hdmi.output_format),
drivers/gpu/drm/display/drm_hdmi_state_helper.c
653
conn_state->hdmi.tmds_char_rate);
drivers/gpu/drm/display/drm_hdmi_state_helper.c
700
&conn_state->hdmi.infoframes.avi;
drivers/gpu/drm/display/drm_hdmi_state_helper.c
703
bool is_limited_range = conn_state->hdmi.is_limited_range;
drivers/gpu/drm/display/drm_hdmi_state_helper.c
716
conn_state->hdmi.output_format);
drivers/gpu/drm/display/drm_hdmi_state_helper.c
736
&conn_state->hdmi.infoframes.spd;
drivers/gpu/drm/display/drm_hdmi_state_helper.c
743
if (!connector->hdmi.funcs->spd.write_infoframe)
drivers/gpu/drm/display/drm_hdmi_state_helper.c
747
connector->hdmi.vendor,
drivers/gpu/drm/display/drm_hdmi_state_helper.c
748
connector->hdmi.product);
drivers/gpu/drm/display/drm_hdmi_state_helper.c
763
&conn_state->hdmi.infoframes.hdr_drm;
drivers/gpu/drm/display/drm_hdmi_state_helper.c
770
if (!connector->hdmi.funcs->hdr_drm.write_infoframe)
drivers/gpu/drm/display/drm_hdmi_state_helper.c
795
&conn_state->hdmi.infoframes.hdmi;
drivers/gpu/drm/display/drm_hdmi_state_helper.c
797
&infoframe->data.vendor.hdmi;
drivers/gpu/drm/display/drm_hdmi_state_helper.c
878
new_conn_state->hdmi.is_limited_range = hdmi_is_limited_range(connector, new_conn_state);
drivers/gpu/drm/display/drm_hdmi_state_helper.c
884
if (old_conn_state->hdmi.broadcast_rgb != new_conn_state->hdmi.broadcast_rgb ||
drivers/gpu/drm/display/drm_hdmi_state_helper.c
885
old_conn_state->hdmi.output_bpc != new_conn_state->hdmi.output_bpc ||
drivers/gpu/drm/display/drm_hdmi_state_helper.c
886
old_conn_state->hdmi.output_format != new_conn_state->hdmi.output_format) {
drivers/gpu/drm/drm_atomic.c
1360
drm_hdmi_connector_get_broadcast_rgb_name(state->hdmi.broadcast_rgb));
drivers/gpu/drm/drm_atomic.c
1361
drm_printf_indent(p, 1, "is_limited_range=%c\n", state->hdmi.is_limited_range ? 'y' : 'n');
drivers/gpu/drm/drm_atomic.c
1362
drm_printf_indent(p, 1, "output_bpc=%u\n", state->hdmi.output_bpc);
drivers/gpu/drm/drm_atomic.c
1364
drm_hdmi_connector_get_output_format_name(state->hdmi.output_format));
drivers/gpu/drm/drm_atomic.c
1365
drm_printf_indent(p, 1, "tmds_char_rate=%llu\n", state->hdmi.tmds_char_rate);
drivers/gpu/drm/drm_atomic_uapi.c
1047
*val = state->hdmi.broadcast_rgb;
drivers/gpu/drm/drm_atomic_uapi.c
962
state->hdmi.broadcast_rgb = val;
drivers/gpu/drm/drm_connector.c
286
mutex_init(&connector->hdmi.infoframes.lock);
drivers/gpu/drm/drm_connector.c
605
!hdmi_funcs->hdmi.clear_infoframe ||
drivers/gpu/drm/drm_connector.c
606
!hdmi_funcs->hdmi.write_infoframe)
drivers/gpu/drm/drm_connector.c
613
connector->hdmi.supported_formats = supported_formats;
drivers/gpu/drm/drm_connector.c
614
strtomem_pad(connector->hdmi.vendor, vendor, 0);
drivers/gpu/drm/drm_connector.c
615
strtomem_pad(connector->hdmi.product, product, 0);
drivers/gpu/drm/drm_connector.c
630
connector->hdmi.funcs = hdmi_funcs;
drivers/gpu/drm/drm_connector.c
809
mutex_destroy(&connector->hdmi.infoframes.lock);
drivers/gpu/drm/drm_debugfs.c
646
mutex_lock(&connector->hdmi.infoframes.lock);
drivers/gpu/drm/drm_debugfs.c
648
infoframe = &connector->hdmi.infoframes.audio;
drivers/gpu/drm/drm_debugfs.c
660
mutex_unlock(&connector->hdmi.infoframes.lock);
drivers/gpu/drm/drm_debugfs.c
675
if (!connector->hdmi.funcs ||
drivers/gpu/drm/drm_debugfs.c
676
!connector->hdmi.funcs->audio.write_infoframe)
drivers/gpu/drm/drm_debugfs.c
706
infoframe = &conn_state->hdmi.infoframes._f; \
drivers/gpu/drm/drm_debugfs.c
733
if (!connector->hdmi.funcs || \
drivers/gpu/drm/drm_debugfs.c
734
!connector->hdmi.funcs->_f.write_infoframe) \
drivers/gpu/drm/drm_debugfs.c
744
DEFINE_INFOFRAME_FILE(hdmi);
drivers/gpu/drm/drm_edid.c
5924
bool hdmi = false;
drivers/gpu/drm/drm_edid.c
5933
hdmi = true;
drivers/gpu/drm/drm_edid.c
5939
return hdmi;
drivers/gpu/drm/drm_edid.c
6082
struct drm_hdmi_info *hdmi = &info->hdmi;
drivers/gpu/drm/drm_edid.c
6089
bitmap_set(hdmi->y420_cmdb_modes, vic, 1);
drivers/gpu/drm/drm_edid.c
6114
struct drm_hdmi_info *hdmi = &info->hdmi;
drivers/gpu/drm/drm_edid.c
6124
bitmap_set(hdmi->y420_vdb_modes, vic, 1);
drivers/gpu/drm/drm_edid.c
6179
struct drm_hdmi_info *hdmi = &connector->display_info.hdmi;
drivers/gpu/drm/drm_edid.c
6182
hdmi->y420_dc_modes = dc_mask;
drivers/gpu/drm/drm_edid.c
6261
struct drm_hdmi_info *hdmi = &info->hdmi;
drivers/gpu/drm/drm_edid.c
6262
struct drm_hdmi_dsc_cap *hdmi_dsc = &hdmi->dsc_cap;
drivers/gpu/drm/drm_edid.c
6270
hdmi->scdc.supported = true;
drivers/gpu/drm/drm_edid.c
6272
hdmi->scdc.read_request = true;
drivers/gpu/drm/drm_edid.c
6285
struct drm_scdc *scdc = &hdmi->scdc;
drivers/gpu/drm/drm_edid.c
6305
drm_get_max_frl_rate(max_frl_rate, &hdmi->max_lanes,
drivers/gpu/drm/drm_edid.c
6306
&hdmi->max_frl_rate_per_lane);
drivers/gpu/drm/drm_edid.c
6323
const u8 *hdmi)
drivers/gpu/drm/drm_edid.c
6331
if (cea_db_payload_len(hdmi) < 6)
drivers/gpu/drm/drm_edid.c
6334
if (hdmi[6] & DRM_EDID_HDMI_DC_30) {
drivers/gpu/drm/drm_edid.c
6341
if (hdmi[6] & DRM_EDID_HDMI_DC_36) {
drivers/gpu/drm/drm_edid.c
6348
if (hdmi[6] & DRM_EDID_HDMI_DC_48) {
drivers/gpu/drm/drm_edid.c
6366
if (hdmi[6] & DRM_EDID_HDMI_DC_Y444) {
drivers/gpu/drm/drm_edid.c
6376
if (!(hdmi[6] & DRM_EDID_HDMI_DC_36)) {
drivers/gpu/drm/drm_edid.c
6694
memset(&info->hdmi, 0, sizeof(info->hdmi));
drivers/gpu/drm/drm_edid.c
7303
return connector->display_info.hdmi.scdc.supported ||
drivers/gpu/drm/drm_modes.c
2716
return test_bit(vic, display->hdmi.y420_vdb_modes);
drivers/gpu/drm/drm_modes.c
2736
return test_bit(vic, display->hdmi.y420_cmdb_modes);
drivers/gpu/drm/exynos/exynos_hdmi.c
838
ret = drm_hdmi_vendor_infoframe_from_display_mode(&frm.vendor.hdmi,
drivers/gpu/drm/exynos/exynos_hdmi.c
841
ret = hdmi_vendor_infoframe_pack(&frm.vendor.hdmi, buf,
drivers/gpu/drm/exynos/exynos_mixer.c
111
struct clk *hdmi;
drivers/gpu/drm/exynos/exynos_mixer.c
1273
clk_disable_unprepare(ctx->hdmi);
drivers/gpu/drm/exynos/exynos_mixer.c
1296
ret = clk_prepare_enable(ctx->hdmi);
drivers/gpu/drm/exynos/exynos_mixer.c
791
mixer_ctx->hdmi = devm_clk_get(dev, "hdmi");
drivers/gpu/drm/exynos/exynos_mixer.c
792
if (IS_ERR(mixer_ctx->hdmi)) {
drivers/gpu/drm/exynos/exynos_mixer.c
794
return PTR_ERR(mixer_ctx->hdmi);
drivers/gpu/drm/i915/display/g4x_hdmi.c
211
&pipe_config->infoframes.hdmi);
drivers/gpu/drm/i915/display/g4x_hdmi.c
236
struct intel_hdmi *hdmi = enc_to_intel_hdmi(encoder);
drivers/gpu/drm/i915/display/g4x_hdmi.c
244
intel_de_rmw(display, hdmi->hdmi_reg, 0, HDMI_AUDIO_ENABLE);
drivers/gpu/drm/i915/display/g4x_hdmi.c
254
struct intel_hdmi *hdmi = enc_to_intel_hdmi(encoder);
drivers/gpu/drm/i915/display/g4x_hdmi.c
262
intel_de_rmw(display, hdmi->hdmi_reg, HDMI_AUDIO_ENABLE, 0);
drivers/gpu/drm/i915/display/g4x_hdmi.c
761
dig_port->hdmi.hdmi_reg = hdmi_reg;
drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
271
intel_dump_infoframe(display, &pipe_config->infoframes.hdmi);
drivers/gpu/drm/i915/display/intel_cx0_phy.h
63
int intel_cx0_phy_check_hdmi_link_rate(struct intel_hdmi *hdmi, int clock);
drivers/gpu/drm/i915/display/intel_ddi.c
2987
struct intel_hdmi *intel_hdmi = &dig_port->hdmi;
drivers/gpu/drm/i915/display/intel_ddi.c
3196
struct intel_hdmi *intel_hdmi = &dig_port->hdmi;
drivers/gpu/drm/i915/display/intel_ddi.c
4212
&pipe_config->infoframes.hdmi);
drivers/gpu/drm/i915/display/intel_ddi.c
4750
struct intel_hdmi *hdmi = enc_to_intel_hdmi(encoder);
drivers/gpu/drm/i915/display/intel_ddi.c
4751
struct intel_connector *connector = hdmi->attached_connector;
drivers/gpu/drm/i915/display/intel_ddi.c
4918
dig_port->hdmi.hdmi_reg = DDI_BUF_CTL(port);
drivers/gpu/drm/i915/display/intel_ddi.c
4926
dig_port->hdmi.hdmi_reg = INVALID_MMIO_REG;
drivers/gpu/drm/i915/display/intel_display.c
5434
PIPE_CONF_CHECK_INFOFRAME(hdmi);
drivers/gpu/drm/i915/display/intel_display_types.h
1297
union hdmi_infoframe hdmi;
drivers/gpu/drm/i915/display/intel_display_types.h
1980
struct intel_hdmi hdmi;
drivers/gpu/drm/i915/display/intel_display_types.h
2096
return &enc_to_dig_port(encoder)->hdmi;
drivers/gpu/drm/i915/display/intel_display_types.h
2154
return container_of(intel_hdmi, struct intel_digital_port, hdmi);
drivers/gpu/drm/i915/display/intel_dp.c
4241
max_lanes = info->hdmi.max_lanes;
drivers/gpu/drm/i915/display/intel_dp.c
4242
rate_per_lane = info->hdmi.max_frl_rate_per_lane;
drivers/gpu/drm/i915/display/intel_dp.c
4252
info->hdmi.dsc_cap.v_1p2) {
drivers/gpu/drm/i915/display/intel_dp.c
4253
max_dsc_lanes = info->hdmi.dsc_cap.max_lanes;
drivers/gpu/drm/i915/display/intel_dp.c
4254
dsc_rate_per_lane = info->hdmi.dsc_cap.max_frl_rate_per_lane;
drivers/gpu/drm/i915/display/intel_dp.c
4418
int hdmi_throughput = info->hdmi.dsc_cap.clk_per_slice;
drivers/gpu/drm/i915/display/intel_dp.c
4419
int hdmi_max_slices = info->hdmi.dsc_cap.max_slices;
drivers/gpu/drm/i915/display/intel_dp.c
4436
bool hdmi_all_bpp = info->hdmi.dsc_cap.all_bpp;
drivers/gpu/drm/i915/display/intel_dp.c
4439
info->hdmi.dsc_cap.total_chunk_kbytes * 1024;
drivers/gpu/drm/i915/display/intel_dp.c
4469
hdmi_is_dsc_1_2 = info->hdmi.dsc_cap.v_1p2;
drivers/gpu/drm/i915/display/intel_encoder.c
115
dig_port->hdmi.hdmi_reg = INVALID_MMIO_REG;
drivers/gpu/drm/i915/display/intel_hdmi.c
1071
struct intel_hdmi *intel_hdmi = &dig_port->hdmi;
drivers/gpu/drm/i915/display/intel_hdmi.c
1119
&crtc_state->infoframes.hdmi);
drivers/gpu/drm/i915/display/intel_hdmi.c
1168
&crtc_state->infoframes.hdmi);
drivers/gpu/drm/i915/display/intel_hdmi.c
1226
&crtc_state->infoframes.hdmi);
drivers/gpu/drm/i915/display/intel_hdmi.c
1291
&crtc_state->infoframes.hdmi);
drivers/gpu/drm/i915/display/intel_hdmi.c
1297
void intel_dp_dual_mode_set_tmds_output(struct intel_hdmi *hdmi, bool enable)
drivers/gpu/drm/i915/display/intel_hdmi.c
1299
struct intel_display *display = to_intel_display(hdmi);
drivers/gpu/drm/i915/display/intel_hdmi.c
1300
struct i2c_adapter *ddc = hdmi->attached_connector->base.ddc;
drivers/gpu/drm/i915/display/intel_hdmi.c
1302
if (hdmi->dp_dual_mode.type < DRM_DP_DUAL_MODE_TYPE2_DVI)
drivers/gpu/drm/i915/display/intel_hdmi.c
1309
hdmi->dp_dual_mode.type, ddc, enable);
drivers/gpu/drm/i915/display/intel_hdmi.c
1315
struct intel_hdmi *hdmi = &dig_port->hdmi;
drivers/gpu/drm/i915/display/intel_hdmi.c
1316
struct i2c_adapter *ddc = hdmi->attached_connector->base.ddc;
drivers/gpu/drm/i915/display/intel_hdmi.c
1342
struct intel_hdmi *hdmi = &dig_port->hdmi;
drivers/gpu/drm/i915/display/intel_hdmi.c
1343
struct i2c_adapter *ddc = hdmi->attached_connector->base.ddc;
drivers/gpu/drm/i915/display/intel_hdmi.c
1375
struct intel_hdmi *hdmi = &dig_port->hdmi;
drivers/gpu/drm/i915/display/intel_hdmi.c
1376
struct i2c_adapter *ddc = hdmi->attached_connector->base.ddc;
drivers/gpu/drm/i915/display/intel_hdmi.c
1553
struct intel_hdmi *hdmi = &dig_port->hdmi;
drivers/gpu/drm/i915/display/intel_hdmi.c
1554
struct intel_connector *connector = hdmi->attached_connector;
drivers/gpu/drm/i915/display/intel_hdmi.c
1736
struct intel_hdmi *hdmi = &dig_port->hdmi;
drivers/gpu/drm/i915/display/intel_hdmi.c
1737
struct intel_hdcp *hdcp = &hdmi->attached_connector->hdcp;
drivers/gpu/drm/i915/display/intel_hdmi.c
1847
static bool intel_has_hdmi_sink(struct intel_hdmi *hdmi,
drivers/gpu/drm/i915/display/intel_hdmi.c
1850
struct intel_connector *connector = hdmi->attached_connector;
drivers/gpu/drm/i915/display/intel_hdmi.c
1861
static int hdmi_port_clock_limit(struct intel_hdmi *hdmi,
drivers/gpu/drm/i915/display/intel_hdmi.c
1865
struct intel_encoder *encoder = &hdmi_to_dig_port(hdmi)->base;
drivers/gpu/drm/i915/display/intel_hdmi.c
1869
struct intel_connector *connector = hdmi->attached_connector;
drivers/gpu/drm/i915/display/intel_hdmi.c
1872
if (hdmi->dp_dual_mode.max_tmds_clock)
drivers/gpu/drm/i915/display/intel_hdmi.c
1874
hdmi->dp_dual_mode.max_tmds_clock);
drivers/gpu/drm/i915/display/intel_hdmi.c
1887
hdmi_port_clock_valid(struct intel_hdmi *hdmi,
drivers/gpu/drm/i915/display/intel_hdmi.c
1891
struct intel_display *display = to_intel_display(hdmi);
drivers/gpu/drm/i915/display/intel_hdmi.c
1892
struct intel_encoder *encoder = &hdmi_to_dig_port(hdmi)->base;
drivers/gpu/drm/i915/display/intel_hdmi.c
1896
if (clock > hdmi_port_clock_limit(hdmi, respect_downstream_limits,
drivers/gpu/drm/i915/display/intel_hdmi.c
1960
const struct drm_hdmi_info *hdmi = &info->hdmi;
drivers/gpu/drm/i915/display/intel_hdmi.c
1968
return hdmi->y420_dc_modes & DRM_EDID_YCBCR420_DC_36;
drivers/gpu/drm/i915/display/intel_hdmi.c
1976
return hdmi->y420_dc_modes & DRM_EDID_YCBCR420_DC_30;
drivers/gpu/drm/i915/display/intel_hdmi.c
1994
struct intel_hdmi *hdmi = intel_attached_hdmi(connector);
drivers/gpu/drm/i915/display/intel_hdmi.c
2013
status = hdmi_port_clock_valid(hdmi, tmds_clock, true, has_hdmi_sink);
drivers/gpu/drm/i915/display/intel_hdmi.c
2075
struct intel_hdmi *hdmi = intel_attached_hdmi(connector);
drivers/gpu/drm/i915/display/intel_hdmi.c
2080
bool has_hdmi_sink = intel_has_hdmi_sink(hdmi, connector->base.state);
drivers/gpu/drm/i915/display/intel_hdmi.c
2368
struct intel_hdmi *hdmi = enc_to_intel_hdmi(encoder);
drivers/gpu/drm/i915/display/intel_hdmi.c
2370
return intel_has_hdmi_sink(hdmi, conn_state) &&
drivers/gpu/drm/i915/display/intel_hdmi.c
2381
struct drm_scdc *scdc = &connector->base.display_info.hdmi.scdc;
drivers/gpu/drm/i915/display/intel_hdmi.c
2500
struct intel_hdmi *hdmi = intel_attached_hdmi(connector);
drivers/gpu/drm/i915/display/intel_hdmi.c
2501
struct intel_encoder *encoder = &hdmi_to_dig_port(hdmi)->base;
drivers/gpu/drm/i915/display/intel_hdmi.c
2530
hdmi->dp_dual_mode.type = type;
drivers/gpu/drm/i915/display/intel_hdmi.c
2531
hdmi->dp_dual_mode.max_tmds_clock =
drivers/gpu/drm/i915/display/intel_hdmi.c
2537
hdmi->dp_dual_mode.max_tmds_clock);
drivers/gpu/drm/i915/display/intel_hdmi.c
2544
hdmi->dp_dual_mode.max_tmds_clock = 0;
drivers/gpu/drm/i915/display/intel_hdmi.c
2783
&connector->base.display_info.hdmi.scdc.scrambling;
drivers/gpu/drm/i915/display/intel_hdmi.c
3031
connector = enc_to_dig_port(other)->hdmi.attached_connector;
drivers/gpu/drm/i915/display/intel_hdmi.c
3123
struct intel_hdmi *intel_hdmi = &dig_port->hdmi;
drivers/gpu/drm/i915/display/intel_hdmi.c
820
&crtc_state->infoframes.hdmi.vendor.hdmi;
drivers/gpu/drm/i915/display/intel_hdmi.c
886
struct intel_hdmi *intel_hdmi = &dig_port->hdmi;
drivers/gpu/drm/i915/display/intel_hdmi.c
946
&crtc_state->infoframes.hdmi);
drivers/gpu/drm/i915/display/intel_hdmi.h
37
void intel_dp_dual_mode_set_tmds_output(struct intel_hdmi *hdmi, bool enable);
drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c
112
struct imx_hdmi *hdmi = enc_to_imx_hdmi(encoder);
drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c
113
int mux = drm_of_encoder_active_port_id(hdmi->dev->of_node, encoder);
drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c
115
regmap_update_bits(hdmi->regmap, IOMUXC_GPR3,
drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c
139
imx6q_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data,
drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c
153
imx6dl_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data,
drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c
204
hdmi_encoder->hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c
213
return drm_bridge_attach(encoder, hdmi_encoder->hdmi->bridge, NULL, 0);
drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c
224
struct imx_hdmi *hdmi;
drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c
227
hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL);
drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c
228
if (!hdmi)
drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c
231
platform_set_drvdata(pdev, hdmi);
drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c
232
hdmi->dev = &pdev->dev;
drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c
234
hdmi->regmap = syscon_regmap_lookup_by_phandle(np, "gpr");
drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c
235
if (IS_ERR(hdmi->regmap)) {
drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c
236
dev_err(hdmi->dev, "Unable to get gpr\n");
drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c
237
return PTR_ERR(hdmi->regmap);
drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c
240
hdmi->hdmi = dw_hdmi_probe(pdev, match->data);
drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c
241
if (IS_ERR(hdmi->hdmi))
drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c
242
return PTR_ERR(hdmi->hdmi);
drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c
244
hdmi->bridge = of_drm_find_and_get_bridge(np);
drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c
245
if (!hdmi->bridge) {
drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c
246
dev_err(hdmi->dev, "Unable to find bridge\n");
drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c
247
dw_hdmi_remove(hdmi->hdmi);
drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c
253
drm_bridge_put(hdmi->bridge);
drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c
254
dw_hdmi_remove(hdmi->hdmi);
drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c
262
struct imx_hdmi *hdmi = platform_get_drvdata(pdev);
drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c
265
drm_bridge_put(hdmi->bridge);
drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c
266
dw_hdmi_remove(hdmi->hdmi);
drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c
31
struct imx_hdmi *hdmi;
drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c
37
struct dw_hdmi *hdmi;
drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c
43
return container_of(e, struct imx_hdmi_encoder, encoder)->hdmi;
drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c
47
ingenic_dw_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data,
drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c
76
struct dw_hdmi *hdmi = (struct dw_hdmi *)data;
drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c
78
dw_hdmi_remove(hdmi);
drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c
83
struct dw_hdmi *hdmi;
drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c
85
hdmi = dw_hdmi_probe(pdev, &ingenic_dw_hdmi_plat_data);
drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c
86
if (IS_ERR(hdmi))
drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c
87
return PTR_ERR(hdmi);
drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c
89
return devm_add_action_or_reset(&pdev->dev, ingenic_dw_hdmi_cleanup, hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi.c
100
regmap_update_bits(hdmi->sys_regmap, hdmi->sys_offset + HDMI_SYS_CFG1C,
drivers/gpu/drm/mediatek/mtk_hdmi.c
1004
struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1006
if (!hdmi->enabled)
drivers/gpu/drm/mediatek/mtk_hdmi.c
1009
phy_power_off(hdmi->phy);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1010
clk_disable_unprepare(hdmi->clk[MTK_HDMI_CLK_HDMI_PIXEL]);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1011
clk_disable_unprepare(hdmi->clk[MTK_HDMI_CLK_HDMI_PLL]);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1013
hdmi->curr_conn = NULL;
drivers/gpu/drm/mediatek/mtk_hdmi.c
1015
hdmi->enabled = false;
drivers/gpu/drm/mediatek/mtk_hdmi.c
1021
struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1023
if (!hdmi->powered)
drivers/gpu/drm/mediatek/mtk_hdmi.c
1026
mtk_hdmi_hw_1p4_version_enable(hdmi, true);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1027
mtk_hdmi_hw_make_reg_writable(hdmi, false);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1029
hdmi->powered = false;
drivers/gpu/drm/mediatek/mtk_hdmi.c
1035
struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1037
mtk_hdmi_hw_make_reg_writable(hdmi, true);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1038
mtk_hdmi_hw_1p4_version_enable(hdmi, true);
drivers/gpu/drm/mediatek/mtk_hdmi.c
104
static void mtk_hdmi_hw_enable_notice(struct mtk_hdmi *hdmi, bool enable_notice)
drivers/gpu/drm/mediatek/mtk_hdmi.c
1040
hdmi->powered = true;
drivers/gpu/drm/mediatek/mtk_hdmi.c
1043
static void mtk_hdmi_send_infoframe(struct mtk_hdmi *hdmi,
drivers/gpu/drm/mediatek/mtk_hdmi.c
1046
mtk_hdmi_setup_audio_infoframe(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1047
mtk_hdmi_setup_avi_infoframe(hdmi, mode);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1048
mtk_hdmi_setup_spd_infoframe(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1050
mtk_hdmi_setup_vendor_specific_infoframe(hdmi, mode);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1056
struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1059
hdmi->curr_conn = drm_atomic_get_new_connector_for_encoder(state,
drivers/gpu/drm/mediatek/mtk_hdmi.c
106
regmap_update_bits(hdmi->regs, GRL_CFG2, CFG2_NOTICE_EN,
drivers/gpu/drm/mediatek/mtk_hdmi.c
1062
mtk_hdmi_output_set_display_mode(hdmi, &hdmi->mode);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1063
clk_prepare_enable(hdmi->clk[MTK_HDMI_CLK_HDMI_PLL]);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1064
clk_prepare_enable(hdmi->clk[MTK_HDMI_CLK_HDMI_PIXEL]);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1065
phy_power_on(hdmi->phy);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1066
mtk_hdmi_send_infoframe(hdmi, &hdmi->mode);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1068
hdmi->enabled = true;
drivers/gpu/drm/mediatek/mtk_hdmi.c
1095
struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1097
if (!hdmi->audio_enable) {
drivers/gpu/drm/mediatek/mtk_hdmi.c
1098
dev_err(hdmi->dev, "hdmi audio is in disable state!\n");
drivers/gpu/drm/mediatek/mtk_hdmi.c
110
static void mtk_hdmi_hw_write_int_mask(struct mtk_hdmi *hdmi, u32 int_mask)
drivers/gpu/drm/mediatek/mtk_hdmi.c
1102
mtk_hdmi_audio_params(hdmi, daifmt, params);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1103
mtk_hdmi_aud_output_config(hdmi, &hdmi->mode);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1110
struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1112
mtk_hdmi_audio_enable(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1119
struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/mediatek/mtk_hdmi.c
112
regmap_write(hdmi->regs, GRL_INT_MASK, int_mask);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1121
mtk_hdmi_audio_disable(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1128
struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1131
mtk_hdmi_hw_aud_mute(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1133
mtk_hdmi_hw_aud_unmute(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1142
struct mtk_hdmi *hdmi = data;
drivers/gpu/drm/mediatek/mtk_hdmi.c
1144
mtk_hdmi_audio_set_plugged_cb(hdmi, fn, codec_dev);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1145
mtk_hdmi_update_plugged_status(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi.c
115
static void mtk_hdmi_hw_enable_dvi_mode(struct mtk_hdmi *hdmi, bool enable)
drivers/gpu/drm/mediatek/mtk_hdmi.c
1161
struct mtk_hdmi *hdmi;
drivers/gpu/drm/mediatek/mtk_hdmi.c
1164
hdmi = mtk_hdmi_common_probe(pdev);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1165
if (IS_ERR(hdmi))
drivers/gpu/drm/mediatek/mtk_hdmi.c
1166
return PTR_ERR(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1168
if (!hdmi->cec_dev)
drivers/gpu/drm/mediatek/mtk_hdmi.c
1169
return dev_err_probe(hdmi->dev, -ENODEV, "CEC is required by HDMIv1\n");
drivers/gpu/drm/mediatek/mtk_hdmi.c
117
regmap_update_bits(hdmi->regs, GRL_CFG1, CFG1_DVI, enable ? CFG1_DVI : 0);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1171
ret = mtk_hdmi_clk_enable_audio(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1173
return dev_err_probe(hdmi->dev, ret,
drivers/gpu/drm/mediatek/mtk_hdmi.c
1181
struct mtk_hdmi *hdmi = platform_get_drvdata(pdev);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1183
mtk_hdmi_clk_disable_audio(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1188
struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1190
mtk_hdmi_clk_disable_audio(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1197
struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/mediatek/mtk_hdmi.c
1199
return mtk_hdmi_clk_enable_audio(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi.c
120
static void mtk_hdmi_hw_send_info_frame(struct mtk_hdmi *hdmi, u8 *buffer,
drivers/gpu/drm/mediatek/mtk_hdmi.c
138
dev_dbg(hdmi->dev,
drivers/gpu/drm/mediatek/mtk_hdmi.c
160
dev_err(hdmi->dev, "Unknown infoframe type %d\n", frame_type);
drivers/gpu/drm/mediatek/mtk_hdmi.c
163
regmap_clear_bits(hdmi->regs, ctrl_reg, ctrl_frame_en);
drivers/gpu/drm/mediatek/mtk_hdmi.c
164
regmap_write(hdmi->regs, GRL_INFOFRM_TYPE, frame_type);
drivers/gpu/drm/mediatek/mtk_hdmi.c
165
regmap_write(hdmi->regs, GRL_INFOFRM_VER, frame_ver);
drivers/gpu/drm/mediatek/mtk_hdmi.c
166
regmap_write(hdmi->regs, GRL_INFOFRM_LNG, frame_len);
drivers/gpu/drm/mediatek/mtk_hdmi.c
168
regmap_write(hdmi->regs, GRL_IFM_PORT, checksum);
drivers/gpu/drm/mediatek/mtk_hdmi.c
170
regmap_write(hdmi->regs, GRL_IFM_PORT, frame_data[i]);
drivers/gpu/drm/mediatek/mtk_hdmi.c
172
regmap_set_bits(hdmi->regs, ctrl_reg, ctrl_frame_en);
drivers/gpu/drm/mediatek/mtk_hdmi.c
175
static void mtk_hdmi_hw_send_aud_packet(struct mtk_hdmi *hdmi, bool enable)
drivers/gpu/drm/mediatek/mtk_hdmi.c
177
regmap_update_bits(hdmi->regs, GRL_SHIFT_R2,
drivers/gpu/drm/mediatek/mtk_hdmi.c
181
static void mtk_hdmi_hw_config_sys(struct mtk_hdmi *hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi.c
183
regmap_update_bits(hdmi->sys_regmap, hdmi->sys_offset + HDMI_SYS_CFG20,
drivers/gpu/drm/mediatek/mtk_hdmi.c
186
regmap_update_bits(hdmi->sys_regmap, hdmi->sys_offset + HDMI_SYS_CFG20,
drivers/gpu/drm/mediatek/mtk_hdmi.c
190
static void mtk_hdmi_hw_set_deep_color_mode(struct mtk_hdmi *hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi.c
192
regmap_update_bits(hdmi->sys_regmap, hdmi->sys_offset + HDMI_SYS_CFG20,
drivers/gpu/drm/mediatek/mtk_hdmi.c
197
static void mtk_hdmi_hw_send_av_mute(struct mtk_hdmi *hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi.c
199
regmap_clear_bits(hdmi->regs, GRL_CFG4, CTRL_AVMUTE);
drivers/gpu/drm/mediatek/mtk_hdmi.c
201
regmap_set_bits(hdmi->regs, GRL_CFG4, CTRL_AVMUTE);
drivers/gpu/drm/mediatek/mtk_hdmi.c
204
static void mtk_hdmi_hw_send_av_unmute(struct mtk_hdmi *hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi.c
206
regmap_update_bits(hdmi->regs, GRL_CFG4, CFG4_AV_UNMUTE_EN | CFG4_AV_UNMUTE_SET,
drivers/gpu/drm/mediatek/mtk_hdmi.c
209
regmap_update_bits(hdmi->regs, GRL_CFG4, CFG4_AV_UNMUTE_EN | CFG4_AV_UNMUTE_SET,
drivers/gpu/drm/mediatek/mtk_hdmi.c
213
static void mtk_hdmi_hw_ncts_enable(struct mtk_hdmi *hdmi, bool on)
drivers/gpu/drm/mediatek/mtk_hdmi.c
215
regmap_update_bits(hdmi->regs, GRL_CTS_CTRL, CTS_CTRL_SOFT,
drivers/gpu/drm/mediatek/mtk_hdmi.c
219
static void mtk_hdmi_hw_ncts_auto_write_enable(struct mtk_hdmi *hdmi,
drivers/gpu/drm/mediatek/mtk_hdmi.c
222
regmap_update_bits(hdmi->regs, GRL_CTS_CTRL, NCTS_WRI_ANYTIME,
drivers/gpu/drm/mediatek/mtk_hdmi.c
226
static void mtk_hdmi_hw_msic_setting(struct mtk_hdmi *hdmi,
drivers/gpu/drm/mediatek/mtk_hdmi.c
229
regmap_clear_bits(hdmi->regs, GRL_CFG4, CFG4_MHL_MODE);
drivers/gpu/drm/mediatek/mtk_hdmi.c
234
regmap_clear_bits(hdmi->regs, GRL_CFG2, CFG2_MHL_DE_SEL);
drivers/gpu/drm/mediatek/mtk_hdmi.c
236
regmap_set_bits(hdmi->regs, GRL_CFG2, CFG2_MHL_DE_SEL);
drivers/gpu/drm/mediatek/mtk_hdmi.c
239
static void mtk_hdmi_hw_aud_set_channel_swap(struct mtk_hdmi *hdmi,
drivers/gpu/drm/mediatek/mtk_hdmi.c
264
regmap_update_bits(hdmi->regs, GRL_CH_SWAP, 0xff, swap_bit);
drivers/gpu/drm/mediatek/mtk_hdmi.c
267
static void mtk_hdmi_hw_aud_set_bit_num(struct mtk_hdmi *hdmi,
drivers/gpu/drm/mediatek/mtk_hdmi.c
285
regmap_update_bits(hdmi->regs, GRL_AOUT_CFG, AOUT_BNUM_SEL_MASK, val);
drivers/gpu/drm/mediatek/mtk_hdmi.c
288
static void mtk_hdmi_hw_aud_set_i2s_fmt(struct mtk_hdmi *hdmi,
drivers/gpu/drm/mediatek/mtk_hdmi.c
293
regmap_read(hdmi->regs, GRL_CFG0, &val);
drivers/gpu/drm/mediatek/mtk_hdmi.c
317
regmap_write(hdmi->regs, GRL_CFG0, val);
drivers/gpu/drm/mediatek/mtk_hdmi.c
320
static void mtk_hdmi_hw_audio_config(struct mtk_hdmi *hdmi, bool dst)
drivers/gpu/drm/mediatek/mtk_hdmi.c
326
regmap_clear_bits(hdmi->regs, GRL_AOUT_CFG, HIGH_BIT_RATE_PACKET_ALIGN);
drivers/gpu/drm/mediatek/mtk_hdmi.c
333
regmap_update_bits(hdmi->regs, GRL_AUDIO_CFG, mask, val);
drivers/gpu/drm/mediatek/mtk_hdmi.c
336
static void mtk_hdmi_hw_aud_set_i2s_chan_num(struct mtk_hdmi *hdmi,
drivers/gpu/drm/mediatek/mtk_hdmi.c
374
regmap_write(hdmi->regs, GRL_CH_SW0, ch_switch & 0xff);
drivers/gpu/drm/mediatek/mtk_hdmi.c
375
regmap_write(hdmi->regs, GRL_CH_SW1, (ch_switch >> 8) & 0xff);
drivers/gpu/drm/mediatek/mtk_hdmi.c
376
regmap_write(hdmi->regs, GRL_CH_SW2, (ch_switch >> 16) & 0xff);
drivers/gpu/drm/mediatek/mtk_hdmi.c
377
regmap_write(hdmi->regs, GRL_I2S_UV, i2s_uv);
drivers/gpu/drm/mediatek/mtk_hdmi.c
380
static void mtk_hdmi_hw_aud_set_input_type(struct mtk_hdmi *hdmi,
drivers/gpu/drm/mediatek/mtk_hdmi.c
385
regmap_read(hdmi->regs, GRL_CFG1, &val);
drivers/gpu/drm/mediatek/mtk_hdmi.c
393
regmap_write(hdmi->regs, GRL_CFG1, val);
drivers/gpu/drm/mediatek/mtk_hdmi.c
396
static void mtk_hdmi_hw_aud_set_channel_status(struct mtk_hdmi *hdmi,
drivers/gpu/drm/mediatek/mtk_hdmi.c
402
regmap_write(hdmi->regs, GRL_I2S_C_STA0 + i * 4, channel_status[i]);
drivers/gpu/drm/mediatek/mtk_hdmi.c
403
regmap_write(hdmi->regs, GRL_L_STATUS_0 + i * 4, channel_status[i]);
drivers/gpu/drm/mediatek/mtk_hdmi.c
404
regmap_write(hdmi->regs, GRL_R_STATUS_0 + i * 4, channel_status[i]);
drivers/gpu/drm/mediatek/mtk_hdmi.c
407
regmap_write(hdmi->regs, GRL_L_STATUS_0 + i * 4, 0);
drivers/gpu/drm/mediatek/mtk_hdmi.c
408
regmap_write(hdmi->regs, GRL_R_STATUS_0 + i * 4, 0);
drivers/gpu/drm/mediatek/mtk_hdmi.c
412
static void mtk_hdmi_hw_aud_src_reenable(struct mtk_hdmi *hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi.c
416
regmap_read(hdmi->regs, GRL_MIX_CTRL, &val);
drivers/gpu/drm/mediatek/mtk_hdmi.c
419
regmap_write(hdmi->regs, GRL_MIX_CTRL, val);
drivers/gpu/drm/mediatek/mtk_hdmi.c
422
regmap_write(hdmi->regs, GRL_MIX_CTRL, val);
drivers/gpu/drm/mediatek/mtk_hdmi.c
426
static void mtk_hdmi_hw_aud_src_disable(struct mtk_hdmi *hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi.c
430
regmap_read(hdmi->regs, GRL_MIX_CTRL, &val);
drivers/gpu/drm/mediatek/mtk_hdmi.c
432
regmap_write(hdmi->regs, GRL_MIX_CTRL, val);
drivers/gpu/drm/mediatek/mtk_hdmi.c
433
regmap_write(hdmi->regs, GRL_SHIFT_L1, 0x00);
drivers/gpu/drm/mediatek/mtk_hdmi.c
436
static void mtk_hdmi_hw_aud_set_mclk(struct mtk_hdmi *hdmi,
drivers/gpu/drm/mediatek/mtk_hdmi.c
441
regmap_read(hdmi->regs, GRL_CFG5, &val);
drivers/gpu/drm/mediatek/mtk_hdmi.c
464
regmap_write(hdmi->regs, GRL_CFG5, val);
drivers/gpu/drm/mediatek/mtk_hdmi.c
467
static void do_hdmi_hw_aud_set_ncts(struct mtk_hdmi *hdmi, unsigned int n,
drivers/gpu/drm/mediatek/mtk_hdmi.c
47
static void mtk_hdmi_hw_vid_black(struct mtk_hdmi *hdmi, bool black)
drivers/gpu/drm/mediatek/mtk_hdmi.c
473
regmap_write(hdmi->regs, GRL_NCTS, 0);
drivers/gpu/drm/mediatek/mtk_hdmi.c
474
regmap_write(hdmi->regs, GRL_NCTS, 0);
drivers/gpu/drm/mediatek/mtk_hdmi.c
475
regmap_write(hdmi->regs, GRL_NCTS, 0);
drivers/gpu/drm/mediatek/mtk_hdmi.c
488
regmap_write(hdmi->regs, GRL_NCTS, val[i]);
drivers/gpu/drm/mediatek/mtk_hdmi.c
49
regmap_update_bits(hdmi->regs, VIDEO_CFG_4,
drivers/gpu/drm/mediatek/mtk_hdmi.c
491
static void mtk_hdmi_hw_aud_set_ncts(struct mtk_hdmi *hdmi,
drivers/gpu/drm/mediatek/mtk_hdmi.c
499
dev_dbg(hdmi->dev, "%s: sample_rate=%u, clock=%d, cts=%u, n=%u\n",
drivers/gpu/drm/mediatek/mtk_hdmi.c
502
regmap_update_bits(hdmi->regs, DUMMY_304, AUDIO_I2S_NCTS_SEL, AUDIO_I2S_NCTS_SEL_64);
drivers/gpu/drm/mediatek/mtk_hdmi.c
503
do_hdmi_hw_aud_set_ncts(hdmi, n, cts);
drivers/gpu/drm/mediatek/mtk_hdmi.c
53
static void mtk_hdmi_hw_make_reg_writable(struct mtk_hdmi *hdmi, bool enable)
drivers/gpu/drm/mediatek/mtk_hdmi.c
576
static int mtk_hdmi_video_change_vpll(struct mtk_hdmi *hdmi, u32 clock)
drivers/gpu/drm/mediatek/mtk_hdmi.c
582
ret = clk_set_rate(hdmi->clk[MTK_HDMI_CLK_HDMI_PLL], clock);
drivers/gpu/drm/mediatek/mtk_hdmi.c
584
dev_err(hdmi->dev, "Failed to set PLL to %u Hz: %d\n", clock,
drivers/gpu/drm/mediatek/mtk_hdmi.c
589
rate = clk_get_rate(hdmi->clk[MTK_HDMI_CLK_HDMI_PLL]);
drivers/gpu/drm/mediatek/mtk_hdmi.c
592
dev_warn(hdmi->dev, "Want PLL %u Hz, got %lu Hz\n", clock,
drivers/gpu/drm/mediatek/mtk_hdmi.c
595
dev_dbg(hdmi->dev, "Want PLL %u Hz, got %lu Hz\n", clock, rate);
drivers/gpu/drm/mediatek/mtk_hdmi.c
597
mtk_hdmi_hw_config_sys(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi.c
598
mtk_hdmi_hw_set_deep_color_mode(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi.c
602
static void mtk_hdmi_video_set_display_mode(struct mtk_hdmi *hdmi,
drivers/gpu/drm/mediatek/mtk_hdmi.c
605
mtk_hdmi_hw_reset(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi.c
606
mtk_hdmi_hw_enable_notice(hdmi, true);
drivers/gpu/drm/mediatek/mtk_hdmi.c
607
mtk_hdmi_hw_write_int_mask(hdmi, 0xff);
drivers/gpu/drm/mediatek/mtk_hdmi.c
608
mtk_hdmi_hw_enable_dvi_mode(hdmi, hdmi->dvi_mode);
drivers/gpu/drm/mediatek/mtk_hdmi.c
609
mtk_hdmi_hw_ncts_auto_write_enable(hdmi, true);
drivers/gpu/drm/mediatek/mtk_hdmi.c
611
mtk_hdmi_hw_msic_setting(hdmi, mode);
drivers/gpu/drm/mediatek/mtk_hdmi.c
615
static void mtk_hdmi_aud_set_input(struct mtk_hdmi *hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi.c
621
mtk_hdmi_hw_aud_set_channel_swap(hdmi, HDMI_AUD_SWAP_LFE_CC);
drivers/gpu/drm/mediatek/mtk_hdmi.c
622
regmap_set_bits(hdmi->regs, GRL_MIX_CTRL, MIX_CTRL_FLAT);
drivers/gpu/drm/mediatek/mtk_hdmi.c
624
if (hdmi->aud_param.aud_input_type == HDMI_AUD_INPUT_SPDIF &&
drivers/gpu/drm/mediatek/mtk_hdmi.c
625
hdmi->aud_param.aud_codec == HDMI_AUDIO_CODING_TYPE_DST) {
drivers/gpu/drm/mediatek/mtk_hdmi.c
626
mtk_hdmi_hw_aud_set_bit_num(hdmi, HDMI_AUDIO_SAMPLE_SIZE_24);
drivers/gpu/drm/mediatek/mtk_hdmi.c
627
} else if (hdmi->aud_param.aud_i2s_fmt == HDMI_I2S_MODE_LJT_24BIT) {
drivers/gpu/drm/mediatek/mtk_hdmi.c
628
hdmi->aud_param.aud_i2s_fmt = HDMI_I2S_MODE_LJT_16BIT;
drivers/gpu/drm/mediatek/mtk_hdmi.c
63
if (hdmi->conf && hdmi->conf->tz_disabled)
drivers/gpu/drm/mediatek/mtk_hdmi.c
631
mtk_hdmi_hw_aud_set_i2s_fmt(hdmi, hdmi->aud_param.aud_i2s_fmt);
drivers/gpu/drm/mediatek/mtk_hdmi.c
632
mtk_hdmi_hw_aud_set_bit_num(hdmi, HDMI_AUDIO_SAMPLE_SIZE_24);
drivers/gpu/drm/mediatek/mtk_hdmi.c
634
dst = ((hdmi->aud_param.aud_input_type == HDMI_AUD_INPUT_SPDIF) &&
drivers/gpu/drm/mediatek/mtk_hdmi.c
635
(hdmi->aud_param.aud_codec == HDMI_AUDIO_CODING_TYPE_DST));
drivers/gpu/drm/mediatek/mtk_hdmi.c
636
mtk_hdmi_hw_audio_config(hdmi, dst);
drivers/gpu/drm/mediatek/mtk_hdmi.c
638
if (hdmi->aud_param.aud_input_type == HDMI_AUD_INPUT_SPDIF)
drivers/gpu/drm/mediatek/mtk_hdmi.c
64
regmap_update_bits(hdmi->sys_regmap,
drivers/gpu/drm/mediatek/mtk_hdmi.c
641
chan_type = hdmi->aud_param.aud_input_chan_type;
drivers/gpu/drm/mediatek/mtk_hdmi.c
643
mtk_hdmi_hw_aud_set_i2s_chan_num(hdmi, chan_type, chan_count);
drivers/gpu/drm/mediatek/mtk_hdmi.c
644
mtk_hdmi_hw_aud_set_input_type(hdmi, hdmi->aud_param.aud_input_type);
drivers/gpu/drm/mediatek/mtk_hdmi.c
647
static int mtk_hdmi_aud_set_src(struct mtk_hdmi *hdmi,
drivers/gpu/drm/mediatek/mtk_hdmi.c
65
hdmi->sys_offset + HDMI_SYS_CFG20,
drivers/gpu/drm/mediatek/mtk_hdmi.c
650
unsigned int sample_rate = hdmi->aud_param.codec_params.sample_rate;
drivers/gpu/drm/mediatek/mtk_hdmi.c
652
mtk_hdmi_hw_ncts_enable(hdmi, false);
drivers/gpu/drm/mediatek/mtk_hdmi.c
653
mtk_hdmi_hw_aud_src_disable(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi.c
654
regmap_clear_bits(hdmi->regs, GRL_CFG2, CFG2_ACLK_INV);
drivers/gpu/drm/mediatek/mtk_hdmi.c
656
if (hdmi->aud_param.aud_input_type == HDMI_AUD_INPUT_I2S) {
drivers/gpu/drm/mediatek/mtk_hdmi.c
667
mtk_hdmi_hw_aud_set_mclk(hdmi, hdmi->aud_param.aud_mclk);
drivers/gpu/drm/mediatek/mtk_hdmi.c
677
mtk_hdmi_hw_aud_set_mclk(hdmi, HDMI_AUD_MCLK_128FS);
drivers/gpu/drm/mediatek/mtk_hdmi.c
680
mtk_hdmi_hw_aud_set_ncts(hdmi, sample_rate, display_mode->clock);
drivers/gpu/drm/mediatek/mtk_hdmi.c
682
mtk_hdmi_hw_aud_src_reenable(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi.c
686
static int mtk_hdmi_aud_output_config(struct mtk_hdmi *hdmi,
drivers/gpu/drm/mediatek/mtk_hdmi.c
689
mtk_hdmi_hw_aud_mute(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi.c
690
mtk_hdmi_hw_send_aud_packet(hdmi, false);
drivers/gpu/drm/mediatek/mtk_hdmi.c
692
mtk_hdmi_aud_set_input(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi.c
693
mtk_hdmi_aud_set_src(hdmi, display_mode);
drivers/gpu/drm/mediatek/mtk_hdmi.c
694
mtk_hdmi_hw_aud_set_channel_status(hdmi,
drivers/gpu/drm/mediatek/mtk_hdmi.c
695
hdmi->aud_param.codec_params.iec.status);
drivers/gpu/drm/mediatek/mtk_hdmi.c
699
mtk_hdmi_hw_ncts_enable(hdmi, true);
drivers/gpu/drm/mediatek/mtk_hdmi.c
700
mtk_hdmi_hw_send_aud_packet(hdmi, true);
drivers/gpu/drm/mediatek/mtk_hdmi.c
701
mtk_hdmi_hw_aud_unmute(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi.c
705
static int mtk_hdmi_setup_avi_infoframe(struct mtk_hdmi *hdmi,
drivers/gpu/drm/mediatek/mtk_hdmi.c
71
regmap_update_bits(hdmi->sys_regmap, hdmi->sys_offset + HDMI_SYS_CFG20,
drivers/gpu/drm/mediatek/mtk_hdmi.c
713
hdmi->curr_conn, mode);
drivers/gpu/drm/mediatek/mtk_hdmi.c
715
dev_err(hdmi->dev,
drivers/gpu/drm/mediatek/mtk_hdmi.c
722
dev_err(hdmi->dev, "Failed to pack AVI infoframe: %zd\n", err);
drivers/gpu/drm/mediatek/mtk_hdmi.c
726
mtk_hdmi_hw_send_info_frame(hdmi, buffer, sizeof(buffer));
drivers/gpu/drm/mediatek/mtk_hdmi.c
73
regmap_update_bits(hdmi->sys_regmap, hdmi->sys_offset + HDMI_SYS_CFG1C,
drivers/gpu/drm/mediatek/mtk_hdmi.c
730
static int mtk_hdmi_setup_spd_infoframe(struct mtk_hdmi *hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi.c
732
struct drm_bridge *bridge = &hdmi->bridge;
drivers/gpu/drm/mediatek/mtk_hdmi.c
739
dev_err(hdmi->dev, "Failed to initialize SPD infoframe: %zd\n",
drivers/gpu/drm/mediatek/mtk_hdmi.c
746
dev_err(hdmi->dev, "Failed to pack SDP infoframe: %zd\n", err);
drivers/gpu/drm/mediatek/mtk_hdmi.c
750
mtk_hdmi_hw_send_info_frame(hdmi, buffer, sizeof(buffer));
drivers/gpu/drm/mediatek/mtk_hdmi.c
754
static int mtk_hdmi_setup_audio_infoframe(struct mtk_hdmi *hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi.c
762
dev_err(hdmi->dev, "Failed to setup audio infoframe: %zd\n",
drivers/gpu/drm/mediatek/mtk_hdmi.c
77
static void mtk_hdmi_hw_1p4_version_enable(struct mtk_hdmi *hdmi, bool enable)
drivers/gpu/drm/mediatek/mtk_hdmi.c
771
hdmi->aud_param.aud_input_chan_type);
drivers/gpu/drm/mediatek/mtk_hdmi.c
775
dev_err(hdmi->dev, "Failed to pack audio infoframe: %zd\n",
drivers/gpu/drm/mediatek/mtk_hdmi.c
780
mtk_hdmi_hw_send_info_frame(hdmi, buffer, sizeof(buffer));
drivers/gpu/drm/mediatek/mtk_hdmi.c
784
static int mtk_hdmi_setup_vendor_specific_infoframe(struct mtk_hdmi *hdmi,
drivers/gpu/drm/mediatek/mtk_hdmi.c
79
regmap_update_bits(hdmi->sys_regmap, hdmi->sys_offset + HDMI_SYS_CFG20,
drivers/gpu/drm/mediatek/mtk_hdmi.c
792
hdmi->curr_conn, mode);
drivers/gpu/drm/mediatek/mtk_hdmi.c
794
dev_err(hdmi->dev,
drivers/gpu/drm/mediatek/mtk_hdmi.c
801
dev_err(hdmi->dev, "Failed to pack vendor infoframe: %zd\n",
drivers/gpu/drm/mediatek/mtk_hdmi.c
806
mtk_hdmi_hw_send_info_frame(hdmi, buffer, sizeof(buffer));
drivers/gpu/drm/mediatek/mtk_hdmi.c
810
static void mtk_hdmi_audio_enable(struct mtk_hdmi *hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi.c
812
mtk_hdmi_hw_send_aud_packet(hdmi, true);
drivers/gpu/drm/mediatek/mtk_hdmi.c
813
hdmi->audio_enable = true;
drivers/gpu/drm/mediatek/mtk_hdmi.c
816
static void mtk_hdmi_audio_disable(struct mtk_hdmi *hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi.c
818
mtk_hdmi_hw_send_aud_packet(hdmi, false);
drivers/gpu/drm/mediatek/mtk_hdmi.c
819
hdmi->audio_enable = false;
drivers/gpu/drm/mediatek/mtk_hdmi.c
822
static int mtk_hdmi_output_set_display_mode(struct mtk_hdmi *hdmi,
drivers/gpu/drm/mediatek/mtk_hdmi.c
827
mtk_hdmi_hw_vid_black(hdmi, true);
drivers/gpu/drm/mediatek/mtk_hdmi.c
828
mtk_hdmi_hw_aud_mute(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi.c
829
mtk_hdmi_hw_send_av_mute(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi.c
83
static void mtk_hdmi_hw_aud_mute(struct mtk_hdmi *hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi.c
830
phy_power_off(hdmi->phy);
drivers/gpu/drm/mediatek/mtk_hdmi.c
832
ret = mtk_hdmi_video_change_vpll(hdmi,
drivers/gpu/drm/mediatek/mtk_hdmi.c
835
dev_err(hdmi->dev, "Failed to set vpll: %d\n", ret);
drivers/gpu/drm/mediatek/mtk_hdmi.c
838
mtk_hdmi_video_set_display_mode(hdmi, mode);
drivers/gpu/drm/mediatek/mtk_hdmi.c
840
phy_power_on(hdmi->phy);
drivers/gpu/drm/mediatek/mtk_hdmi.c
841
mtk_hdmi_aud_output_config(hdmi, mode);
drivers/gpu/drm/mediatek/mtk_hdmi.c
843
mtk_hdmi_hw_vid_black(hdmi, false);
drivers/gpu/drm/mediatek/mtk_hdmi.c
844
mtk_hdmi_hw_aud_unmute(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi.c
845
mtk_hdmi_hw_send_av_unmute(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi.c
85
regmap_set_bits(hdmi->regs, GRL_AUDIO_CFG, AUDIO_ZERO);
drivers/gpu/drm/mediatek/mtk_hdmi.c
857
static int mtk_hdmi_clk_enable_audio(struct mtk_hdmi *hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi.c
861
ret = clk_prepare_enable(hdmi->clk[MTK_HDMI_CLK_AUD_BCLK]);
drivers/gpu/drm/mediatek/mtk_hdmi.c
865
ret = clk_prepare_enable(hdmi->clk[MTK_HDMI_CLK_AUD_SPDIF]);
drivers/gpu/drm/mediatek/mtk_hdmi.c
867
clk_disable_unprepare(hdmi->clk[MTK_HDMI_CLK_AUD_BCLK]);
drivers/gpu/drm/mediatek/mtk_hdmi.c
874
static void mtk_hdmi_clk_disable_audio(struct mtk_hdmi *hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi.c
876
clk_disable_unprepare(hdmi->clk[MTK_HDMI_CLK_AUD_BCLK]);
drivers/gpu/drm/mediatek/mtk_hdmi.c
877
clk_disable_unprepare(hdmi->clk[MTK_HDMI_CLK_AUD_SPDIF]);
drivers/gpu/drm/mediatek/mtk_hdmi.c
88
static void mtk_hdmi_hw_aud_unmute(struct mtk_hdmi *hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi.c
881
mtk_hdmi_update_plugged_status(struct mtk_hdmi *hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi.c
885
mutex_lock(&hdmi->update_plugged_status_lock);
drivers/gpu/drm/mediatek/mtk_hdmi.c
886
connected = mtk_cec_hpd_high(hdmi->cec_dev);
drivers/gpu/drm/mediatek/mtk_hdmi.c
887
if (hdmi->plugged_cb && hdmi->codec_dev)
drivers/gpu/drm/mediatek/mtk_hdmi.c
888
hdmi->plugged_cb(hdmi->codec_dev, connected);
drivers/gpu/drm/mediatek/mtk_hdmi.c
889
mutex_unlock(&hdmi->update_plugged_status_lock);
drivers/gpu/drm/mediatek/mtk_hdmi.c
895
static enum drm_connector_status mtk_hdmi_detect(struct mtk_hdmi *hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi.c
897
return mtk_hdmi_update_plugged_status(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi.c
90
regmap_clear_bits(hdmi->regs, GRL_AUDIO_CFG, AUDIO_ZERO);
drivers/gpu/drm/mediatek/mtk_hdmi.c
905
struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
drivers/gpu/drm/mediatek/mtk_hdmi.c
907
dev_dbg(hdmi->dev, "xres=%d, yres=%d, refresh=%d, intl=%d clock=%d\n",
drivers/gpu/drm/mediatek/mtk_hdmi.c
911
if (hdmi->conf) {
drivers/gpu/drm/mediatek/mtk_hdmi.c
912
if (hdmi->conf->cea_modes_only && !drm_match_cea_mode(mode))
drivers/gpu/drm/mediatek/mtk_hdmi.c
915
if (hdmi->conf->max_mode_clock &&
drivers/gpu/drm/mediatek/mtk_hdmi.c
916
mode->clock > hdmi->conf->max_mode_clock)
drivers/gpu/drm/mediatek/mtk_hdmi.c
93
static void mtk_hdmi_hw_reset(struct mtk_hdmi *hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi.c
930
struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/mediatek/mtk_hdmi.c
932
if (hdmi && hdmi->bridge.encoder && hdmi->bridge.encoder->dev) {
drivers/gpu/drm/mediatek/mtk_hdmi.c
935
status = mtk_hdmi_detect(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi.c
936
drm_helper_hpd_irq_event(hdmi->bridge.encoder->dev);
drivers/gpu/drm/mediatek/mtk_hdmi.c
937
drm_bridge_hpd_notify(&hdmi->bridge, status);
drivers/gpu/drm/mediatek/mtk_hdmi.c
948
struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
drivers/gpu/drm/mediatek/mtk_hdmi.c
95
regmap_update_bits(hdmi->sys_regmap, hdmi->sys_offset + HDMI_SYS_CFG1C,
drivers/gpu/drm/mediatek/mtk_hdmi.c
950
return mtk_hdmi_detect(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi.c
956
struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
drivers/gpu/drm/mediatek/mtk_hdmi.c
959
if (!hdmi->ddc_adpt)
drivers/gpu/drm/mediatek/mtk_hdmi.c
961
drm_edid = drm_edid_read_ddc(connector, hdmi->ddc_adpt);
drivers/gpu/drm/mediatek/mtk_hdmi.c
97
regmap_update_bits(hdmi->sys_regmap, hdmi->sys_offset + HDMI_SYS_CFG1C,
drivers/gpu/drm/mediatek/mtk_hdmi.c
970
hdmi->dvi_mode = !drm_detect_monitor_audio(edid);
drivers/gpu/drm/mediatek/mtk_hdmi.c
980
struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
drivers/gpu/drm/mediatek/mtk_hdmi.c
989
if (hdmi->bridge.next_bridge) {
drivers/gpu/drm/mediatek/mtk_hdmi.c
99
regmap_clear_bits(hdmi->regs, GRL_CFG3, CFG3_CONTROL_PACKET_DELAY);
drivers/gpu/drm/mediatek/mtk_hdmi.c
990
ret = drm_bridge_attach(encoder, hdmi->bridge.next_bridge,
drivers/gpu/drm/mediatek/mtk_hdmi.c
996
mtk_cec_set_hpd_event(hdmi->cec_dev, mtk_hdmi_hpd_event, hdmi->dev);
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
104
int mtk_hdmi_audio_params(struct mtk_hdmi *hdmi,
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
111
dev_dbg(hdmi->dev, "%s: %u Hz, %d bit, %d channels\n", __func__,
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
114
if (!hdmi->bridge.encoder)
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
131
dev_err(hdmi->dev, "channel[%d] not supported!\n", chan);
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
145
dev_err(hdmi->dev, "rate[%d] not supported!\n",
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
164
dev_err(hdmi->dev, "%s: Invalid DAI format %d\n", __func__,
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
169
memcpy(&hdmi->aud_param, &aud_params, sizeof(aud_params));
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
171
dev_dbg(hdmi->dev, "codec:%d, input:%d, channel:%d, fs:%d\n",
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
181
struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
183
if (hdmi->enabled)
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
184
memcpy(buf, hdmi->curr_conn->eld, min(sizeof(hdmi->curr_conn->eld), len));
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
192
void mtk_hdmi_audio_set_plugged_cb(struct mtk_hdmi *hdmi, hdmi_codec_plugged_cb fn,
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
195
mutex_lock(&hdmi->update_plugged_status_lock);
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
196
hdmi->plugged_cb = fn;
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
197
hdmi->codec_dev = codec_dev;
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
198
mutex_unlock(&hdmi->update_plugged_status_lock);
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
202
static int mtk_hdmi_get_all_clk(struct mtk_hdmi *hdmi, struct device_node *np,
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
208
hdmi->clk[i] = of_clk_get_by_name(np, clock_names[i]);
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
210
if (IS_ERR(hdmi->clk[i]))
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
211
return PTR_ERR(hdmi->clk[i]);
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
229
struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
231
dev_dbg(hdmi->dev, "cur info: name:%s, hdisplay:%d\n",
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
233
dev_dbg(hdmi->dev, "hsync_start:%d,hsync_end:%d, htotal:%d",
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
236
dev_dbg(hdmi->dev, "hskew:%d, vdisplay:%d\n",
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
238
dev_dbg(hdmi->dev, "vsync_start:%d, vsync_end:%d, vtotal:%d",
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
241
dev_dbg(hdmi->dev, "vscan:%d, flag:%d\n",
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
244
drm_mode_copy(&hdmi->mode, adjusted_mode);
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
255
static int mtk_hdmi_get_cec_dev(struct mtk_hdmi *hdmi, struct device *dev, struct device_node *np)
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
268
dev_err(hdmi->dev, "Waiting for CEC device %pOF\n", cec_np);
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
283
hdmi->sys_regmap = syscon_regmap_lookup_by_phandle_args(np, "mediatek,syscon-hdmi",
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
284
1, &hdmi->sys_offset);
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
285
if (IS_ERR(hdmi->sys_regmap))
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
286
return dev_err_probe(dev, PTR_ERR(hdmi->sys_regmap),
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
289
hdmi->cec_dev = &cec_pdev->dev;
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
300
static int mtk_hdmi_dt_parse_pdata(struct mtk_hdmi *hdmi, struct platform_device *pdev,
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
308
ret = mtk_hdmi_get_all_clk(hdmi, np, clk_names, num_clocks);
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
312
hdmi->irq = platform_get_irq(pdev, 0);
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
313
if (hdmi->irq < 0)
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
314
return hdmi->irq;
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
316
hdmi->regs = device_node_to_regmap(dev->of_node);
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
317
if (IS_ERR(hdmi->regs))
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
318
return PTR_ERR(hdmi->regs);
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
325
hdmi->bridge.next_bridge = of_drm_find_and_get_bridge(remote);
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
326
if (!hdmi->bridge.next_bridge) {
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
338
hdmi->ddc_adpt = of_get_i2c_adapter_by_node(i2c_np);
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
340
if (!hdmi->ddc_adpt)
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
343
ret = devm_add_action_or_reset(dev, mtk_hdmi_put_adapter, hdmi->ddc_adpt);
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
347
ret = mtk_hdmi_get_cec_dev(hdmi, dev, np);
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
363
struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
364
struct hdmi_audio_param *aud_param = &hdmi->aud_param;
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
366
.ops = hdmi->conf->ver_conf->codec_ops,
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
369
.data = hdmi,
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
381
hdmi->audio_pdev = platform_device_register_data(dev,
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
386
if (IS_ERR(hdmi->audio_pdev))
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
387
return PTR_ERR(hdmi->audio_pdev);
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
390
hdmi->audio_pdev);
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
402
struct mtk_hdmi *hdmi;
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
411
hdmi = devm_drm_bridge_alloc(dev, struct mtk_hdmi, bridge,
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
413
if (IS_ERR(hdmi))
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
414
return hdmi;
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
416
hdmi->dev = dev;
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
417
hdmi->conf = hdmi_conf;
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
419
hdmi->clk = devm_kcalloc(dev, ver_conf->num_clocks, sizeof(*hdmi->clk), GFP_KERNEL);
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
420
if (!hdmi->clk)
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
423
ret = mtk_hdmi_dt_parse_pdata(hdmi, pdev, ver_conf->mtk_hdmi_clock_names,
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
428
hdmi->phy = devm_phy_get(dev, "hdmi");
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
429
if (IS_ERR(hdmi->phy))
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
430
return dev_err_cast_probe(dev, hdmi->phy, "Failed to get HDMI PHY\n");
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
432
mutex_init(&hdmi->update_plugged_status_lock);
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
433
platform_set_drvdata(pdev, hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
439
hdmi->bridge.of_node = pdev->dev.of_node;
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
440
hdmi->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
446
hdmi->bridge.ops |= DRM_BRIDGE_OP_HDMI |
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
449
hdmi->bridge.type = DRM_MODE_CONNECTOR_HDMIA;
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
450
hdmi->bridge.ddc = hdmi->ddc_adpt;
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
451
hdmi->bridge.vendor = "MediaTek";
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
452
hdmi->bridge.product = "On-Chip HDMI";
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
453
hdmi->bridge.interlace_allowed = ver_conf->interlace_allowed;
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
455
ret = devm_drm_bridge_add(dev, &hdmi->bridge);
drivers/gpu/drm/mediatek/mtk_hdmi_common.c
459
return hdmi;
drivers/gpu/drm/mediatek/mtk_hdmi_common.h
184
void mtk_hdmi_audio_set_plugged_cb(struct mtk_hdmi *hdmi, hdmi_codec_plugged_cb fn,
drivers/gpu/drm/mediatek/mtk_hdmi_common.h
186
int mtk_hdmi_audio_params(struct mtk_hdmi *hdmi, struct hdmi_codec_daifmt *daifmt,
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1001
disable_irq(hdmi->irq);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1004
static void mtk_hdmi_v2_handle_plugged_change(struct mtk_hdmi *hdmi, bool plugged)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1006
mutex_lock(&hdmi->update_plugged_status_lock);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1007
if (hdmi->plugged_cb && hdmi->codec_dev)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1008
hdmi->plugged_cb(hdmi->codec_dev, plugged);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1009
mutex_unlock(&hdmi->update_plugged_status_lock);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1015
struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1018
.dp = { .link_rate = hdmi->mode.clock * KILO }
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1023
ret = mtk_hdmi_v2_enable(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1028
hdmi->curr_conn = drm_atomic_get_new_connector_for_encoder(state, bridge->encoder);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
103
static void mtk_hdmi_v2_hw_vid_mute(struct mtk_hdmi *hdmi, bool enable)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1030
conn_state = drm_atomic_get_new_connector_state(state, hdmi->curr_conn);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1039
mtk_hdmi_v2_output_set_display_mode(hdmi, conn_state, &hdmi->mode);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1042
phy_configure(hdmi->phy, &opts);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1045
phy_power_on(hdmi->phy);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1047
hdmi->powered = true;
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1053
struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1056
if (WARN_ON(!hdmi->powered))
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1059
ret = drm_atomic_helper_connector_hdmi_update_infoframes(hdmi->curr_conn, state);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1061
dev_err(hdmi->dev, "Could not update infoframes: %d\n", ret);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1063
mtk_hdmi_v2_hw_vid_mute(hdmi, false);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1066
mtk_hdmi_v2_handle_plugged_change(hdmi, true);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1068
hdmi->enabled = true;
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
107
regmap_set_bits(hdmi->regs, TOP_VMUTE_CFG1, REG_VMUTE_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1074
struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1076
if (!hdmi->enabled)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1079
mtk_hdmi_v2_hw_gcp_avmute(hdmi, true);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1081
mtk_hdmi_v2_hw_vid_mute(hdmi, true);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1082
mtk_hdmi_v2_hw_aud_mute(hdmi, true);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1085
hdmi->enabled = false;
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
109
regmap_clear_bits(hdmi->regs, TOP_VMUTE_CFG1, REG_VMUTE_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1091
struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1093
if (!hdmi->powered)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1096
phy_power_off(hdmi->phy);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1097
hdmi->powered = false;
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1100
mtk_hdmi_v2_handle_plugged_change(hdmi, false);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1103
mtk_hdmi_v2_disable(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1109
struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1111
return hdmi->hpd != HDMI_PLUG_OUT ?
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
112
static void mtk_hdmi_v2_hw_aud_mute(struct mtk_hdmi *hdmi, bool enable)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1123
struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1126
ret = mtk_hdmi_v2_enable(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1128
dev_err(hdmi->dev, "Cannot power on controller for HPD: %d\n", ret);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1132
mtk_hdmi_v2_enable_hpd_pord_irq(hdmi, true);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1137
struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1139
mtk_hdmi_v2_enable_hpd_pord_irq(hdmi, false);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1140
mtk_hdmi_v2_disable(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1158
struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1160
regmap_clear_bits(hdmi->regs, TOP_INFO_EN, AUD_EN_WR | AUD_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1161
regmap_clear_bits(hdmi->regs, TOP_INFO_RPT, AUD_RPT_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1168
struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
117
regmap_clear_bits(hdmi->regs, AIP_TXCTRL, AUD_MUTE_FIFO_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1170
regmap_clear_bits(hdmi->regs, TOP_INFO_EN, AVI_EN_WR | AVI_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1171
regmap_clear_bits(hdmi->regs, TOP_INFO_RPT, AVI_RPT_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1178
struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1180
regmap_clear_bits(hdmi->regs, TOP_INFO_EN, SPD_EN_WR | SPD_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1181
regmap_clear_bits(hdmi->regs, TOP_INFO_RPT, SPD_RPT_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1188
struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1190
regmap_clear_bits(hdmi->regs, TOP_INFO_EN, VSIF_EN_WR | VSIF_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1191
regmap_clear_bits(hdmi->regs, TOP_INFO_RPT, VSIF_RPT_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1196
static int mtk_hdmi_v2_set_abist(struct mtk_hdmi *hdmi, bool enable)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1198
struct drm_display_mode *mode = &hdmi->mode;
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1203
regmap_clear_bits(hdmi->regs, TOP_CFG00, HDMI_ABIST_ENABLE);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
121
regmap_read(hdmi->regs, AIP_CTRL, &aip);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1247
regmap_update_bits(hdmi->regs, TOP_CFG00, HDMI_ABIST_VIDEO_FORMAT,
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1249
regmap_set_bits(hdmi->regs, TOP_CFG00, HDMI_ABIST_ENABLE);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1255
struct mtk_hdmi *hdmi = m->private;
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1260
if (!hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1263
ret = regmap_read(hdmi->regs, TOP_CFG00, &val);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
127
regmap_update_bits(hdmi->regs, AIP_TXCTRL, val, val);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
130
static void mtk_hdmi_v2_hw_reset(struct mtk_hdmi *hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
132
regmap_clear_bits(hdmi->regs, hdmi->conf->reg_hdmi_tx_cfg, HDMITX_SW_RSTB);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
134
regmap_set_bits(hdmi->regs, hdmi->conf->reg_hdmi_tx_cfg, HDMITX_SW_RSTB);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1353
struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1356
if (!hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1359
mtk_hdmi_audio_set_plugged_cb(hdmi, fn, codec_dev);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1360
plugged = (hdmi->hpd == HDMI_PLUG_IN_AND_SINK_POWER_ON);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1361
mtk_hdmi_v2_handle_plugged_change(hdmi, plugged);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1370
struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1372
if (hdmi->audio_enable) {
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1373
mtk_hdmi_audio_params(hdmi, daifmt, params);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1374
mtk_hdmi_v2_aud_output_config(hdmi, &hdmi->mode);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1381
struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1383
mtk_hdmi_v2_hw_aud_enable(hdmi, true);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1384
hdmi->audio_enable = true;
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1391
struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1393
hdmi->audio_enable = false;
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1394
mtk_hdmi_v2_hw_aud_enable(hdmi, false);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1399
struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1401
mtk_hdmi_v2_hw_aud_mute(hdmi, enable);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1417
struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1419
mtk_hdmi_v2_disable(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1426
struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1428
return mtk_hdmi_v2_enable(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1453
struct mtk_hdmi *hdmi;
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1461
hdmi = mtk_hdmi_common_probe(pdev);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1462
if (IS_ERR(hdmi))
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1463
return PTR_ERR(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1465
hdmi->hpd = HDMI_PLUG_OUT;
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1468
mtk_hdmi_v2_hwirq_disable(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1475
regmap_write(hdmi->regs, TOP_INT_CLR00, GENMASK(31, 0));
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1476
regmap_write(hdmi->regs, TOP_INT_CLR01, GENMASK(18, 0));
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1479
regmap_write(hdmi->regs, TOP_INT_CLR00, 0);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1480
regmap_write(hdmi->regs, TOP_INT_CLR01, 0);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1487
irq_set_status_flags(hdmi->irq, IRQ_NOAUTOEN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1488
ret = devm_request_threaded_irq(&pdev->dev, hdmi->irq, mtk_hdmi_v2_isr,
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
1491
dev_name(&pdev->dev), hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
151
struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
153
regmap_clear_bits(hdmi->regs, TOP_INFO_EN, AUD_EN | AUD_EN_WR);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
154
regmap_clear_bits(hdmi->regs, TOP_INFO_RPT, AUD_RPT_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
156
regmap_write(hdmi->regs, TOP_AIF_HEADER, mtk_hdmi_v2_format_hw_packet(&buffer[0], 3));
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
157
regmap_write(hdmi->regs, TOP_AIF_PKT00, mtk_hdmi_v2_format_hw_packet(&buffer[3], 3));
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
158
regmap_write(hdmi->regs, TOP_AIF_PKT01, mtk_hdmi_v2_format_hw_packet(&buffer[7], 2));
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
159
regmap_write(hdmi->regs, TOP_AIF_PKT02, 0);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
160
regmap_write(hdmi->regs, TOP_AIF_PKT03, 0);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
162
regmap_set_bits(hdmi->regs, TOP_INFO_RPT, AUD_RPT_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
163
regmap_set_bits(hdmi->regs, TOP_INFO_EN, AUD_EN | AUD_EN_WR);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
171
struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
173
regmap_clear_bits(hdmi->regs, TOP_INFO_EN, AVI_EN_WR | AVI_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
174
regmap_clear_bits(hdmi->regs, TOP_INFO_RPT, AVI_RPT_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
176
regmap_write(hdmi->regs, TOP_AVI_HEADER, mtk_hdmi_v2_format_hw_packet(&buffer[0], 3));
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
177
regmap_write(hdmi->regs, TOP_AVI_PKT00, mtk_hdmi_v2_format_hw_packet(&buffer[3], 4));
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
178
regmap_write(hdmi->regs, TOP_AVI_PKT01, mtk_hdmi_v2_format_hw_packet(&buffer[7], 3));
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
179
regmap_write(hdmi->regs, TOP_AVI_PKT02, mtk_hdmi_v2_format_hw_packet(&buffer[10], 4));
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
180
regmap_write(hdmi->regs, TOP_AVI_PKT03, mtk_hdmi_v2_format_hw_packet(&buffer[14], 3));
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
181
regmap_write(hdmi->regs, TOP_AVI_PKT04, 0);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
182
regmap_write(hdmi->regs, TOP_AVI_PKT05, 0);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
184
regmap_set_bits(hdmi->regs, TOP_INFO_RPT, AVI_RPT_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
185
regmap_set_bits(hdmi->regs, TOP_INFO_EN, AVI_EN_WR | AVI_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
193
struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
195
regmap_clear_bits(hdmi->regs, TOP_INFO_EN, SPD_EN_WR | SPD_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
196
regmap_clear_bits(hdmi->regs, TOP_INFO_RPT, SPD_RPT_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
198
regmap_write(hdmi->regs, TOP_SPDIF_HEADER, mtk_hdmi_v2_format_hw_packet(&buffer[0], 3));
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
199
regmap_write(hdmi->regs, TOP_SPDIF_PKT00, mtk_hdmi_v2_format_hw_packet(&buffer[3], 4));
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
200
regmap_write(hdmi->regs, TOP_SPDIF_PKT01, mtk_hdmi_v2_format_hw_packet(&buffer[7], 3));
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
201
regmap_write(hdmi->regs, TOP_SPDIF_PKT02, mtk_hdmi_v2_format_hw_packet(&buffer[10], 4));
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
202
regmap_write(hdmi->regs, TOP_SPDIF_PKT03, mtk_hdmi_v2_format_hw_packet(&buffer[14], 3));
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
203
regmap_write(hdmi->regs, TOP_SPDIF_PKT04, mtk_hdmi_v2_format_hw_packet(&buffer[17], 4));
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
204
regmap_write(hdmi->regs, TOP_SPDIF_PKT05, mtk_hdmi_v2_format_hw_packet(&buffer[21], 3));
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
205
regmap_write(hdmi->regs, TOP_SPDIF_PKT06, mtk_hdmi_v2_format_hw_packet(&buffer[24], 4));
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
206
regmap_write(hdmi->regs, TOP_SPDIF_PKT07, buffer[28]);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
208
regmap_set_bits(hdmi->regs, TOP_INFO_EN, SPD_EN_WR | SPD_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
209
regmap_set_bits(hdmi->regs, TOP_INFO_RPT, SPD_RPT_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
217
struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
219
regmap_clear_bits(hdmi->regs, TOP_INFO_EN, VSIF_EN_WR | VSIF_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
220
regmap_clear_bits(hdmi->regs, TOP_INFO_RPT, VSIF_RPT_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
222
regmap_write(hdmi->regs, TOP_VSIF_HEADER, mtk_hdmi_v2_format_hw_packet(&buffer[0], 3));
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
223
regmap_write(hdmi->regs, TOP_VSIF_PKT00, mtk_hdmi_v2_format_hw_packet(&buffer[3], 4));
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
224
regmap_write(hdmi->regs, TOP_VSIF_PKT01, mtk_hdmi_v2_format_hw_packet(&buffer[7], 2));
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
225
regmap_write(hdmi->regs, TOP_VSIF_PKT02, 0);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
226
regmap_write(hdmi->regs, TOP_VSIF_PKT03, 0);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
227
regmap_write(hdmi->regs, TOP_VSIF_PKT04, 0);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
228
regmap_write(hdmi->regs, TOP_VSIF_PKT05, 0);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
229
regmap_write(hdmi->regs, TOP_VSIF_PKT06, 0);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
230
regmap_write(hdmi->regs, TOP_VSIF_PKT07, 0);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
232
regmap_set_bits(hdmi->regs, TOP_INFO_EN, VSIF_EN_WR | VSIF_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
233
regmap_set_bits(hdmi->regs, TOP_INFO_RPT, VSIF_RPT_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
238
static void mtk_hdmi_yuv420_downsampling(struct mtk_hdmi *hdmi, bool enable)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
242
regmap_read(hdmi->regs, VID_DOWNSAMPLE_CONFIG, &val);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
245
regmap_set_bits(hdmi->regs, hdmi->conf->reg_hdmi_tx_cfg, HDMI_YUV420_MODE);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
250
regmap_write(hdmi->regs, VID_DOWNSAMPLE_CONFIG, val);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
252
regmap_set_bits(hdmi->regs, VID_OUT_FORMAT, OUTPUT_FORMAT_DEMUX_420_ENABLE);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
254
regmap_clear_bits(hdmi->regs, hdmi->conf->reg_hdmi_tx_cfg, HDMI_YUV420_MODE);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
259
regmap_write(hdmi->regs, VID_DOWNSAMPLE_CONFIG, val);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
261
regmap_clear_bits(hdmi->regs, VID_OUT_FORMAT, OUTPUT_FORMAT_DEMUX_420_ENABLE);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
265
static int mtk_hdmi_v2_setup_audio_infoframe(struct mtk_hdmi *hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
267
struct hdmi_codec_params *params = &hdmi->aud_param.codec_params;
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
278
mtk_hdmi_v2_hdmi_write_audio_infoframe(&hdmi->bridge, buffer, sizeof(buffer));
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
283
static inline void mtk_hdmi_v2_hw_gcp_avmute(struct mtk_hdmi *hdmi, bool mute)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
287
regmap_read(hdmi->regs, TOP_CFG01, &val);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
297
regmap_write(hdmi->regs, TOP_CFG01, val);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
299
regmap_set_bits(hdmi->regs, TOP_INFO_RPT, CP_RPT_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
300
regmap_set_bits(hdmi->regs, TOP_INFO_EN, CP_EN | CP_EN_WR);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
303
static void mtk_hdmi_v2_hw_ncts_enable(struct mtk_hdmi *hdmi, bool enable)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
306
regmap_set_bits(hdmi->regs, AIP_CTRL, CTS_SW_SEL);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
308
regmap_clear_bits(hdmi->regs, AIP_CTRL, CTS_SW_SEL);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
311
static void mtk_hdmi_v2_hw_aud_set_channel_status(struct mtk_hdmi *hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
313
u8 *ch_status = hdmi->aud_param.codec_params.iec.status;
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
316
regmap_write(hdmi->regs, AIP_I2S_CHST0, mtk_hdmi_v2_format_hw_packet(&ch_status[0], 4));
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
317
regmap_write(hdmi->regs, AIP_I2S_CHST1, mtk_hdmi_v2_format_hw_packet(&ch_status[4], 3));
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
320
static void mtk_hdmi_v2_hw_aud_set_ncts(struct mtk_hdmi *hdmi,
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
328
regmap_write(hdmi->regs, AIP_N_VAL, n);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
329
regmap_write(hdmi->regs, AIP_CTS_SVAL, cts);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
332
static void mtk_hdmi_v2_hw_aud_enable(struct mtk_hdmi *hdmi, bool enable)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
335
regmap_clear_bits(hdmi->regs, AIP_TXCTRL, AUD_PACKET_DROP);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
337
regmap_set_bits(hdmi->regs, AIP_TXCTRL, AUD_PACKET_DROP);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
359
static void mtk_hdmi_audio_dsd_config(struct mtk_hdmi *hdmi,
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
364
regmap_update_bits(hdmi->regs, AIP_CTRL, SPDIF_EN | DSD_EN | HBRA_ON, DSD_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
365
regmap_set_bits(hdmi->regs, AIP_TXCTRL, DSD_MUTE_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
372
regmap_write(hdmi->regs, TOP_AUD_MAP, channel_map);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
373
regmap_clear_bits(hdmi->regs, AIP_SPDIF_CTRL, I2S2DSD_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
376
static inline void mtk_hdmi_v2_hw_i2s_fifo_map(struct mtk_hdmi *hdmi, u32 fifo_mapping)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
378
regmap_update_bits(hdmi->regs, AIP_I2S_CTRL,
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
382
static inline void mtk_hdmi_v2_hw_i2s_ch_number(struct mtk_hdmi *hdmi, u8 chnum)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
384
regmap_update_bits(hdmi->regs, AIP_CTRL, I2S_EN, FIELD_PREP(I2S_EN, chnum));
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
387
static void mtk_hdmi_v2_hw_i2s_ch_mapping(struct mtk_hdmi *hdmi, u8 chnum, u8 mapping)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
418
mtk_hdmi_v2_hw_i2s_fifo_map(hdmi, fifo_map);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
419
mtk_hdmi_v2_hw_i2s_ch_number(hdmi, bdata);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
427
regmap_set_bits(hdmi->regs, AIP_TXCTRL, AUD_LAYOUT_1);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
429
regmap_clear_bits(hdmi->regs, AIP_TXCTRL, AUD_LAYOUT_1);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
432
static void mtk_hdmi_i2s_data_fmt(struct mtk_hdmi *hdmi, unsigned char fmt)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
436
regmap_read(hdmi->regs, AIP_I2S_CTRL, &val);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
454
regmap_write(hdmi->regs, AIP_I2S_CTRL, val);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
457
static inline void mtk_hdmi_i2s_sck_edge_rise(struct mtk_hdmi *hdmi, bool rise)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
460
regmap_set_bits(hdmi->regs, AIP_I2S_CTRL, SCK_EDGE_RISE);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
462
regmap_clear_bits(hdmi->regs, AIP_I2S_CTRL, SCK_EDGE_RISE);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
465
static inline void mtk_hdmi_i2s_cbit_order(struct mtk_hdmi *hdmi, unsigned int cbit)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
467
regmap_update_bits(hdmi->regs, AIP_I2S_CTRL, CBIT_ORDER_SAME, cbit);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
470
static inline void mtk_hdmi_i2s_vbit(struct mtk_hdmi *hdmi, unsigned int vbit)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
473
regmap_update_bits(hdmi->regs, AIP_I2S_CTRL, VBIT_COMPRESSED, vbit);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
476
static inline void mtk_hdmi_i2s_data_direction(struct mtk_hdmi *hdmi, unsigned int is_lsb)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
478
regmap_update_bits(hdmi->regs, AIP_I2S_CTRL, I2S_DATA_DIR_LSB, is_lsb);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
481
static inline void mtk_hdmi_v2_hw_audio_type(struct mtk_hdmi *hdmi, unsigned int spdif_i2s)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
483
regmap_update_bits(hdmi->regs, AIP_CTRL, SPDIF_EN, FIELD_PREP(SPDIF_EN, spdif_i2s));
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
486
static u8 mtk_hdmi_v2_get_i2s_ch_mapping(struct mtk_hdmi *hdmi, u8 channel_type)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
557
static inline void mtk_hdmi_v2_hw_i2s_ch_swap(struct mtk_hdmi *hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
559
regmap_update_bits(hdmi->regs, AIP_SPDIF_CTRL, MAX_2UI_I2S_HI_WRITE,
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
563
static void mtk_hdmi_hbr_config(struct mtk_hdmi *hdmi, bool dsd_bypass)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
568
regmap_update_bits(hdmi->regs, AIP_CTRL, hbr_mask, HBRA_ON);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
569
regmap_set_bits(hdmi->regs, AIP_CTRL, I2S_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
571
regmap_update_bits(hdmi->regs, AIP_CTRL, hbr_mask, SPDIF_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
572
regmap_set_bits(hdmi->regs, AIP_CTRL, SPDIF_INTERNAL_MODULE);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
573
regmap_set_bits(hdmi->regs, AIP_CTRL, HBR_FROM_SPDIF);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
574
regmap_set_bits(hdmi->regs, AIP_CTRL, CTS_CAL_N4);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
578
static inline void mtk_hdmi_v2_hw_spdif_config(struct mtk_hdmi *hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
580
regmap_clear_bits(hdmi->regs, AIP_SPDIF_CTRL, WR_1UI_LOCK);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
581
regmap_clear_bits(hdmi->regs, AIP_SPDIF_CTRL, FS_OVERRIDE_WRITE);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
582
regmap_clear_bits(hdmi->regs, AIP_SPDIF_CTRL, WR_2UI_LOCK);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
584
regmap_update_bits(hdmi->regs, AIP_SPDIF_CTRL, MAX_1UI_WRITE,
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
586
regmap_update_bits(hdmi->regs, AIP_SPDIF_CTRL, MAX_2UI_SPDIF_WRITE,
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
588
regmap_update_bits(hdmi->regs, AIP_SPDIF_CTRL, AUD_ERR_THRESH,
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
591
regmap_set_bits(hdmi->regs, AIP_SPDIF_CTRL, I2S2DSD_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
594
static void mtk_hdmi_v2_aud_set_input(struct mtk_hdmi *hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
596
struct hdmi_audio_param *aud_param = &hdmi->aud_param;
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
60
static inline void mtk_hdmi_v2_hwirq_disable(struct mtk_hdmi *hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
603
regmap_write(hdmi->regs, TOP_AUD_MAP, out_ch_map);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
605
regmap_update_bits(hdmi->regs, AIP_SPDIF_CTRL, MAX_2UI_I2S_HI_WRITE, 0);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
606
regmap_clear_bits(hdmi->regs, AIP_CTRL,
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
609
regmap_clear_bits(hdmi->regs, AIP_TXCTRL, DSD_MUTE_EN | AUD_LAYOUT_1);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
615
mtk_hdmi_i2s_data_fmt(hdmi, aud_param->aud_i2s_fmt);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
616
mtk_hdmi_hbr_config(hdmi, true);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
619
mtk_hdmi_audio_dsd_config(hdmi, codec_params->channels, 0);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
62
regmap_write(hdmi->regs, TOP_INT_ENABLE00, 0);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
620
mtk_hdmi_v2_hw_i2s_ch_mapping(hdmi, codec_params->channels, 1);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
623
mtk_hdmi_i2s_data_fmt(hdmi, aud_param->aud_i2s_fmt);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
624
mtk_hdmi_i2s_sck_edge_rise(hdmi, true);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
625
mtk_hdmi_i2s_cbit_order(hdmi, CBIT_ORDER_SAME);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
626
mtk_hdmi_i2s_vbit(hdmi, 0); /* PCM data */
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
627
mtk_hdmi_i2s_data_direction(hdmi, 0); /* MSB first */
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
628
mtk_hdmi_v2_hw_audio_type(hdmi, HDMI_AUD_INPUT_I2S);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
629
i2s_ch_map = mtk_hdmi_v2_get_i2s_ch_mapping(hdmi,
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
63
regmap_write(hdmi->regs, TOP_INT_ENABLE01, 0);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
631
mtk_hdmi_v2_hw_i2s_ch_mapping(hdmi, codec_params->channels, i2s_ch_map);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
632
mtk_hdmi_v2_hw_i2s_ch_swap(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
638
mtk_hdmi_hbr_config(hdmi, false);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
640
mtk_hdmi_v2_hw_spdif_config(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
641
mtk_hdmi_v2_hw_i2s_ch_mapping(hdmi, 2, 0);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
646
static inline void mtk_hdmi_v2_hw_audio_input_enable(struct mtk_hdmi *hdmi, bool ena)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
649
regmap_set_bits(hdmi->regs, AIP_CTRL, AUD_IN_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
651
regmap_clear_bits(hdmi->regs, AIP_CTRL, AUD_IN_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
654
static void mtk_hdmi_v2_aip_ctrl_init(struct mtk_hdmi *hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
656
regmap_set_bits(hdmi->regs, AIP_CTRL,
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
658
regmap_clear_bits(hdmi->regs, AIP_TPI_CTRL, TPI_AUDIO_LOOKUP_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
66
static inline void mtk_hdmi_v2_enable_hpd_pord_irq(struct mtk_hdmi *hdmi, bool enable)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
661
static void mtk_hdmi_v2_audio_reset(struct mtk_hdmi *hdmi, bool reset)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
666
regmap_set_bits(hdmi->regs, AIP_TXCTRL, arst_bits);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
668
regmap_clear_bits(hdmi->regs, AIP_TXCTRL, arst_bits);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
671
static void mtk_hdmi_v2_aud_output_config(struct mtk_hdmi *hdmi,
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
675
mtk_hdmi_v2_hw_aud_mute(hdmi, true);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
676
mtk_hdmi_v2_hw_aud_enable(hdmi, false);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
677
mtk_hdmi_v2_audio_reset(hdmi, true);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
680
mtk_hdmi_v2_aip_ctrl_init(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
681
mtk_hdmi_v2_aud_set_input(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
682
mtk_hdmi_v2_hw_aud_set_channel_status(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
683
mtk_hdmi_v2_setup_audio_infoframe(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
684
mtk_hdmi_v2_hw_audio_input_enable(hdmi, true);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
685
mtk_hdmi_v2_audio_reset(hdmi, false);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
688
mtk_hdmi_v2_hw_ncts_enable(hdmi, false);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
689
mtk_hdmi_v2_hw_aud_set_ncts(hdmi, hdmi->aud_param.codec_params.sample_rate,
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
69
regmap_set_bits(hdmi->regs, TOP_INT_ENABLE00, HPD_PORD_HWIRQS);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
696
mtk_hdmi_v2_hw_ncts_enable(hdmi, true);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
697
mtk_hdmi_v2_hw_aud_enable(hdmi, true);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
698
mtk_hdmi_v2_hw_aud_mute(hdmi, false);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
701
static void mtk_hdmi_v2_change_video_resolution(struct mtk_hdmi *hdmi,
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
704
mtk_hdmi_v2_hw_reset(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
705
mtk_hdmi_v2_set_sw_hpd(hdmi, true);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
708
regmap_write(hdmi->regs, HDCP_TOP_CTRL, 0);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
71
regmap_clear_bits(hdmi->regs, TOP_INT_ENABLE00, HPD_PORD_HWIRQS);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
714
regmap_set_bits(hdmi->regs, TOP_INT_ENABLE00, HDCP2X_RX_REAUTH_REQ_DDCM_INT);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
717
mtk_hdmi_v2_enable_hpd_pord_irq(hdmi, true);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
720
regmap_set_bits(hdmi->regs, HDCP2X_CTRL_0, HDCP2X_HPD_OVR);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
721
regmap_set_bits(hdmi->regs, HDCP2X_CTRL_0, HDCP2X_HPD_SW);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
724
regmap_update_bits(hdmi->regs, TOP_CFG00, TMDS_PACK_MODE,
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
727
regmap_clear_bits(hdmi->regs, TOP_CFG00, DEEPCOLOR_PKT_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
729
regmap_clear_bits(hdmi->regs, TOP_MISC_CTLR, DEEP_COLOR_ADD);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
731
if (hdmi->curr_conn->display_info.is_hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
732
regmap_set_bits(hdmi->regs, TOP_CFG00, HDMI_MODE_HDMI);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
734
regmap_clear_bits(hdmi->regs, TOP_CFG00, HDMI_MODE_HDMI);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
737
mtk_hdmi_v2_hw_vid_mute(hdmi, true);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
738
mtk_hdmi_v2_hw_aud_mute(hdmi, true);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
739
mtk_hdmi_v2_hw_gcp_avmute(hdmi, false);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
74
static inline void mtk_hdmi_v2_set_sw_hpd(struct mtk_hdmi *hdmi, bool enable)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
741
regmap_update_bits(hdmi->regs, TOP_CFG01,
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
746
mtk_hdmi_v2_enable_scrambling(hdmi, hdmi->mode.clock >= 340 * KILO);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
748
switch (conn_state->hdmi.output_format) {
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
753
mtk_hdmi_yuv420_downsampling(hdmi, false);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
762
mtk_hdmi_yuv420_downsampling(hdmi, false);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
763
regmap_set_bits(hdmi->regs, VID_DOWNSAMPLE_CONFIG,
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
767
mtk_hdmi_yuv420_downsampling(hdmi, true);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
77
regmap_set_bits(hdmi->regs, hdmi->conf->reg_hdmi_tx_cfg, HDMITX_SW_HPD);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
772
static void mtk_hdmi_v2_output_set_display_mode(struct mtk_hdmi *hdmi,
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
777
.dp = { .link_rate = hdmi->mode.clock * KILO }
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
78
regmap_set_bits(hdmi->regs, HDCP2X_CTRL_0, HDCP2X_HPD_OVR);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
781
ret = phy_configure(hdmi->phy, &opts);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
783
dev_err(hdmi->dev, "Setting clock=%d failed: %d", mode->clock, ret);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
785
mtk_hdmi_v2_change_video_resolution(hdmi, conn_state);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
786
mtk_hdmi_v2_aud_output_config(hdmi, mode);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
789
static int mtk_hdmi_v2_clk_enable(struct mtk_hdmi *hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
79
regmap_set_bits(hdmi->regs, HDCP2X_CTRL_0, HDCP2X_HPD_SW);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
793
ret = clk_prepare_enable(hdmi->clk[MTK_HDMI_V2_CLK_HDCP_SEL]);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
797
ret = clk_prepare_enable(hdmi->clk[MTK_HDMI_V2_CLK_HDCP_24M_SEL]);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
801
ret = clk_prepare_enable(hdmi->clk[MTK_HDMI_V2_CLK_HDMI_APB_SEL]);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
805
ret = clk_prepare_enable(hdmi->clk[MTK_HDMI_V2_CLK_VPP_SPLIT_HDMI]);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
81
regmap_clear_bits(hdmi->regs, HDCP2X_CTRL_0, HDCP2X_HPD_OVR);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
812
clk_disable_unprepare(hdmi->clk[MTK_HDMI_V2_CLK_HDMI_APB_SEL]);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
814
clk_disable_unprepare(hdmi->clk[MTK_HDMI_V2_CLK_HDCP_24M_SEL]);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
816
clk_disable_unprepare(hdmi->clk[MTK_HDMI_V2_CLK_HDCP_SEL]);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
82
regmap_clear_bits(hdmi->regs, HDCP2X_CTRL_0, HDCP2X_HPD_SW);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
821
static void mtk_hdmi_v2_clk_disable(struct mtk_hdmi *hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
823
clk_disable_unprepare(hdmi->clk[MTK_HDMI_V2_CLK_VPP_SPLIT_HDMI]);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
824
clk_disable_unprepare(hdmi->clk[MTK_HDMI_V2_CLK_HDMI_APB_SEL]);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
825
clk_disable_unprepare(hdmi->clk[MTK_HDMI_V2_CLK_HDCP_24M_SEL]);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
826
clk_disable_unprepare(hdmi->clk[MTK_HDMI_V2_CLK_HDCP_SEL]);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
829
static enum hdmi_hpd_state mtk_hdmi_v2_hpd_pord_status(struct mtk_hdmi *hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
83
regmap_clear_bits(hdmi->regs, hdmi->conf->reg_hdmi_tx_cfg, HDMITX_SW_HPD);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
834
regmap_read(hdmi->regs, HPD_DDC_STATUS, &hpd_status);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
863
struct mtk_hdmi *hdmi = arg;
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
867
regmap_read(hdmi->regs, TOP_INT_STA00, &irq_sta);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
87
static inline void mtk_hdmi_v2_enable_scrambling(struct mtk_hdmi *hdmi, bool enable)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
875
mtk_hdmi_v2_enable_hpd_pord_irq(hdmi, false);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
879
regmap_write(hdmi->regs, TOP_INT_CLR00, HPD_PORD_HWIRQS);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
880
regmap_write(hdmi->regs, TOP_INT_CLR00, 0);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
886
static irqreturn_t __mtk_hdmi_v2_isr_thread(struct mtk_hdmi *hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
89
struct drm_scdc *scdc = &hdmi->curr_conn->display_info.hdmi.scdc;
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
890
hpd = mtk_hdmi_v2_hpd_pord_status(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
891
if (hpd != hdmi->hpd) {
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
892
struct drm_encoder *encoder = hdmi->bridge.encoder;
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
894
hdmi->hpd = hpd;
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
897
drm_helper_hpd_irq_event(hdmi->bridge.encoder->dev);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
900
mtk_hdmi_v2_enable_hpd_pord_irq(hdmi, true);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
906
struct mtk_hdmi *hdmi = arg;
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
914
return __mtk_hdmi_v2_isr_thread(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
917
static int mtk_hdmi_v2_enable(struct mtk_hdmi *hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
919
bool was_active = pm_runtime_active(hdmi->dev);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
92
regmap_set_bits(hdmi->regs, TOP_CFG00, SCR_ON | HDMI2_ON);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
922
ret = pm_runtime_resume_and_get(hdmi->dev);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
924
dev_err(hdmi->dev, "Cannot resume HDMI\n");
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
928
ret = mtk_hdmi_v2_clk_enable(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
930
pm_runtime_put(hdmi->dev);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
935
mtk_hdmi_v2_hw_reset(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
936
mtk_hdmi_v2_set_sw_hpd(hdmi, true);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
94
regmap_clear_bits(hdmi->regs, TOP_CFG00, SCR_ON | HDMI2_ON);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
942
static void mtk_hdmi_v2_disable(struct mtk_hdmi *hdmi)
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
944
mtk_hdmi_v2_clk_disable(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
945
pm_runtime_put_sync(hdmi->dev);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
956
struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
963
if (hdmi->bridge.next_bridge) {
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
964
ret = drm_bridge_attach(encoder, hdmi->bridge.next_bridge, bridge, flags);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
969
ret = mtk_hdmi_v2_enable(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
974
regmap_set_bits(hdmi->regs, HPD_DDC_CTRL,
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
977
irq_clear_status_flags(hdmi->irq, IRQ_NOAUTOEN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
978
enable_irq(hdmi->irq);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
98
drm_scdc_set_scrambling(hdmi->curr_conn, enable);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
987
__mtk_hdmi_v2_isr_thread(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
989
mtk_hdmi_v2_disable(hdmi);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
99
drm_scdc_set_high_tmds_clock_ratio(hdmi->curr_conn, enable);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
996
struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
998
WARN_ON(pm_runtime_active(hdmi->dev));
drivers/gpu/drm/meson/meson_dw_hdmi.c
149
struct dw_hdmi *hdmi;
drivers/gpu/drm/meson/meson_dw_hdmi.c
358
static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data,
drivers/gpu/drm/meson/meson_dw_hdmi.c
363
bool is_hdmi2_sink = display->hdmi.scdc.supported;
drivers/gpu/drm/meson/meson_dw_hdmi.c
374
dw_hdmi_bus_fmt_is_420(hdmi))
drivers/gpu/drm/meson/meson_dw_hdmi.c
401
dw_hdmi_set_high_tmds_clock_ratio(hdmi, display);
drivers/gpu/drm/meson/meson_dw_hdmi.c
443
static void dw_hdmi_phy_disable(struct dw_hdmi *hdmi,
drivers/gpu/drm/meson/meson_dw_hdmi.c
456
static enum drm_connector_status dw_hdmi_read_hpd(struct dw_hdmi *hdmi,
drivers/gpu/drm/meson/meson_dw_hdmi.c
465
static void dw_hdmi_setup_hpd(struct dw_hdmi *hdmi,
drivers/gpu/drm/meson/meson_dw_hdmi.c
527
dw_hdmi_setup_rx_sense(dw_hdmi->hdmi, hpd_connected,
drivers/gpu/drm/meson/meson_dw_hdmi.c
777
meson_dw_hdmi->hdmi = dw_hdmi_probe(pdev, &meson_dw_hdmi->dw_plat_data);
drivers/gpu/drm/meson/meson_dw_hdmi.c
778
if (IS_ERR(meson_dw_hdmi->hdmi))
drivers/gpu/drm/meson/meson_dw_hdmi.c
779
return PTR_ERR(meson_dw_hdmi->hdmi);
drivers/gpu/drm/meson/meson_dw_hdmi.c
796
dw_hdmi_unbind(meson_dw_hdmi->hdmi);
drivers/gpu/drm/meson/meson_dw_hdmi.c
828
dw_hdmi_resume(meson_dw_hdmi->hdmi);
drivers/gpu/drm/meson/meson_encoder_hdmi.c
125
bool is_hdmi2_sink = display_info->hdmi.scdc.supported;
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
694
if (!priv->kms->hdmi)
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
708
rc = msm_hdmi_modeset_init(priv->kms->hdmi, dev, encoder);
drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
246
if (priv->kms->hdmi) {
drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
248
ret = msm_hdmi_modeset_init(priv->kms->hdmi, dev, encoder);
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
318
if (!priv->kms->hdmi)
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
333
ret = msm_hdmi_modeset_init(priv->kms->hdmi, dev, encoder);
drivers/gpu/drm/msm/hdmi/hdmi.c
106
hdmi->phy = platform_get_drvdata(phy_pdev);
drivers/gpu/drm/msm/hdmi/hdmi.c
107
if (!hdmi->phy) {
drivers/gpu/drm/msm/hdmi/hdmi.c
112
hdmi->phy_dev = &phy_pdev->dev;
drivers/gpu/drm/msm/hdmi/hdmi.c
121
static int msm_hdmi_init(struct hdmi *hdmi)
drivers/gpu/drm/msm/hdmi/hdmi.c
123
struct platform_device *pdev = hdmi->pdev;
drivers/gpu/drm/msm/hdmi/hdmi.c
126
hdmi->workq = alloc_ordered_workqueue("msm_hdmi", 0);
drivers/gpu/drm/msm/hdmi/hdmi.c
127
if (!hdmi->workq) {
drivers/gpu/drm/msm/hdmi/hdmi.c
132
hdmi->i2c = msm_hdmi_i2c_init(hdmi);
drivers/gpu/drm/msm/hdmi/hdmi.c
133
if (IS_ERR(hdmi->i2c)) {
drivers/gpu/drm/msm/hdmi/hdmi.c
134
ret = PTR_ERR(hdmi->i2c);
drivers/gpu/drm/msm/hdmi/hdmi.c
136
hdmi->i2c = NULL;
drivers/gpu/drm/msm/hdmi/hdmi.c
140
hdmi->hdcp_ctrl = msm_hdmi_hdcp_init(hdmi);
drivers/gpu/drm/msm/hdmi/hdmi.c
141
if (IS_ERR(hdmi->hdcp_ctrl)) {
drivers/gpu/drm/msm/hdmi/hdmi.c
143
hdmi->hdcp_ctrl = NULL;
drivers/gpu/drm/msm/hdmi/hdmi.c
149
msm_hdmi_destroy(hdmi);
drivers/gpu/drm/msm/hdmi/hdmi.c
162
int msm_hdmi_modeset_init(struct hdmi *hdmi,
drivers/gpu/drm/msm/hdmi/hdmi.c
167
hdmi->dev = dev;
drivers/gpu/drm/msm/hdmi/hdmi.c
168
hdmi->encoder = encoder;
drivers/gpu/drm/msm/hdmi/hdmi.c
170
ret = msm_hdmi_bridge_init(hdmi);
drivers/gpu/drm/msm/hdmi/hdmi.c
176
if (hdmi->next_bridge) {
drivers/gpu/drm/msm/hdmi/hdmi.c
177
ret = drm_bridge_attach(hdmi->encoder, hdmi->next_bridge, hdmi->bridge,
drivers/gpu/drm/msm/hdmi/hdmi.c
185
hdmi->connector = drm_bridge_connector_init(hdmi->dev, encoder);
drivers/gpu/drm/msm/hdmi/hdmi.c
186
if (IS_ERR(hdmi->connector)) {
drivers/gpu/drm/msm/hdmi/hdmi.c
187
ret = PTR_ERR(hdmi->connector);
drivers/gpu/drm/msm/hdmi/hdmi.c
189
hdmi->connector = NULL;
drivers/gpu/drm/msm/hdmi/hdmi.c
193
ret = devm_request_irq(dev->dev, hdmi->irq,
drivers/gpu/drm/msm/hdmi/hdmi.c
195
"hdmi_isr", hdmi);
drivers/gpu/drm/msm/hdmi/hdmi.c
198
hdmi->irq, ret);
drivers/gpu/drm/msm/hdmi/hdmi.c
205
if (hdmi->connector) {
drivers/gpu/drm/msm/hdmi/hdmi.c
206
hdmi->connector->funcs->destroy(hdmi->connector);
drivers/gpu/drm/msm/hdmi/hdmi.c
207
hdmi->connector = NULL;
drivers/gpu/drm/msm/hdmi/hdmi.c
21
void msm_hdmi_set_mode(struct hdmi *hdmi, bool power_on)
drivers/gpu/drm/msm/hdmi/hdmi.c
240
struct hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/msm/hdmi/hdmi.c
243
err = msm_hdmi_init(hdmi);
drivers/gpu/drm/msm/hdmi/hdmi.c
246
priv->kms->hdmi = hdmi;
drivers/gpu/drm/msm/hdmi/hdmi.c
256
if (priv->kms->hdmi) {
drivers/gpu/drm/msm/hdmi/hdmi.c
257
msm_hdmi_destroy(priv->kms->hdmi);
drivers/gpu/drm/msm/hdmi/hdmi.c
258
priv->kms->hdmi = NULL;
drivers/gpu/drm/msm/hdmi/hdmi.c
26
spin_lock_irqsave(&hdmi->reg_lock, flags);
drivers/gpu/drm/msm/hdmi/hdmi.c
271
struct hdmi *hdmi;
drivers/gpu/drm/msm/hdmi/hdmi.c
279
hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
drivers/gpu/drm/msm/hdmi/hdmi.c
280
if (!hdmi)
drivers/gpu/drm/msm/hdmi/hdmi.c
283
hdmi->pdev = pdev;
drivers/gpu/drm/msm/hdmi/hdmi.c
284
hdmi->config = config;
drivers/gpu/drm/msm/hdmi/hdmi.c
285
spin_lock_init(&hdmi->reg_lock);
drivers/gpu/drm/msm/hdmi/hdmi.c
286
mutex_init(&hdmi->state_mutex);
drivers/gpu/drm/msm/hdmi/hdmi.c
288
hdmi->next_bridge = of_drm_get_bridge_by_endpoint(dev_of_node(dev), 1, 0);
drivers/gpu/drm/msm/hdmi/hdmi.c
289
if (IS_ERR(hdmi->next_bridge)) {
drivers/gpu/drm/msm/hdmi/hdmi.c
29
if (!hdmi->connector->display_info.is_hdmi) {
drivers/gpu/drm/msm/hdmi/hdmi.c
290
if (PTR_ERR(hdmi->next_bridge) != -ENODEV)
drivers/gpu/drm/msm/hdmi/hdmi.c
291
return PTR_ERR(hdmi->next_bridge);
drivers/gpu/drm/msm/hdmi/hdmi.c
293
hdmi->next_bridge = NULL;
drivers/gpu/drm/msm/hdmi/hdmi.c
296
hdmi->mmio = msm_ioremap(pdev, "core_physical");
drivers/gpu/drm/msm/hdmi/hdmi.c
297
if (IS_ERR(hdmi->mmio)) {
drivers/gpu/drm/msm/hdmi/hdmi.c
298
ret = PTR_ERR(hdmi->mmio);
drivers/gpu/drm/msm/hdmi/hdmi.c
309
hdmi->mmio_phy_addr = res->start;
drivers/gpu/drm/msm/hdmi/hdmi.c
31
hdmi_write(hdmi, REG_HDMI_CTRL, ctrl);
drivers/gpu/drm/msm/hdmi/hdmi.c
311
hdmi->qfprom_mmio = msm_ioremap(pdev, "qfprom_physical");
drivers/gpu/drm/msm/hdmi/hdmi.c
312
if (IS_ERR(hdmi->qfprom_mmio)) {
drivers/gpu/drm/msm/hdmi/hdmi.c
314
hdmi->qfprom_mmio = NULL;
drivers/gpu/drm/msm/hdmi/hdmi.c
317
hdmi->irq = platform_get_irq(pdev, 0);
drivers/gpu/drm/msm/hdmi/hdmi.c
318
if (hdmi->irq < 0) {
drivers/gpu/drm/msm/hdmi/hdmi.c
319
ret = hdmi->irq;
drivers/gpu/drm/msm/hdmi/hdmi.c
323
hdmi->pwr_regs = devm_kcalloc(dev, config->pwr_reg_cnt,
drivers/gpu/drm/msm/hdmi/hdmi.c
324
sizeof(hdmi->pwr_regs[0]),
drivers/gpu/drm/msm/hdmi/hdmi.c
326
if (!hdmi->pwr_regs) {
drivers/gpu/drm/msm/hdmi/hdmi.c
332
hdmi->pwr_regs[i].supply = config->pwr_reg_names[i];
drivers/gpu/drm/msm/hdmi/hdmi.c
334
ret = devm_regulator_bulk_get(dev, config->pwr_reg_cnt, hdmi->pwr_regs);
drivers/gpu/drm/msm/hdmi/hdmi.c
340
hdmi->pwr_clks = devm_kcalloc(dev, config->pwr_clk_cnt,
drivers/gpu/drm/msm/hdmi/hdmi.c
341
sizeof(hdmi->pwr_clks[0]),
drivers/gpu/drm/msm/hdmi/hdmi.c
343
if (!hdmi->pwr_clks) {
drivers/gpu/drm/msm/hdmi/hdmi.c
349
hdmi->pwr_clks[i].id = config->pwr_clk_names[i];
drivers/gpu/drm/msm/hdmi/hdmi.c
351
ret = devm_clk_bulk_get(dev, config->pwr_clk_cnt, hdmi->pwr_clks);
drivers/gpu/drm/msm/hdmi/hdmi.c
356
hdmi->extp_clk = devm_clk_get_optional(dev, "extp");
drivers/gpu/drm/msm/hdmi/hdmi.c
357
if (IS_ERR(hdmi->extp_clk)) {
drivers/gpu/drm/msm/hdmi/hdmi.c
358
ret = dev_err_probe(dev, PTR_ERR(hdmi->extp_clk),
drivers/gpu/drm/msm/hdmi/hdmi.c
363
hdmi->hpd_gpiod = devm_gpiod_get_optional(dev, "hpd", GPIOD_IN);
drivers/gpu/drm/msm/hdmi/hdmi.c
365
if (IS_ERR(hdmi->hpd_gpiod)) {
drivers/gpu/drm/msm/hdmi/hdmi.c
366
ret = dev_err_probe(dev, PTR_ERR(hdmi->hpd_gpiod),
drivers/gpu/drm/msm/hdmi/hdmi.c
371
if (!hdmi->hpd_gpiod)
drivers/gpu/drm/msm/hdmi/hdmi.c
374
if (hdmi->hpd_gpiod)
drivers/gpu/drm/msm/hdmi/hdmi.c
375
gpiod_set_consumer_name(hdmi->hpd_gpiod, "HDMI_HPD");
drivers/gpu/drm/msm/hdmi/hdmi.c
377
ret = msm_hdmi_get_phy(hdmi);
drivers/gpu/drm/msm/hdmi/hdmi.c
385
platform_set_drvdata(pdev, hdmi);
drivers/gpu/drm/msm/hdmi/hdmi.c
394
msm_hdmi_put_phy(hdmi);
drivers/gpu/drm/msm/hdmi/hdmi.c
396
drm_bridge_put(hdmi->next_bridge);
drivers/gpu/drm/msm/hdmi/hdmi.c
40
hdmi_write(hdmi, REG_HDMI_CTRL, ctrl);
drivers/gpu/drm/msm/hdmi/hdmi.c
402
struct hdmi *hdmi = dev_get_drvdata(&pdev->dev);
drivers/gpu/drm/msm/hdmi/hdmi.c
406
msm_hdmi_put_phy(hdmi);
drivers/gpu/drm/msm/hdmi/hdmi.c
407
drm_bridge_put(hdmi->next_bridge);
drivers/gpu/drm/msm/hdmi/hdmi.c
41
spin_unlock_irqrestore(&hdmi->reg_lock, flags);
drivers/gpu/drm/msm/hdmi/hdmi.c
412
struct hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/msm/hdmi/hdmi.c
413
const struct hdmi_platform_config *config = hdmi->config;
drivers/gpu/drm/msm/hdmi/hdmi.c
415
clk_bulk_disable_unprepare(config->pwr_clk_cnt, hdmi->pwr_clks);
drivers/gpu/drm/msm/hdmi/hdmi.c
419
regulator_bulk_disable(config->pwr_reg_cnt, hdmi->pwr_regs);
drivers/gpu/drm/msm/hdmi/hdmi.c
426
struct hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/msm/hdmi/hdmi.c
427
const struct hdmi_platform_config *config = hdmi->config;
drivers/gpu/drm/msm/hdmi/hdmi.c
430
ret = regulator_bulk_enable(config->pwr_reg_cnt, hdmi->pwr_regs);
drivers/gpu/drm/msm/hdmi/hdmi.c
438
ret = clk_bulk_prepare_enable(config->pwr_clk_cnt, hdmi->pwr_clks);
drivers/gpu/drm/msm/hdmi/hdmi.c
48
struct hdmi *hdmi = dev_id;
drivers/gpu/drm/msm/hdmi/hdmi.c
51
msm_hdmi_hpd_irq(hdmi->bridge);
drivers/gpu/drm/msm/hdmi/hdmi.c
54
msm_hdmi_i2c_irq(hdmi->i2c);
drivers/gpu/drm/msm/hdmi/hdmi.c
57
if (hdmi->hdcp_ctrl)
drivers/gpu/drm/msm/hdmi/hdmi.c
58
msm_hdmi_hdcp_irq(hdmi->hdcp_ctrl);
drivers/gpu/drm/msm/hdmi/hdmi.c
65
static void msm_hdmi_destroy(struct hdmi *hdmi)
drivers/gpu/drm/msm/hdmi/hdmi.c
71
if (hdmi->workq)
drivers/gpu/drm/msm/hdmi/hdmi.c
72
destroy_workqueue(hdmi->workq);
drivers/gpu/drm/msm/hdmi/hdmi.c
73
msm_hdmi_hdcp_destroy(hdmi);
drivers/gpu/drm/msm/hdmi/hdmi.c
75
if (hdmi->i2c)
drivers/gpu/drm/msm/hdmi/hdmi.c
76
msm_hdmi_i2c_destroy(hdmi->i2c);
drivers/gpu/drm/msm/hdmi/hdmi.c
79
static void msm_hdmi_put_phy(struct hdmi *hdmi)
drivers/gpu/drm/msm/hdmi/hdmi.c
81
if (hdmi->phy_dev) {
drivers/gpu/drm/msm/hdmi/hdmi.c
82
put_device(hdmi->phy_dev);
drivers/gpu/drm/msm/hdmi/hdmi.c
83
hdmi->phy = NULL;
drivers/gpu/drm/msm/hdmi/hdmi.c
84
hdmi->phy_dev = NULL;
drivers/gpu/drm/msm/hdmi/hdmi.c
88
static int msm_hdmi_get_phy(struct hdmi *hdmi)
drivers/gpu/drm/msm/hdmi/hdmi.c
90
struct platform_device *pdev = hdmi->pdev;
drivers/gpu/drm/msm/hdmi/hdmi.h
103
void msm_hdmi_set_mode(struct hdmi *hdmi, bool power_on);
drivers/gpu/drm/msm/hdmi/hdmi.h
105
static inline void hdmi_write(struct hdmi *hdmi, u32 reg, u32 data)
drivers/gpu/drm/msm/hdmi/hdmi.h
107
writel(data, hdmi->mmio + reg);
drivers/gpu/drm/msm/hdmi/hdmi.h
110
static inline u32 hdmi_read(struct hdmi *hdmi, u32 reg)
drivers/gpu/drm/msm/hdmi/hdmi.h
112
return readl(hdmi->mmio + reg);
drivers/gpu/drm/msm/hdmi/hdmi.h
115
static inline u32 hdmi_qfprom_read(struct hdmi *hdmi, u32 reg)
drivers/gpu/drm/msm/hdmi/hdmi.h
117
return readl(hdmi->qfprom_mmio + reg);
drivers/gpu/drm/msm/hdmi/hdmi.h
202
int msm_hdmi_audio_update(struct hdmi *hdmi);
drivers/gpu/drm/msm/hdmi/hdmi.h
214
int msm_hdmi_bridge_init(struct hdmi *hdmi);
drivers/gpu/drm/msm/hdmi/hdmi.h
228
struct i2c_adapter *msm_hdmi_i2c_init(struct hdmi *hdmi);
drivers/gpu/drm/msm/hdmi/hdmi.h
234
struct hdmi_hdcp_ctrl *msm_hdmi_hdcp_init(struct hdmi *hdmi);
drivers/gpu/drm/msm/hdmi/hdmi.h
235
void msm_hdmi_hdcp_destroy(struct hdmi *hdmi);
drivers/gpu/drm/msm/hdmi/hdmi.h
240
static inline struct hdmi_hdcp_ctrl *msm_hdmi_hdcp_init(struct hdmi *hdmi)
drivers/gpu/drm/msm/hdmi/hdmi.h
244
static inline void msm_hdmi_hdcp_destroy(struct hdmi *hdmi) {}
drivers/gpu/drm/msm/hdmi/hdmi.h
98
struct hdmi *hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_audio.c
108
hdmi_write(hdmi, REG_HDMI_ACR_PKT_CTRL, acr_pkt_ctrl);
drivers/gpu/drm/msm/hdmi/hdmi_audio.c
109
hdmi_write(hdmi, REG_HDMI_VBI_PKT_CTRL, vbi_pkt_ctrl);
drivers/gpu/drm/msm/hdmi/hdmi_audio.c
110
hdmi_write(hdmi, REG_HDMI_AUDIO_PKT_CTRL1, aud_pkt_ctrl);
drivers/gpu/drm/msm/hdmi/hdmi_audio.c
112
hdmi_write(hdmi, REG_HDMI_AUD_INT,
drivers/gpu/drm/msm/hdmi/hdmi_audio.c
116
hdmi_write(hdmi, REG_HDMI_AUDIO_CFG, audio_config);
drivers/gpu/drm/msm/hdmi/hdmi_audio.c
130
struct hdmi *hdmi = hdmi_bridge->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_audio.c
158
hdmi->audio.rate = params->sample_rate;
drivers/gpu/drm/msm/hdmi/hdmi_audio.c
159
hdmi->audio.channels = params->cea.channels;
drivers/gpu/drm/msm/hdmi/hdmi_audio.c
16
int msm_hdmi_audio_update(struct hdmi *hdmi)
drivers/gpu/drm/msm/hdmi/hdmi_audio.c
160
hdmi->audio.enabled = true;
drivers/gpu/drm/msm/hdmi/hdmi_audio.c
162
return msm_hdmi_audio_update(hdmi);
drivers/gpu/drm/msm/hdmi/hdmi_audio.c
169
struct hdmi *hdmi = hdmi_bridge->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_audio.c
173
hdmi->audio.rate = 0;
drivers/gpu/drm/msm/hdmi/hdmi_audio.c
174
hdmi->audio.channels = 2;
drivers/gpu/drm/msm/hdmi/hdmi_audio.c
175
hdmi->audio.enabled = false;
drivers/gpu/drm/msm/hdmi/hdmi_audio.c
177
msm_hdmi_audio_update(hdmi);
drivers/gpu/drm/msm/hdmi/hdmi_audio.c
18
struct hdmi_audio *audio = &hdmi->audio;
drivers/gpu/drm/msm/hdmi/hdmi_audio.c
22
if (!hdmi->connector->display_info.is_hdmi)
drivers/gpu/drm/msm/hdmi/hdmi_audio.c
28
DBG("video: power_on=%d, pixclock=%lu", hdmi->power_on, hdmi->pixclock);
drivers/gpu/drm/msm/hdmi/hdmi_audio.c
30
if (enabled && !(hdmi->power_on && hdmi->pixclock)) {
drivers/gpu/drm/msm/hdmi/hdmi_audio.c
36
acr_pkt_ctrl = hdmi_read(hdmi, REG_HDMI_ACR_PKT_CTRL);
drivers/gpu/drm/msm/hdmi/hdmi_audio.c
37
vbi_pkt_ctrl = hdmi_read(hdmi, REG_HDMI_VBI_PKT_CTRL);
drivers/gpu/drm/msm/hdmi/hdmi_audio.c
38
aud_pkt_ctrl = hdmi_read(hdmi, REG_HDMI_AUDIO_PKT_CTRL1);
drivers/gpu/drm/msm/hdmi/hdmi_audio.c
39
audio_config = hdmi_read(hdmi, REG_HDMI_AUDIO_CFG);
drivers/gpu/drm/msm/hdmi/hdmi_audio.c
48
drm_hdmi_acr_get_n_cts(hdmi->pixclock, audio->rate, &n, &cts);
drivers/gpu/drm/msm/hdmi/hdmi_audio.c
77
hdmi_write(hdmi, REG_HDMI_ACR_0(select - 1),
drivers/gpu/drm/msm/hdmi/hdmi_audio.c
79
hdmi_write(hdmi, REG_HDMI_ACR_1(select - 1),
drivers/gpu/drm/msm/hdmi/hdmi_audio.c
82
hdmi_write(hdmi, REG_HDMI_AUDIO_PKT_CTRL2,
drivers/gpu/drm/msm/hdmi/hdmi_audio.c
89
hdmi_write(hdmi, REG_HDMI_GC, 0);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
101
val = hdmi_read(hdmi, REG_HDMI_GEN_PKT_CTRL);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
105
hdmi_write(hdmi, REG_HDMI_GEN_PKT_CTRL, val);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
113
struct hdmi *hdmi = hdmi_bridge->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
116
val = hdmi_read(hdmi, REG_HDMI_GEN_PKT_CTRL);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
121
hdmi_write(hdmi, REG_HDMI_GEN_PKT_CTRL, val);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
130
struct hdmi *hdmi = hdmi_bridge->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
136
DRM_DEV_ERROR(&hdmi->pdev->dev,
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
154
hdmi_write(hdmi, REG_HDMI_AVI_INFO(i), buf[i]);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
156
val = hdmi_read(hdmi, REG_HDMI_INFOFRAME_CTRL0);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
159
hdmi_write(hdmi, REG_HDMI_INFOFRAME_CTRL0, val);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
161
val = hdmi_read(hdmi, REG_HDMI_INFOFRAME_CTRL1);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
164
hdmi_write(hdmi, REG_HDMI_INFOFRAME_CTRL1, val);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
173
struct hdmi *hdmi = hdmi_bridge->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
177
DRM_DEV_ERROR(&hdmi->pdev->dev,
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
184
hdmi_write(hdmi, REG_HDMI_AUDIO_INFO0,
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
190
hdmi_write(hdmi, REG_HDMI_AUDIO_INFO1,
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
196
val = hdmi_read(hdmi, REG_HDMI_INFOFRAME_CTRL0);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
20
struct hdmi *hdmi = hdmi_bridge->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
201
hdmi_write(hdmi, REG_HDMI_INFOFRAME_CTRL0, val);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
210
struct hdmi *hdmi = hdmi_bridge->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
216
DRM_DEV_ERROR(&hdmi->pdev->dev,
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
224
hdmi_write(hdmi, REG_HDMI_GENERIC1_HDR,
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
23
pm_runtime_resume_and_get(&hdmi->pdev->dev);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
232
hdmi_write(hdmi, REG_HDMI_GENERIC1(i), buf[i]);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
234
val = hdmi_read(hdmi, REG_HDMI_GEN_PKT_CTRL);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
238
hdmi_write(hdmi, REG_HDMI_GEN_PKT_CTRL, val);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
247
struct hdmi *hdmi = hdmi_bridge->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
25
if (hdmi->extp_clk) {
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
254
DRM_DEV_ERROR(&hdmi->pdev->dev,
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
26
DBG("pixclock: %lu", hdmi->pixclock);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
262
hdmi_write(hdmi, REG_HDMI_GENERIC0_HDR,
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
27
ret = clk_set_rate(hdmi->extp_clk, hdmi->pixclock);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
270
hdmi_write(hdmi, REG_HDMI_GENERIC0(i), buf[i]);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
272
val = hdmi_read(hdmi, REG_HDMI_GEN_PKT_CTRL);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
277
hdmi_write(hdmi, REG_HDMI_GEN_PKT_CTRL, val);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
282
static void msm_hdmi_set_timings(struct hdmi *hdmi,
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
289
struct hdmi *hdmi = hdmi_bridge->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
290
struct hdmi_phy *phy = hdmi->phy;
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
302
hdmi->pixclock = conn_state->hdmi.tmds_char_rate;
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
304
msm_hdmi_set_timings(hdmi, &crtc_state->adjusted_mode);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
306
mutex_lock(&hdmi->state_mutex);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
307
if (!hdmi->power_on) {
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
31
ret = clk_prepare_enable(hdmi->extp_clk);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
310
hdmi->power_on = true;
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
312
mutex_unlock(&hdmi->state_mutex);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
315
msm_hdmi_audio_update(hdmi);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
319
msm_hdmi_phy_powerup(phy, hdmi->pixclock);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
321
msm_hdmi_set_mode(hdmi, true);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
323
if (hdmi->hdcp_ctrl)
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
324
msm_hdmi_hdcp_on(hdmi->hdcp_ctrl);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
331
struct hdmi *hdmi = hdmi_bridge->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
332
struct hdmi_phy *phy = hdmi->phy;
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
334
if (hdmi->hdcp_ctrl)
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
335
msm_hdmi_hdcp_off(hdmi->hdcp_ctrl);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
340
mutex_lock(&hdmi->state_mutex);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
341
msm_hdmi_set_mode(hdmi, hdmi->hpd_enabled);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
345
if (hdmi->power_on) {
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
347
hdmi->power_on = false;
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
348
if (hdmi->connector->display_info.is_hdmi)
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
349
msm_hdmi_audio_update(hdmi);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
352
mutex_unlock(&hdmi->state_mutex);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
355
static void msm_hdmi_set_timings(struct hdmi *hdmi,
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
370
hdmi_write(hdmi, REG_HDMI_TOTAL,
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
374
hdmi_write(hdmi, REG_HDMI_ACTIVE_HSYNC,
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
377
hdmi_write(hdmi, REG_HDMI_ACTIVE_VSYNC,
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
382
hdmi_write(hdmi, REG_HDMI_VSYNC_TOTAL_F2,
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
384
hdmi_write(hdmi, REG_HDMI_VSYNC_ACTIVE_F2,
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
388
hdmi_write(hdmi, REG_HDMI_VSYNC_TOTAL_F2,
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
390
hdmi_write(hdmi, REG_HDMI_VSYNC_ACTIVE_F2,
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
40
struct hdmi *hdmi = hdmi_bridge->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
403
hdmi_write(hdmi, REG_HDMI_FRAME_CTRL, frame_ctrl);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
410
struct hdmi *hdmi = hdmi_bridge->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
414
hdmi_ctrl = hdmi_read(hdmi, REG_HDMI_CTRL);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
415
hdmi_write(hdmi, REG_HDMI_CTRL, hdmi_ctrl | HDMI_CTRL_ENABLE);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
417
drm_edid = drm_edid_read_ddc(connector, hdmi->i2c);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
419
hdmi_write(hdmi, REG_HDMI_CTRL, hdmi_ctrl);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
429
struct hdmi *hdmi = hdmi_bridge->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
441
hdmi_bridge->hdmi->encoder);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
442
else if (hdmi->extp_clk)
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
443
actual = clk_round_rate(hdmi->extp_clk, tmds_rate);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
47
if (hdmi->extp_clk)
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
48
clk_disable_unprepare(hdmi->extp_clk);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
485
drm_bridge_hpd_notify(bridge, drm_bridge_detect(bridge, hdmi_bridge->hdmi->connector));
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
489
int msm_hdmi_bridge_init(struct hdmi *hdmi)
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
495
hdmi_bridge = devm_drm_bridge_alloc(hdmi->dev->dev, struct hdmi_bridge, base,
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
50
pm_runtime_put(&hdmi->pdev->dev);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
500
hdmi_bridge->hdmi = hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
504
bridge->ddc = hdmi->i2c;
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
514
bridge->hdmi_audio_dev = &hdmi->pdev->dev;
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
517
ret = devm_drm_bridge_add(hdmi->dev->dev, bridge);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
521
ret = drm_bridge_attach(hdmi->encoder, bridge, NULL, DRM_BRIDGE_ATTACH_NO_CONNECTOR);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
525
hdmi->bridge = bridge;
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
60
struct hdmi *hdmi = hdmi_bridge->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
63
val = hdmi_read(hdmi, REG_HDMI_INFOFRAME_CTRL0);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
66
hdmi_write(hdmi, REG_HDMI_INFOFRAME_CTRL0, val);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
68
val = hdmi_read(hdmi, REG_HDMI_INFOFRAME_CTRL1);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
70
hdmi_write(hdmi, REG_HDMI_INFOFRAME_CTRL1, val);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
78
struct hdmi *hdmi = hdmi_bridge->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
81
val = hdmi_read(hdmi, REG_HDMI_INFOFRAME_CTRL0);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
86
hdmi_write(hdmi, REG_HDMI_INFOFRAME_CTRL0, val);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
88
val = hdmi_read(hdmi, REG_HDMI_INFOFRAME_CTRL1);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
90
hdmi_write(hdmi, REG_HDMI_INFOFRAME_CTRL1, val);
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c
98
struct hdmi *hdmi = hdmi_bridge->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1010
rc = msm_hdmi_ddc_read(hdmi, HDCP_PORT_ADDR,
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1030
struct hdmi *hdmi = hdcp_ctrl->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1035
rc = msm_hdmi_ddc_read(hdmi, HDCP_PORT_ADDR, 0x43,
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1117
struct hdmi *hdmi = hdcp_ctrl->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1127
reg_val = hdmi_read(hdmi, REG_HDMI_HDCP_SHA_STATUS);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
116
static int msm_hdmi_ddc_write(struct hdmi *hdmi, u16 addr, u8 offset,
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1211
struct hdmi *hdmi = hdcp_ctrl->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1216
link0_status = hdmi_read(hdmi, REG_HDMI_HDCP_LINK0_STATUS);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1306
struct hdmi *hdmi = hdcp_ctrl->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1317
spin_lock_irqsave(&hdmi->reg_lock, flags);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1318
reg_val = hdmi_read(hdmi, REG_HDMI_CTRL);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1320
hdmi_write(hdmi, REG_HDMI_CTRL, reg_val);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1321
spin_unlock_irqrestore(&hdmi->reg_lock, flags);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1326
queue_work(hdmi->workq, &hdcp_ctrl->hdcp_auth_work);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1331
struct hdmi *hdmi = hdcp_ctrl->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1347
spin_lock_irqsave(&hdmi->reg_lock, flags);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1348
reg_val = hdmi_read(hdmi, REG_HDMI_HPD_CTRL);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1350
hdmi_write(hdmi, REG_HDMI_HPD_CTRL, reg_val);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1357
hdmi_write(hdmi, REG_HDMI_HDCP_INT_CTRL, 0);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1358
spin_unlock_irqrestore(&hdmi->reg_lock, flags);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1371
hdmi_write(hdmi, REG_HDMI_HDCP_RESET,
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1375
hdmi_write(hdmi, REG_HDMI_HDCP_CTRL, 0);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1377
spin_lock_irqsave(&hdmi->reg_lock, flags);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1378
reg_val = hdmi_read(hdmi, REG_HDMI_CTRL);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1380
hdmi_write(hdmi, REG_HDMI_CTRL, reg_val);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1383
reg_val = hdmi_read(hdmi, REG_HDMI_HPD_CTRL);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1385
hdmi_write(hdmi, REG_HDMI_HPD_CTRL, reg_val);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1386
spin_unlock_irqrestore(&hdmi->reg_lock, flags);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1393
struct hdmi_hdcp_ctrl *msm_hdmi_hdcp_init(struct hdmi *hdmi)
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1397
if (!hdmi->qfprom_mmio) {
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
141
rc = i2c_transfer(hdmi->i2c, msgs, 1);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1410
hdcp_ctrl->hdmi = hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1422
void msm_hdmi_hdcp_destroy(struct hdmi *hdmi)
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1424
if (hdmi) {
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1425
kfree(hdmi->hdcp_ctrl);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
1426
hdmi->hdcp_ctrl = NULL;
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
159
struct hdmi *hdmi = hdcp_ctrl->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
167
phy_addr = (u32)hdmi->mmio_phy_addr;
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
190
hdmi_write(hdmi, preg[i], pdata[i]);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
198
struct hdmi *hdmi = hdcp_ctrl->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
202
spin_lock_irqsave(&hdmi->reg_lock, flags);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
203
reg_val = hdmi_read(hdmi, REG_HDMI_HDCP_INT_CTRL);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
206
spin_unlock_irqrestore(&hdmi->reg_lock, flags);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
214
hdmi_write(hdmi, REG_HDMI_HDCP_INT_CTRL, reg_val);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
215
spin_unlock_irqrestore(&hdmi->reg_lock, flags);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
228
reg_val = hdmi_read(hdmi, REG_HDMI_HDCP_LINK0_STATUS);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
232
queue_work(hdmi->workq, &hdcp_ctrl->hdcp_reauth_work);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
260
struct hdmi *hdmi = hdcp_ctrl->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
263
hdcp_ctrl->aksv_lsb = hdmi_qfprom_read(hdmi, HDCP_KSV_LSB);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
264
hdcp_ctrl->aksv_msb = hdmi_qfprom_read(hdmi, HDCP_KSV_MSB);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
283
struct hdmi *hdmi = hdcp_ctrl->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
288
reg_val = hdmi_read(hdmi, REG_HDMI_HDCP_DDC_STATUS);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
305
hdmi_write(hdmi, REG_HDMI_HDCP_DDC_CTRL_0,
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
309
reg_val = hdmi_read(hdmi, REG_HDMI_HDCP_DDC_CTRL_1);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
311
hdmi_write(hdmi, REG_HDMI_HDCP_DDC_CTRL_1, reg_val);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
314
reg_val = hdmi_read(hdmi, REG_HDMI_HDCP_DDC_STATUS);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
320
hdmi_write(hdmi, REG_HDMI_HDCP_DDC_CTRL_0, 0);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
325
hdmi_read(hdmi, REG_HDMI_DDC_SW_STATUS));
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
327
reg_val = hdmi_read(hdmi, REG_HDMI_DDC_CTRL);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
329
hdmi_write(hdmi, REG_HDMI_DDC_CTRL, reg_val);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
333
reg_val = hdmi_read(hdmi, REG_HDMI_DDC_CTRL);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
335
hdmi_write(hdmi, REG_HDMI_DDC_CTRL, reg_val);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
338
reg_val = hdmi_read(hdmi, REG_HDMI_DDC_CTRL);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
340
hdmi_write(hdmi, REG_HDMI_DDC_CTRL, reg_val);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
346
reg_val = hdmi_read(hdmi, REG_HDMI_DDC_CTRL);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
348
hdmi_write(hdmi, REG_HDMI_DDC_CTRL, reg_val);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
350
hdmi_read(hdmi, REG_HDMI_DDC_SW_STATUS));
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
363
struct hdmi *hdmi = hdcp_ctrl->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
365
if (hdmi_read(hdmi, REG_HDMI_DDC_HW_STATUS) == 0)
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
371
hdcp_ddc_status = hdmi_read(hdmi, REG_HDMI_HDCP_DDC_STATUS);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
372
ddc_hw_status = hdmi_read(hdmi, REG_HDMI_DDC_HW_STATUS);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
400
struct hdmi *hdmi = hdcp_ctrl->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
411
spin_lock_irqsave(&hdmi->reg_lock, flags);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
412
reg_val = hdmi_read(hdmi, REG_HDMI_HPD_CTRL);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
414
hdmi_write(hdmi, REG_HDMI_HPD_CTRL, reg_val);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
417
hdmi_write(hdmi, REG_HDMI_HDCP_INT_CTRL, 0);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
418
spin_unlock_irqrestore(&hdmi->reg_lock, flags);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
420
hdmi_write(hdmi, REG_HDMI_HDCP_RESET,
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
430
hdmi_write(hdmi, REG_HDMI_HDCP_CTRL, 0);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
433
spin_lock_irqsave(&hdmi->reg_lock, flags);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
434
reg_val = hdmi_read(hdmi, REG_HDMI_HPD_CTRL);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
436
hdmi_write(hdmi, REG_HDMI_HPD_CTRL, reg_val);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
437
spin_unlock_irqrestore(&hdmi->reg_lock, flags);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
452
queue_work(hdmi->workq, &hdcp_ctrl->hdcp_auth_work);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
457
struct hdmi *hdmi = hdcp_ctrl->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
473
spin_lock_irqsave(&hdmi->reg_lock, flags);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
475
reg_val = hdmi_read(hdmi, REG_HDMI_CTRL);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
477
hdmi_write(hdmi, REG_HDMI_CTRL, reg_val);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
480
reg_val = hdmi_read(hdmi, REG_HDMI_DDC_ARBITRATION);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
482
hdmi_write(hdmi, REG_HDMI_DDC_ARBITRATION, reg_val);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
483
spin_unlock_irqrestore(&hdmi->reg_lock, flags);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
49
struct hdmi *hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
490
hdmi_write(hdmi, REG_HDMI_HDCP_SW_LOWER_AKSV, hdcp_ctrl->aksv_lsb);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
491
hdmi_write(hdmi, REG_HDMI_HDCP_SW_UPPER_AKSV, hdcp_ctrl->aksv_msb);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
497
hdmi_write(hdmi, REG_HDMI_HDCP_ENTROPY_CTRL0, 0xB1FFB0FF);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
498
hdmi_write(hdmi, REG_HDMI_HDCP_ENTROPY_CTRL1, 0xF00DFACE);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
501
reg_val = hdmi_read(hdmi, REG_HDMI_HDCP_DEBUG_CTRL);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
503
hdmi_write(hdmi, REG_HDMI_HDCP_DEBUG_CTRL, reg_val);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
505
hdmi_read(hdmi, REG_HDMI_HDCP_DEBUG_CTRL));
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
518
hdmi_write(hdmi, REG_HDMI_HDCP_CTRL, HDMI_HDCP_CTRL_ENABLE);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
524
link0_status = hdmi_read(hdmi, REG_HDMI_HDCP_LINK0_STATUS);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
539
struct hdmi *hdmi = hdcp_ctrl->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
545
spin_lock_irqsave(&hdmi->reg_lock, flags);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
546
reg_val = hdmi_read(hdmi, REG_HDMI_CTRL);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
548
hdmi_write(hdmi, REG_HDMI_CTRL, reg_val);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
549
spin_unlock_irqrestore(&hdmi->reg_lock, flags);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
552
queue_work(hdmi->workq, &hdcp_ctrl->hdcp_reauth_work);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
557
struct hdmi *hdmi = hdcp_ctrl->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
565
spin_lock_irqsave(&hdmi->reg_lock, flags);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
566
reg_val = hdmi_read(hdmi, REG_HDMI_DDC_ARBITRATION);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
568
hdmi_write(hdmi, REG_HDMI_DDC_ARBITRATION, reg_val);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
569
spin_unlock_irqrestore(&hdmi->reg_lock, flags);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
572
spin_lock_irqsave(&hdmi->reg_lock, flags);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
573
reg_val = hdmi_read(hdmi, REG_HDMI_CTRL);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
575
hdmi_write(hdmi, REG_HDMI_CTRL, reg_val);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
576
spin_unlock_irqrestore(&hdmi->reg_lock, flags);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
593
struct hdmi *hdmi = hdcp_ctrl->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
601
link0_status = hdmi_read(hdmi, REG_HDMI_HDCP_LINK0_STATUS);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
622
link0_status = hdmi_read(hdmi, REG_HDMI_HDCP_LINK0_STATUS);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
648
struct hdmi *hdmi = hdcp_ctrl->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
654
link0_an[0] = hdmi_read(hdmi, REG_HDMI_HDCP_RCVPORT_DATA5);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
655
link0_an[1] = hdmi_read(hdmi, REG_HDMI_HDCP_RCVPORT_DATA6);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
658
link0_aksv_0 = hdmi_read(hdmi, REG_HDMI_HDCP_RCVPORT_DATA3);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
659
link0_aksv_1 = hdmi_read(hdmi, REG_HDMI_HDCP_RCVPORT_DATA4);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
670
rc = msm_hdmi_ddc_write(hdmi, HDCP_PORT_ADDR, 0x18, (u8 *)link0_an,
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
679
rc = msm_hdmi_ddc_write(hdmi, HDCP_PORT_ADDR, 0x10, aksv, 5);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
692
struct hdmi *hdmi = hdcp_ctrl->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
697
rc = msm_hdmi_ddc_read(hdmi, HDCP_PORT_ADDR, 0x00, bksv, 5);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
730
struct hdmi *hdmi = hdcp_ctrl->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
734
rc = msm_hdmi_ddc_read(hdmi, HDCP_PORT_ADDR, 0x40, &bcaps, 1);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
754
struct hdmi *hdmi = hdcp_ctrl->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
776
hdmi_write(hdmi, REG_HDMI_HDCP_RCVPORT_DATA4, 0);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
78
static int msm_hdmi_ddc_read(struct hdmi *hdmi, u16 addr, u8 offset,
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
793
spin_lock_irqsave(&hdmi->reg_lock, flags);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
794
hdmi_write(hdmi, REG_HDMI_HDCP_INT_CTRL,
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
800
spin_unlock_irqrestore(&hdmi->reg_lock, flags);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
808
struct hdmi *hdmi = hdcp_ctrl->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
821
rc = msm_hdmi_ddc_read(hdmi, HDCP_PORT_ADDR, 0x08, buf, 2);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
829
hdmi_write(hdmi, REG_HDMI_HDCP_RCVPORT_DATA2_0,
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
838
struct hdmi *hdmi = hdcp_ctrl->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
849
link0_status = hdmi_read(hdmi, REG_HDMI_HDCP_LINK0_STATUS);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
856
hdmi_write(hdmi, REG_HDMI_HDCP_CTRL,
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
867
struct hdmi *hdmi = hdcp_ctrl->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
874
rc = msm_hdmi_ddc_read(hdmi, HDCP_PORT_ADDR, 0x41, buf, 2);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
934
struct hdmi *hdmi = hdcp_ctrl->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
947
rc = msm_hdmi_ddc_read(hdmi, HDCP_PORT_ADDR, 0x40, &bcaps, 1);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
99
rc = i2c_transfer(hdmi->i2c, msgs, 2);
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
993
struct hdmi *hdmi = hdcp_ctrl->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
100
hdmi_write(hdmi, REG_HDMI_HPD_CTRL,
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
102
hdmi_write(hdmi, REG_HDMI_HPD_CTRL,
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
104
spin_unlock_irqrestore(&hdmi->reg_lock, flags);
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
110
struct hdmi *hdmi = hdmi_bridge->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
111
struct device *dev = &hdmi->pdev->dev;
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
114
hdmi_write(hdmi, REG_HDMI_HPD_INT_CTRL, 0);
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
116
mutex_lock(&hdmi->state_mutex);
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
117
hdmi->hpd_enabled = false;
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
118
msm_hdmi_set_mode(hdmi, hdmi->power_on);
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
119
mutex_unlock(&hdmi->state_mutex);
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
127
struct hdmi *hdmi = hdmi_bridge->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
131
hpd_int_status = hdmi_read(hdmi, REG_HDMI_HPD_INT_STATUS);
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
132
hpd_int_ctrl = hdmi_read(hdmi, REG_HDMI_HPD_INT_CTRL);
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
139
hdmi_write(hdmi, REG_HDMI_HPD_INT_CTRL,
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
14
static void msm_hdmi_phy_reset(struct hdmi *hdmi)
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
148
hdmi_write(hdmi, REG_HDMI_HPD_INT_CTRL, hpd_int_ctrl);
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
150
queue_work(hdmi->workq, &hdmi_bridge->hpd_work);
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
154
static enum drm_connector_status detect_reg(struct hdmi *hdmi)
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
159
ret = pm_runtime_resume_and_get(&hdmi->pdev->dev);
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
163
hpd_int_status = hdmi_read(hdmi, REG_HDMI_HPD_INT_STATUS);
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
166
pm_runtime_put(&hdmi->pdev->dev);
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
173
static enum drm_connector_status detect_gpio(struct hdmi *hdmi)
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
175
return gpiod_get_value(hdmi->hpd_gpiod) ?
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
18
val = hdmi_read(hdmi, REG_HDMI_PHY_CTRL);
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
184
struct hdmi *hdmi = hdmi_bridge->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
192
if (!hdmi->hpd_gpiod)
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
193
return detect_reg(hdmi);
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
196
stat_gpio = detect_gpio(hdmi);
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
197
stat_reg = detect_reg(hdmi);
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
22
hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
26
hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
32
hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
36
hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
44
hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
48
hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
54
hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
58
hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
66
struct hdmi *hdmi = hdmi_bridge->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
67
struct device *dev = &hdmi->pdev->dev;
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
72
if (hdmi->hpd_gpiod)
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
73
gpiod_set_value_cansleep(hdmi->hpd_gpiod, 1);
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
79
mutex_lock(&hdmi->state_mutex);
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
80
msm_hdmi_set_mode(hdmi, false);
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
81
msm_hdmi_phy_reset(hdmi);
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
82
msm_hdmi_set_mode(hdmi, true);
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
84
hdmi->hpd_enabled = true;
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
85
mutex_unlock(&hdmi->state_mutex);
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
87
hdmi_write(hdmi, REG_HDMI_USEC_REFTIMER, 0x0001001b);
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
90
hdmi_write(hdmi, REG_HDMI_HPD_INT_CTRL,
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
95
spin_lock_irqsave(&hdmi->reg_lock, flags);
drivers/gpu/drm/msm/hdmi/hdmi_hpd.c
96
hpd_ctrl = hdmi_read(hdmi, REG_HDMI_HPD_CTRL);
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
105
WARN_ON(!(hdmi_read(hdmi, REG_HDMI_CTRL) & HDMI_CTRL_ENABLE));
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
11
struct hdmi *hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
110
ret = pm_runtime_resume_and_get(&hdmi->pdev->dev);
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
135
hdmi_write(hdmi, REG_HDMI_DDC_DATA, ddc_data);
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
146
hdmi_write(hdmi, REG_HDMI_DDC_DATA, ddc_data);
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
159
hdmi_write(hdmi, REG_HDMI_I2C_TRANSACTION(i), i2c_trans);
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
163
hdmi_write(hdmi, REG_HDMI_DDC_CTRL,
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
173
hdmi_read(hdmi, REG_HDMI_DDC_SW_STATUS),
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
174
hdmi_read(hdmi, REG_HDMI_DDC_HW_STATUS),
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
175
hdmi_read(hdmi, REG_HDMI_DDC_INT_CTRL));
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
179
ddc_status = hdmi_read(hdmi, REG_HDMI_DDC_SW_STATUS);
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
19
struct hdmi *hdmi = hdmi_i2c->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
198
hdmi_write(hdmi, REG_HDMI_DDC_DATA, ddc_data);
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
201
hdmi_read(hdmi, REG_HDMI_DDC_DATA);
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
204
ddc_data = hdmi_read(hdmi, REG_HDMI_DDC_DATA);
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
209
pm_runtime_put(&hdmi->pdev->dev);
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
21
hdmi_write(hdmi, REG_HDMI_DDC_CTRL,
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
214
pm_runtime_put(&hdmi->pdev->dev);
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
23
hdmi_write(hdmi, REG_HDMI_DDC_CTRL,
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
243
struct i2c_adapter *msm_hdmi_i2c_init(struct hdmi *hdmi)
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
257
hdmi_i2c->hdmi = hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
26
hdmi_write(hdmi, REG_HDMI_DDC_SPEED,
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
263
i2c->dev.parent = &hdmi->pdev->dev;
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
30
hdmi_write(hdmi, REG_HDMI_DDC_SETUP,
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
34
hdmi_write(hdmi, REG_HDMI_DDC_REF,
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
41
struct hdmi *hdmi = hdmi_i2c->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
42
struct drm_device *dev = hdmi->dev;
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
49
hdmi_write(hdmi, REG_HDMI_DDC_INT_CTRL,
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
53
ddc_int_ctrl = hdmi_read(hdmi, REG_HDMI_DDC_INT_CTRL);
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
71
struct hdmi *hdmi = hdmi_i2c->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
76
ddc_int_ctrl = hdmi_read(hdmi, REG_HDMI_DDC_INT_CTRL);
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
81
hdmi_write(hdmi, REG_HDMI_DDC_INT_CTRL,
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
93
struct hdmi *hdmi = hdmi_i2c->hdmi;
drivers/gpu/drm/msm/hdmi/hdmi_i2c.c
94
struct drm_device *dev = hdmi->dev;
drivers/gpu/drm/msm/msm_drv.h
277
struct hdmi;
drivers/gpu/drm/msm/msm_drv.h
279
int msm_hdmi_modeset_init(struct hdmi *hdmi, struct drm_device *dev,
drivers/gpu/drm/msm/msm_drv.h
284
static inline int msm_hdmi_modeset_init(struct hdmi *hdmi, struct drm_device *dev,
drivers/gpu/drm/msm/msm_kms.h
142
struct hdmi *hdmi;
drivers/gpu/drm/nouveau/dispnv50/disp.c
1584
if (nv_encoder->dcb->type == DCB_OUTPUT_TMDS && nv_encoder->hdmi.enabled) {
drivers/gpu/drm/nouveau/dispnv50/disp.c
1587
nv_encoder->hdmi.enabled = false;
drivers/gpu/drm/nouveau/dispnv50/disp.c
784
struct drm_hdmi_info *hdmi = &nv_connector->base.display_info.hdmi;
drivers/gpu/drm/nouveau/dispnv50/disp.c
797
if (nv_encoder->i2c && hdmi->scdc.scrambling.supported) {
drivers/gpu/drm/nouveau/dispnv50/disp.c
808
if (high_tmds_clock_ratio || hdmi->scdc.scrambling.low_rates)
drivers/gpu/drm/nouveau/dispnv50/disp.c
820
mode->clock, hdmi->scdc.supported, hdmi->scdc.scrambling.supported,
drivers/gpu/drm/nouveau/dispnv50/disp.c
821
hdmi->scdc.scrambling.low_rates);
drivers/gpu/drm/nouveau/dispnv50/disp.c
842
if (!drm_hdmi_vendor_infoframe_from_display_mode(&infoframe.vendor.hdmi,
drivers/gpu/drm/nouveau/dispnv50/disp.c
850
nv_encoder->hdmi.enabled = true;
drivers/gpu/drm/nouveau/nouveau_connector.c
1053
info->hdmi.scdc.scrambling.supported ?
drivers/gpu/drm/nouveau/nouveau_encoder.h
75
} hdmi;
drivers/gpu/drm/nouveau/nvkm/engine/disp/g84.c
128
.hdmi = &g84_sor_hdmi,
drivers/gpu/drm/nouveau/nvkm/engine/disp/g94.c
299
.hdmi = &g84_sor_hdmi,
drivers/gpu/drm/nouveau/nvkm/engine/disp/ga102.c
110
.hdmi = &gv100_sor_hdmi,
drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c
332
.hdmi = &gf119_sor_hdmi,
drivers/gpu/drm/nouveau/nvkm/engine/disp/gk104.c
100
nvkm_wr32(device, 0x690080 + hdmi, 0x82000000);
drivers/gpu/drm/nouveau/nvkm/engine/disp/gk104.c
119
.hdmi = &gk104_sor_hdmi,
drivers/gpu/drm/nouveau/nvkm/engine/disp/gk104.c
84
const u32 hdmi = head * 0x400;
drivers/gpu/drm/nouveau/nvkm/engine/disp/gk104.c
88
nvkm_mask(device, 0x690100 + hdmi, 0x00000001, 0x00000000);
drivers/gpu/drm/nouveau/nvkm/engine/disp/gk104.c
89
nvkm_mask(device, 0x6900c0 + hdmi, 0x00000001, 0x00000000);
drivers/gpu/drm/nouveau/nvkm/engine/disp/gk104.c
90
nvkm_mask(device, 0x690000 + hdmi, 0x00000001, 0x00000000);
drivers/gpu/drm/nouveau/nvkm/engine/disp/gk104.c
95
nvkm_mask(device, 0x6900c0 + hdmi, 0x00000001, 0x00000000);
drivers/gpu/drm/nouveau/nvkm/engine/disp/gk104.c
96
nvkm_wr32(device, 0x6900cc + hdmi, 0x00000010);
drivers/gpu/drm/nouveau/nvkm/engine/disp/gk104.c
97
nvkm_mask(device, 0x6900c0 + hdmi, 0x00000001, 0x00000001);
drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c
74
.hdmi = &gk104_sor_hdmi,
drivers/gpu/drm/nouveau/nvkm/engine/disp/gm200.c
151
.hdmi = &gm200_sor_hdmi,
drivers/gpu/drm/nouveau/nvkm/engine/disp/gp100.c
41
.hdmi = &gm200_sor_hdmi,
drivers/gpu/drm/nouveau/nvkm/engine/disp/gt215.c
228
.hdmi = &gt215_sor_hdmi,
drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c
153
const u32 hdmi = head * 0x400;
drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c
157
nvkm_mask(device, 0x6f0100 + hdmi, 0x00000001, 0x00000000);
drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c
158
nvkm_mask(device, 0x6f00c0 + hdmi, 0x00000001, 0x00000000);
drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c
159
nvkm_mask(device, 0x6f0000 + hdmi, 0x00000001, 0x00000000);
drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c
164
nvkm_mask(device, 0x6f00c0 + hdmi, 0x00000001, 0x00000000);
drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c
165
nvkm_wr32(device, 0x6f00cc + hdmi, 0x00000010);
drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c
166
nvkm_mask(device, 0x6f00c0 + hdmi, 0x00000001, 0x00000001);
drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c
169
nvkm_wr32(device, 0x6f0080 + hdmi, 0x82000000);
drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c
216
.hdmi = &gv100_sor_hdmi,
drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.h
78
} *hdmi;
drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp77.c
35
.hdmi = &g84_sor_hdmi,
drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp89.c
48
.hdmi = &gt215_sor_hdmi,
drivers/gpu/drm/nouveau/nvkm/engine/disp/tu102.c
93
.hdmi = &gv100_sor_hdmi,
drivers/gpu/drm/nouveau/nvkm/engine/disp/uoutp.c
198
if (ior->func->hdmi->audio)
drivers/gpu/drm/nouveau/nvkm/engine/disp/uoutp.c
199
ior->func->hdmi->audio(ior, args->v0.head, true);
drivers/gpu/drm/nouveau/nvkm/engine/disp/uoutp.c
209
if (ior->func->hdmi->audio)
drivers/gpu/drm/nouveau/nvkm/engine/disp/uoutp.c
210
ior->func->hdmi->audio(ior, args->v0.head, false);
drivers/gpu/drm/nouveau/nvkm/engine/disp/uoutp.c
228
switch (ior->func->hdmi ? args->v0.type : 0xff) {
drivers/gpu/drm/nouveau/nvkm/engine/disp/uoutp.c
230
ior->func->hdmi->infoframe_avi(ior, args->v0.head, &args->v0.data, size);
drivers/gpu/drm/nouveau/nvkm/engine/disp/uoutp.c
233
ior->func->hdmi->infoframe_vsi(ior, args->v0.head, &args->v0.data, size);
drivers/gpu/drm/nouveau/nvkm/engine/disp/uoutp.c
254
if (!ior->func->hdmi ||
drivers/gpu/drm/nouveau/nvkm/engine/disp/uoutp.c
257
(args->v0.scdc && !ior->func->hdmi->scdc))
drivers/gpu/drm/nouveau/nvkm/engine/disp/uoutp.c
261
ior->func->hdmi->infoframe_avi(ior, args->v0.head, NULL, 0);
drivers/gpu/drm/nouveau/nvkm/engine/disp/uoutp.c
262
ior->func->hdmi->infoframe_vsi(ior, args->v0.head, NULL, 0);
drivers/gpu/drm/nouveau/nvkm/engine/disp/uoutp.c
263
ior->func->hdmi->ctrl(ior, args->v0.head, false, 0, 0);
drivers/gpu/drm/nouveau/nvkm/engine/disp/uoutp.c
267
ior->func->hdmi->ctrl(ior, args->v0.head, args->v0.enable,
drivers/gpu/drm/nouveau/nvkm/engine/disp/uoutp.c
269
if (ior->func->hdmi->scdc)
drivers/gpu/drm/nouveau/nvkm/engine/disp/uoutp.c
270
ior->func->hdmi->scdc(ior, args->v0.khz, args->v0.scdc, args->v0.scdc_scrambling,
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/disp.c
549
const u32 hdmi = head * 0x400;
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/disp.c
555
nvkm_mask(device, 0x6f00c0 + hdmi, 0x00000001, 0x00000000);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/disp.c
556
nvkm_wr32(device, 0x6f00cc + hdmi, !enable ? 0x00000001 : 0x00000010);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/disp.c
557
nvkm_mask(device, 0x6f00c0 + hdmi, 0x00000001, 0x00000001);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/disp.c
592
.hdmi = &r535_sor_hdmi,
drivers/gpu/drm/omapdrm/dss/hdmi4.c
103
static int hdmi_power_on_core(struct omap_hdmi *hdmi)
drivers/gpu/drm/omapdrm/dss/hdmi4.c
107
if (hdmi->core.core_pwr_cnt++)
drivers/gpu/drm/omapdrm/dss/hdmi4.c
110
r = regulator_enable(hdmi->vdda_reg);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
114
r = hdmi_runtime_get(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
118
hdmi4_core_powerdown_disable(&hdmi->core);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
121
dss_select_hdmi_venc_clk_source(hdmi->dss, DSS_HDMI_M_PCLK);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
123
hdmi->core_enabled = true;
drivers/gpu/drm/omapdrm/dss/hdmi4.c
128
regulator_disable(hdmi->vdda_reg);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
130
hdmi->core.core_pwr_cnt--;
drivers/gpu/drm/omapdrm/dss/hdmi4.c
135
static void hdmi_power_off_core(struct omap_hdmi *hdmi)
drivers/gpu/drm/omapdrm/dss/hdmi4.c
137
if (--hdmi->core.core_pwr_cnt)
drivers/gpu/drm/omapdrm/dss/hdmi4.c
140
hdmi->core_enabled = false;
drivers/gpu/drm/omapdrm/dss/hdmi4.c
142
hdmi_runtime_put(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
143
regulator_disable(hdmi->vdda_reg);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
146
static int hdmi_power_on_full(struct omap_hdmi *hdmi)
drivers/gpu/drm/omapdrm/dss/hdmi4.c
150
struct hdmi_wp_data *wp = &hdmi->wp;
drivers/gpu/drm/omapdrm/dss/hdmi4.c
154
r = hdmi_power_on_core(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
162
vm = &hdmi->cfg.vm;
drivers/gpu/drm/omapdrm/dss/hdmi4.c
174
dss_pll_calc_b(&hdmi->pll.pll, clk_get_rate(hdmi->pll.pll.clkin),
drivers/gpu/drm/omapdrm/dss/hdmi4.c
177
r = dss_pll_enable(&hdmi->pll.pll);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
183
r = dss_pll_set_config(&hdmi->pll.pll, &hdmi_cinfo);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
189
r = hdmi_phy_configure(&hdmi->phy, hdmi_cinfo.clkdco,
drivers/gpu/drm/omapdrm/dss/hdmi4.c
200
hdmi4_configure(&hdmi->core, &hdmi->wp, &hdmi->cfg);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
202
r = dss_mgr_enable(&hdmi->output);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
206
r = hdmi_wp_video_start(&hdmi->wp);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
216
dss_mgr_disable(&hdmi->output);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
218
hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_OFF);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
222
dss_pll_disable(&hdmi->pll.pll);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
224
hdmi_power_off_core(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
228
static void hdmi_power_off_full(struct omap_hdmi *hdmi)
drivers/gpu/drm/omapdrm/dss/hdmi4.c
230
hdmi_wp_clear_irqenable(&hdmi->wp, ~HDMI_IRQ_CORE);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
232
hdmi_wp_video_stop(&hdmi->wp);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
234
dss_mgr_disable(&hdmi->output);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
236
hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_OFF);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
238
dss_pll_disable(&hdmi->pll.pll);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
240
hdmi_power_off_core(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
245
struct omap_hdmi *hdmi = s->private;
drivers/gpu/drm/omapdrm/dss/hdmi4.c
247
mutex_lock(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
249
if (hdmi_runtime_get(hdmi)) {
drivers/gpu/drm/omapdrm/dss/hdmi4.c
250
mutex_unlock(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
254
hdmi_wp_dump(&hdmi->wp, s);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
255
hdmi_pll_dump(&hdmi->pll, s);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
256
hdmi_phy_dump(&hdmi->phy, s);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
257
hdmi4_core_dump(&hdmi->core, s);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
259
hdmi_runtime_put(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
260
mutex_unlock(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
278
struct omap_hdmi *hdmi = container_of(core, struct omap_hdmi, core);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
283
mutex_lock(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
285
r = hdmi_power_on_core(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
291
mutex_unlock(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
295
mutex_unlock(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
301
struct omap_hdmi *hdmi = container_of(core, struct omap_hdmi, core);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
305
mutex_lock(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
307
hdmi_power_off_core(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
309
mutex_unlock(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
320
struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
325
return drm_bridge_attach(encoder, hdmi->output.next_bridge,
drivers/gpu/drm/omapdrm/dss/hdmi4.c
333
struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
335
mutex_lock(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
337
drm_display_mode_to_videomode(adjusted_mode, &hdmi->cfg.vm);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
339
dispc_set_tv_pclk(hdmi->dss->dispc, adjusted_mode->clock * 1000);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
341
mutex_unlock(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
347
struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
369
hdmi->cfg.hdmi_dvi_mode = connector->display_info.is_hdmi
drivers/gpu/drm/omapdrm/dss/hdmi4.c
380
hdmi->cfg.infoframe = avi;
drivers/gpu/drm/omapdrm/dss/hdmi4.c
383
mutex_lock(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
385
ret = hdmi_power_on_full(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
391
if (hdmi->audio_configured) {
drivers/gpu/drm/omapdrm/dss/hdmi4.c
392
ret = hdmi4_audio_config(&hdmi->core, &hdmi->wp,
drivers/gpu/drm/omapdrm/dss/hdmi4.c
393
&hdmi->audio_config,
drivers/gpu/drm/omapdrm/dss/hdmi4.c
394
hdmi->cfg.vm.pixelclock);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
397
hdmi->audio_abort_cb(&hdmi->pdev->dev);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
398
hdmi->audio_configured = false;
drivers/gpu/drm/omapdrm/dss/hdmi4.c
40
static int hdmi_runtime_get(struct omap_hdmi *hdmi)
drivers/gpu/drm/omapdrm/dss/hdmi4.c
402
spin_lock_irqsave(&hdmi->audio_playing_lock, flags);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
403
if (hdmi->audio_configured && hdmi->audio_playing)
drivers/gpu/drm/omapdrm/dss/hdmi4.c
404
hdmi_start_audio_stream(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
405
hdmi->display_enabled = true;
drivers/gpu/drm/omapdrm/dss/hdmi4.c
406
spin_unlock_irqrestore(&hdmi->audio_playing_lock, flags);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
409
mutex_unlock(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
415
struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
418
mutex_lock(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
420
spin_lock_irqsave(&hdmi->audio_playing_lock, flags);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
421
hdmi_stop_audio_stream(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
422
hdmi->display_enabled = false;
drivers/gpu/drm/omapdrm/dss/hdmi4.c
423
spin_unlock_irqrestore(&hdmi->audio_playing_lock, flags);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
425
hdmi_power_off_full(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
427
mutex_unlock(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
434
struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
437
hdmi4_cec_set_phys_addr(&hdmi->core, CEC_PHYS_ADDR_INVALID);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
443
struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
449
need_enable = hdmi->core_enabled == false;
drivers/gpu/drm/omapdrm/dss/hdmi4.c
452
r = hdmi4_core_enable(&hdmi->core);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
457
mutex_lock(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
458
r = hdmi_runtime_get(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
46
r = pm_runtime_get_sync(&hdmi->pdev->dev);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
461
r = hdmi4_core_ddc_init(&hdmi->core);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
465
drm_edid = drm_edid_read_custom(connector, hdmi4_core_ddc_read, &hdmi->core);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
468
hdmi_runtime_put(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
469
mutex_unlock(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
48
pm_runtime_put_noidle(&hdmi->pdev->dev);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
487
hdmi4_cec_set_phys_addr(&hdmi->core, cec_addr);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
490
hdmi4_core_disable(&hdmi->core);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
507
static void hdmi4_bridge_init(struct omap_hdmi *hdmi)
drivers/gpu/drm/omapdrm/dss/hdmi4.c
509
hdmi->bridge.of_node = hdmi->pdev->dev.of_node;
drivers/gpu/drm/omapdrm/dss/hdmi4.c
510
hdmi->bridge.ops = DRM_BRIDGE_OP_EDID;
drivers/gpu/drm/omapdrm/dss/hdmi4.c
511
hdmi->bridge.type = DRM_MODE_CONNECTOR_HDMIA;
drivers/gpu/drm/omapdrm/dss/hdmi4.c
513
drm_bridge_add(&hdmi->bridge);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
516
static void hdmi4_bridge_cleanup(struct omap_hdmi *hdmi)
drivers/gpu/drm/omapdrm/dss/hdmi4.c
518
drm_bridge_remove(&hdmi->bridge);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
54
static void hdmi_runtime_put(struct omap_hdmi *hdmi)
drivers/gpu/drm/omapdrm/dss/hdmi4.c
60
r = pm_runtime_put_sync(&hdmi->pdev->dev);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
620
static int hdmi_audio_register(struct omap_hdmi *hdmi)
drivers/gpu/drm/omapdrm/dss/hdmi4.c
623
.dev = &hdmi->pdev->dev,
drivers/gpu/drm/omapdrm/dss/hdmi4.c
625
.audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi->wp),
drivers/gpu/drm/omapdrm/dss/hdmi4.c
629
hdmi->audio_pdev = platform_device_register_data(
drivers/gpu/drm/omapdrm/dss/hdmi4.c
630
&hdmi->pdev->dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO,
drivers/gpu/drm/omapdrm/dss/hdmi4.c
633
if (IS_ERR(hdmi->audio_pdev))
drivers/gpu/drm/omapdrm/dss/hdmi4.c
634
return PTR_ERR(hdmi->audio_pdev);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
646
struct omap_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
649
hdmi->dss = dss;
drivers/gpu/drm/omapdrm/dss/hdmi4.c
651
r = hdmi_runtime_get(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
655
r = hdmi_pll_init(dss, hdmi->pdev, &hdmi->pll, &hdmi->wp);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
659
r = hdmi4_cec_init(hdmi->pdev, &hdmi->core, &hdmi->wp);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
66
struct omap_hdmi *hdmi = data;
drivers/gpu/drm/omapdrm/dss/hdmi4.c
663
r = hdmi_audio_register(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
669
hdmi->debugfs = dss_debugfs_create_file(dss, "hdmi", hdmi_dump_regs,
drivers/gpu/drm/omapdrm/dss/hdmi4.c
67
struct hdmi_wp_data *wp = &hdmi->wp;
drivers/gpu/drm/omapdrm/dss/hdmi4.c
670
hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
672
hdmi_runtime_put(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
677
hdmi4_cec_uninit(&hdmi->core);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
679
hdmi_pll_uninit(&hdmi->pll);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
681
hdmi_runtime_put(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
687
struct omap_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
689
dss_debugfs_remove_file(hdmi->debugfs);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
691
if (hdmi->audio_pdev)
drivers/gpu/drm/omapdrm/dss/hdmi4.c
692
platform_device_unregister(hdmi->audio_pdev);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
694
hdmi4_cec_uninit(&hdmi->core);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
695
hdmi_pll_uninit(&hdmi->pll);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
707
static int hdmi4_init_output(struct omap_hdmi *hdmi)
drivers/gpu/drm/omapdrm/dss/hdmi4.c
709
struct omap_dss_device *out = &hdmi->output;
drivers/gpu/drm/omapdrm/dss/hdmi4.c
712
hdmi4_bridge_init(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
714
out->dev = &hdmi->pdev->dev;
drivers/gpu/drm/omapdrm/dss/hdmi4.c
721
r = omapdss_device_init_output(out, &hdmi->bridge);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
723
hdmi4_bridge_cleanup(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
732
static void hdmi4_uninit_output(struct omap_hdmi *hdmi)
drivers/gpu/drm/omapdrm/dss/hdmi4.c
734
struct omap_dss_device *out = &hdmi->output;
drivers/gpu/drm/omapdrm/dss/hdmi4.c
739
hdmi4_bridge_cleanup(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
742
static int hdmi4_probe_of(struct omap_hdmi *hdmi)
drivers/gpu/drm/omapdrm/dss/hdmi4.c
744
struct platform_device *pdev = hdmi->pdev;
drivers/gpu/drm/omapdrm/dss/hdmi4.c
753
r = hdmi_parse_lanes_of(pdev, ep, &hdmi->phy);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
760
struct omap_hdmi *hdmi;
drivers/gpu/drm/omapdrm/dss/hdmi4.c
764
hdmi = devm_drm_bridge_alloc(&pdev->dev, struct omap_hdmi, bridge, &hdmi4_bridge_funcs);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
765
if (IS_ERR(hdmi))
drivers/gpu/drm/omapdrm/dss/hdmi4.c
766
return PTR_ERR(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
768
hdmi->pdev = pdev;
drivers/gpu/drm/omapdrm/dss/hdmi4.c
770
dev_set_drvdata(&pdev->dev, hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
772
mutex_init(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
773
spin_lock_init(&hdmi->audio_playing_lock);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
775
r = hdmi4_probe_of(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
779
r = hdmi_wp_init(pdev, &hdmi->wp, 4);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
783
r = hdmi_phy_init(pdev, &hdmi->phy, 4);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
787
r = hdmi4_core_init(pdev, &hdmi->core);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
799
IRQF_ONESHOT, "OMAP HDMI", hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
805
hdmi->vdda_reg = devm_regulator_get(&pdev->dev, "vdda");
drivers/gpu/drm/omapdrm/dss/hdmi4.c
806
if (IS_ERR(hdmi->vdda_reg)) {
drivers/gpu/drm/omapdrm/dss/hdmi4.c
807
r = PTR_ERR(hdmi->vdda_reg);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
815
r = hdmi4_init_output(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
826
hdmi4_uninit_output(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
834
struct omap_hdmi *hdmi = platform_get_drvdata(pdev);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
838
hdmi4_uninit_output(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
93
u32 intr4 = hdmi_read_reg(hdmi->core.base, HDMI_CORE_SYS_INTR4);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
95
hdmi_write_reg(hdmi->core.base, HDMI_CORE_SYS_INTR4, intr4);
drivers/gpu/drm/omapdrm/dss/hdmi4.c
97
hdmi4_cec_irq(&hdmi->core);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
101
REG_FLD_MOD(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL, 0, 15, 15);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
112
static int hdmi_power_on_core(struct omap_hdmi *hdmi)
drivers/gpu/drm/omapdrm/dss/hdmi5.c
116
r = regulator_enable(hdmi->vdda_reg);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
120
r = hdmi_runtime_get(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
125
dss_select_hdmi_venc_clk_source(hdmi->dss, DSS_HDMI_M_PCLK);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
127
hdmi->core_enabled = true;
drivers/gpu/drm/omapdrm/dss/hdmi5.c
132
regulator_disable(hdmi->vdda_reg);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
137
static void hdmi_power_off_core(struct omap_hdmi *hdmi)
drivers/gpu/drm/omapdrm/dss/hdmi5.c
139
hdmi->core_enabled = false;
drivers/gpu/drm/omapdrm/dss/hdmi5.c
141
hdmi_runtime_put(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
142
regulator_disable(hdmi->vdda_reg);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
145
static int hdmi_power_on_full(struct omap_hdmi *hdmi)
drivers/gpu/drm/omapdrm/dss/hdmi5.c
152
r = hdmi_power_on_core(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
156
vm = &hdmi->cfg.vm;
drivers/gpu/drm/omapdrm/dss/hdmi5.c
168
dss_pll_calc_b(&hdmi->pll.pll, clk_get_rate(hdmi->pll.pll.clkin),
drivers/gpu/drm/omapdrm/dss/hdmi5.c
172
hdmi_wp_clear_irqenable(&hdmi->wp, 0xffffffff);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
173
hdmi_wp_set_irqstatus(&hdmi->wp,
drivers/gpu/drm/omapdrm/dss/hdmi5.c
174
hdmi_wp_get_irqstatus(&hdmi->wp));
drivers/gpu/drm/omapdrm/dss/hdmi5.c
176
r = dss_pll_enable(&hdmi->pll.pll);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
182
r = dss_pll_set_config(&hdmi->pll.pll, &hdmi_cinfo);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
188
r = hdmi_phy_configure(&hdmi->phy, hdmi_cinfo.clkdco,
drivers/gpu/drm/omapdrm/dss/hdmi5.c
195
r = hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_LDOON);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
199
hdmi5_configure(&hdmi->core, &hdmi->wp, &hdmi->cfg);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
201
r = dss_mgr_enable(&hdmi->output);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
205
r = hdmi_wp_video_start(&hdmi->wp);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
209
hdmi_wp_set_irqenable(&hdmi->wp,
drivers/gpu/drm/omapdrm/dss/hdmi5.c
215
dss_mgr_disable(&hdmi->output);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
217
hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_OFF);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
221
dss_pll_disable(&hdmi->pll.pll);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
223
hdmi_power_off_core(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
227
static void hdmi_power_off_full(struct omap_hdmi *hdmi)
drivers/gpu/drm/omapdrm/dss/hdmi5.c
229
hdmi_wp_clear_irqenable(&hdmi->wp, 0xffffffff);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
231
hdmi_wp_video_stop(&hdmi->wp);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
233
dss_mgr_disable(&hdmi->output);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
235
hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_OFF);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
237
dss_pll_disable(&hdmi->pll.pll);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
239
hdmi_power_off_core(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
244
struct omap_hdmi *hdmi = s->private;
drivers/gpu/drm/omapdrm/dss/hdmi5.c
246
mutex_lock(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
248
if (hdmi_runtime_get(hdmi)) {
drivers/gpu/drm/omapdrm/dss/hdmi5.c
249
mutex_unlock(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
253
hdmi_wp_dump(&hdmi->wp, s);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
254
hdmi_pll_dump(&hdmi->pll, s);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
255
hdmi_phy_dump(&hdmi->phy, s);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
256
hdmi5_core_dump(&hdmi->core, s);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
258
hdmi_runtime_put(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
259
mutex_unlock(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
277
static int hdmi_core_enable(struct omap_hdmi *hdmi)
drivers/gpu/drm/omapdrm/dss/hdmi5.c
283
mutex_lock(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
285
r = hdmi_power_on_core(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
291
mutex_unlock(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
295
mutex_unlock(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
299
static void hdmi_core_disable(struct omap_hdmi *hdmi)
drivers/gpu/drm/omapdrm/dss/hdmi5.c
303
mutex_lock(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
305
hdmi_power_off_core(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
307
mutex_unlock(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
318
struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
323
return drm_bridge_attach(encoder, hdmi->output.next_bridge,
drivers/gpu/drm/omapdrm/dss/hdmi5.c
331
struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
333
mutex_lock(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
335
drm_display_mode_to_videomode(adjusted_mode, &hdmi->cfg.vm);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
337
dispc_set_tv_pclk(hdmi->dss->dispc, adjusted_mode->clock * 1000);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
339
mutex_unlock(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
345
struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
367
hdmi->cfg.hdmi_dvi_mode = connector->display_info.is_hdmi
drivers/gpu/drm/omapdrm/dss/hdmi5.c
378
hdmi->cfg.infoframe = avi;
drivers/gpu/drm/omapdrm/dss/hdmi5.c
381
mutex_lock(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
383
ret = hdmi_power_on_full(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
389
if (hdmi->audio_configured) {
drivers/gpu/drm/omapdrm/dss/hdmi5.c
390
ret = hdmi5_audio_config(&hdmi->core, &hdmi->wp,
drivers/gpu/drm/omapdrm/dss/hdmi5.c
391
&hdmi->audio_config,
drivers/gpu/drm/omapdrm/dss/hdmi5.c
392
hdmi->cfg.vm.pixelclock);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
395
hdmi->audio_abort_cb(&hdmi->pdev->dev);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
396
hdmi->audio_configured = false;
drivers/gpu/drm/omapdrm/dss/hdmi5.c
400
spin_lock_irqsave(&hdmi->audio_playing_lock, flags);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
401
if (hdmi->audio_configured && hdmi->audio_playing)
drivers/gpu/drm/omapdrm/dss/hdmi5.c
402
hdmi_start_audio_stream(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
403
hdmi->display_enabled = true;
drivers/gpu/drm/omapdrm/dss/hdmi5.c
404
spin_unlock_irqrestore(&hdmi->audio_playing_lock, flags);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
407
mutex_unlock(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
41
static int hdmi_runtime_get(struct omap_hdmi *hdmi)
drivers/gpu/drm/omapdrm/dss/hdmi5.c
413
struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
416
mutex_lock(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
418
spin_lock_irqsave(&hdmi->audio_playing_lock, flags);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
419
hdmi_stop_audio_stream(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
420
hdmi->display_enabled = false;
drivers/gpu/drm/omapdrm/dss/hdmi5.c
421
spin_unlock_irqrestore(&hdmi->audio_playing_lock, flags);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
423
hdmi_power_off_full(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
425
mutex_unlock(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
431
struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
437
need_enable = hdmi->core_enabled == false;
drivers/gpu/drm/omapdrm/dss/hdmi5.c
440
r = hdmi_core_enable(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
445
mutex_lock(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
446
r = hdmi_runtime_get(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
449
idlemode = REG_GET(hdmi->wp.base, HDMI_WP_SYSCONFIG, 3, 2);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
451
REG_FLD_MOD(hdmi->wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
453
hdmi5_core_ddc_init(&hdmi->core);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
455
drm_edid = drm_edid_read_custom(connector, hdmi5_core_ddc_read, &hdmi->core);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
457
hdmi5_core_ddc_uninit(&hdmi->core);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
459
REG_FLD_MOD(hdmi->wp.base, HDMI_WP_SYSCONFIG, idlemode, 3, 2);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
461
hdmi_runtime_put(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
462
mutex_unlock(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
465
hdmi_core_disable(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
47
r = pm_runtime_get_sync(&hdmi->pdev->dev);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
481
static void hdmi5_bridge_init(struct omap_hdmi *hdmi)
drivers/gpu/drm/omapdrm/dss/hdmi5.c
483
hdmi->bridge.of_node = hdmi->pdev->dev.of_node;
drivers/gpu/drm/omapdrm/dss/hdmi5.c
484
hdmi->bridge.ops = DRM_BRIDGE_OP_EDID;
drivers/gpu/drm/omapdrm/dss/hdmi5.c
485
hdmi->bridge.type = DRM_MODE_CONNECTOR_HDMIA;
drivers/gpu/drm/omapdrm/dss/hdmi5.c
487
drm_bridge_add(&hdmi->bridge);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
49
pm_runtime_put_noidle(&hdmi->pdev->dev);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
490
static void hdmi5_bridge_cleanup(struct omap_hdmi *hdmi)
drivers/gpu/drm/omapdrm/dss/hdmi5.c
492
drm_bridge_remove(&hdmi->bridge);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
55
static void hdmi_runtime_put(struct omap_hdmi *hdmi)
drivers/gpu/drm/omapdrm/dss/hdmi5.c
595
static int hdmi_audio_register(struct omap_hdmi *hdmi)
drivers/gpu/drm/omapdrm/dss/hdmi5.c
598
.dev = &hdmi->pdev->dev,
drivers/gpu/drm/omapdrm/dss/hdmi5.c
600
.audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi->wp),
drivers/gpu/drm/omapdrm/dss/hdmi5.c
604
hdmi->audio_pdev = platform_device_register_data(
drivers/gpu/drm/omapdrm/dss/hdmi5.c
605
&hdmi->pdev->dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO,
drivers/gpu/drm/omapdrm/dss/hdmi5.c
608
if (IS_ERR(hdmi->audio_pdev))
drivers/gpu/drm/omapdrm/dss/hdmi5.c
609
return PTR_ERR(hdmi->audio_pdev);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
61
r = pm_runtime_put_sync(&hdmi->pdev->dev);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
611
hdmi_runtime_get(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
612
hdmi->wp_idlemode =
drivers/gpu/drm/omapdrm/dss/hdmi5.c
613
REG_GET(hdmi->wp.base, HDMI_WP_SYSCONFIG, 3, 2);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
614
hdmi_runtime_put(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
626
struct omap_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
629
hdmi->dss = dss;
drivers/gpu/drm/omapdrm/dss/hdmi5.c
631
r = hdmi_pll_init(dss, hdmi->pdev, &hdmi->pll, &hdmi->wp);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
635
r = hdmi_audio_register(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
641
hdmi->debugfs = dss_debugfs_create_file(dss, "hdmi", hdmi_dump_regs,
drivers/gpu/drm/omapdrm/dss/hdmi5.c
642
hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
647
hdmi_pll_uninit(&hdmi->pll);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
653
struct omap_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
655
dss_debugfs_remove_file(hdmi->debugfs);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
657
if (hdmi->audio_pdev)
drivers/gpu/drm/omapdrm/dss/hdmi5.c
658
platform_device_unregister(hdmi->audio_pdev);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
660
hdmi_pll_uninit(&hdmi->pll);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
67
struct omap_hdmi *hdmi = data;
drivers/gpu/drm/omapdrm/dss/hdmi5.c
672
static int hdmi5_init_output(struct omap_hdmi *hdmi)
drivers/gpu/drm/omapdrm/dss/hdmi5.c
674
struct omap_dss_device *out = &hdmi->output;
drivers/gpu/drm/omapdrm/dss/hdmi5.c
677
hdmi5_bridge_init(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
679
out->dev = &hdmi->pdev->dev;
drivers/gpu/drm/omapdrm/dss/hdmi5.c
68
struct hdmi_wp_data *wp = &hdmi->wp;
drivers/gpu/drm/omapdrm/dss/hdmi5.c
686
r = omapdss_device_init_output(out, &hdmi->bridge);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
688
hdmi5_bridge_cleanup(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
697
static void hdmi5_uninit_output(struct omap_hdmi *hdmi)
drivers/gpu/drm/omapdrm/dss/hdmi5.c
699
struct omap_dss_device *out = &hdmi->output;
drivers/gpu/drm/omapdrm/dss/hdmi5.c
704
hdmi5_bridge_cleanup(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
707
static int hdmi5_probe_of(struct omap_hdmi *hdmi)
drivers/gpu/drm/omapdrm/dss/hdmi5.c
709
struct platform_device *pdev = hdmi->pdev;
drivers/gpu/drm/omapdrm/dss/hdmi5.c
718
r = hdmi_parse_lanes_of(pdev, ep, &hdmi->phy);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
725
struct omap_hdmi *hdmi;
drivers/gpu/drm/omapdrm/dss/hdmi5.c
729
hdmi = devm_drm_bridge_alloc(&pdev->dev, struct omap_hdmi, bridge, &hdmi5_bridge_funcs);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
730
if (IS_ERR(hdmi))
drivers/gpu/drm/omapdrm/dss/hdmi5.c
731
return PTR_ERR(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
733
hdmi->pdev = pdev;
drivers/gpu/drm/omapdrm/dss/hdmi5.c
735
dev_set_drvdata(&pdev->dev, hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
737
mutex_init(&hdmi->lock);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
738
spin_lock_init(&hdmi->audio_playing_lock);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
740
r = hdmi5_probe_of(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
744
r = hdmi_wp_init(pdev, &hdmi->wp, 5);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
748
r = hdmi_phy_init(pdev, &hdmi->phy, 5);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
752
r = hdmi5_core_init(pdev, &hdmi->core);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
764
IRQF_ONESHOT, "OMAP HDMI", hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
770
hdmi->vdda_reg = devm_regulator_get(&pdev->dev, "vdda");
drivers/gpu/drm/omapdrm/dss/hdmi5.c
771
if (IS_ERR(hdmi->vdda_reg)) {
drivers/gpu/drm/omapdrm/dss/hdmi5.c
772
r = PTR_ERR(hdmi->vdda_reg);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
780
r = hdmi5_init_output(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
791
hdmi5_uninit_output(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
799
struct omap_hdmi *hdmi = platform_get_drvdata(pdev);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
803
hdmi5_uninit_output(hdmi);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
91
v = hdmi_read_reg(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL);
drivers/gpu/drm/omapdrm/dss/hdmi5.c
94
hdmi_write_reg(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL, v);
drivers/gpu/drm/radeon/r600_hdmi.c
454
u32 hdmi = HDMI0_ERROR_ACK;
drivers/gpu/drm/radeon/r600_hdmi.c
462
hdmi |= HDMI0_ENABLE;
drivers/gpu/drm/radeon/r600_hdmi.c
467
hdmi |= HDMI0_STREAM(HDMI0_STREAM_TMDSA);
drivers/gpu/drm/radeon/r600_hdmi.c
475
hdmi |= HDMI0_STREAM(HDMI0_STREAM_LVTMA);
drivers/gpu/drm/radeon/r600_hdmi.c
483
hdmi |= HDMI0_STREAM(HDMI0_STREAM_DDIA);
drivers/gpu/drm/radeon/r600_hdmi.c
490
hdmi |= HDMI0_STREAM(HDMI0_STREAM_DVOA);
drivers/gpu/drm/radeon/r600_hdmi.c
497
WREG32(HDMI0_CONTROL + dig->afmt->offset, hdmi);
drivers/gpu/drm/renesas/rcar-du/rcar_dw_hdmi.c
40
rcar_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data,
drivers/gpu/drm/renesas/rcar-du/rcar_dw_hdmi.c
54
static int rcar_hdmi_phy_configure(struct dw_hdmi *hdmi, void *data,
drivers/gpu/drm/renesas/rcar-du/rcar_dw_hdmi.c
67
dw_hdmi_phy_i2c_write(hdmi, params->opmode_div,
drivers/gpu/drm/renesas/rcar-du/rcar_dw_hdmi.c
69
dw_hdmi_phy_i2c_write(hdmi, params->curr_gmp,
drivers/gpu/drm/renesas/rcar-du/rcar_dw_hdmi.c
71
dw_hdmi_phy_i2c_write(hdmi, params->div, RCAR_HDMI_PHY_PLLDIVCTRL);
drivers/gpu/drm/renesas/rcar-du/rcar_dw_hdmi.c
84
struct dw_hdmi *hdmi;
drivers/gpu/drm/renesas/rcar-du/rcar_dw_hdmi.c
86
hdmi = dw_hdmi_probe(pdev, &rcar_dw_hdmi_plat_data);
drivers/gpu/drm/renesas/rcar-du/rcar_dw_hdmi.c
87
if (IS_ERR(hdmi))
drivers/gpu/drm/renesas/rcar-du/rcar_dw_hdmi.c
88
return PTR_ERR(hdmi);
drivers/gpu/drm/renesas/rcar-du/rcar_dw_hdmi.c
90
platform_set_drvdata(pdev, hdmi);
drivers/gpu/drm/renesas/rcar-du/rcar_dw_hdmi.c
97
struct dw_hdmi *hdmi = platform_get_drvdata(pdev);
drivers/gpu/drm/renesas/rcar-du/rcar_dw_hdmi.c
99
dw_hdmi_remove(hdmi);
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
198
static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi)
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
200
struct device_node *np = hdmi->dev->of_node;
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
203
hdmi->regmap = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
204
if (IS_ERR(hdmi->regmap)) {
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
205
dev_err(hdmi->dev, "Unable to get rockchip,grf\n");
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
206
return PTR_ERR(hdmi->regmap);
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
209
hdmi->ref_clk = devm_clk_get_optional_enabled(hdmi->dev, "ref");
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
210
if (!hdmi->ref_clk)
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
211
hdmi->ref_clk = devm_clk_get_optional_enabled(hdmi->dev, "vpll");
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
213
if (IS_ERR(hdmi->ref_clk)) {
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
214
ret = PTR_ERR(hdmi->ref_clk);
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
215
return dev_err_probe(hdmi->dev, ret, "failed to get reference clock\n");
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
218
hdmi->grf_clk = devm_clk_get_optional(hdmi->dev, "grf");
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
219
if (IS_ERR(hdmi->grf_clk)) {
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
220
ret = PTR_ERR(hdmi->grf_clk);
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
221
return dev_err_probe(hdmi->dev, ret, "failed to get grf clock\n");
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
224
ret = devm_regulator_get_enable(hdmi->dev, "avdd-0v9");
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
228
ret = devm_regulator_get_enable(hdmi->dev, "avdd-1v8");
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
238
struct rockchip_hdmi *hdmi = data;
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
241
if (hdmi->chip_data->max_tmds_clock &&
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
242
mode->clock > hdmi->chip_data->max_tmds_clock)
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
245
if (hdmi->ref_clk) {
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
246
int rpclk = clk_round_rate(hdmi->ref_clk, pclk);
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
252
if (hdmi->hdmiphy_clk) {
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
253
int rpclk = clk_round_rate(hdmi->hdmiphy_clk, pclk);
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
278
struct rockchip_hdmi *hdmi = to_rockchip_hdmi(encoder);
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
280
clk_set_rate(hdmi->ref_clk, adj_mode->clock * 1000);
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
285
struct rockchip_hdmi *hdmi = to_rockchip_hdmi(encoder);
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
289
if (hdmi->chip_data->lcdsel_grf_reg < 0)
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
292
ret = drm_of_encoder_active_endpoint_id(hdmi->dev->of_node, encoder);
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
294
val = hdmi->chip_data->lcdsel_lit;
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
296
val = hdmi->chip_data->lcdsel_big;
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
298
ret = clk_prepare_enable(hdmi->grf_clk);
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
300
dev_err(hdmi->dev, "failed to enable grfclk %d\n", ret);
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
304
ret = regmap_write(hdmi->regmap, hdmi->chip_data->lcdsel_grf_reg, val);
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
306
dev_err(hdmi->dev, "Could not write to GRF: %d\n", ret);
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
308
clk_disable_unprepare(hdmi->grf_clk);
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
309
dev_dbg(hdmi->dev, "vop %s output to hdmi\n", ret ? "LIT" : "BIG");
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
337
struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data;
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
341
return phy_power_on(hdmi->phy);
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
346
struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data;
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
348
phy_power_off(hdmi->phy);
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
353
struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data;
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
357
regmap_write(hdmi->regmap, RK3228_GRF_SOC_CON6,
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
362
regmap_write(hdmi->regmap, RK3228_GRF_SOC_CON2,
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
370
struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data;
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
376
regmap_write(hdmi->regmap, RK3328_GRF_SOC_CON4,
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
380
regmap_write(hdmi->regmap, RK3328_GRF_SOC_CON4,
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
388
struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data;
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
393
regmap_write(hdmi->regmap, RK3328_GRF_SOC_CON4,
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
399
regmap_write(hdmi->regmap, RK3328_GRF_SOC_CON3,
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
404
regmap_write(hdmi->regmap, RK3328_GRF_SOC_CON2,
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
545
struct rockchip_hdmi *hdmi;
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
551
hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL);
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
552
if (!hdmi)
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
561
hdmi->dev = &pdev->dev;
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
562
hdmi->plat_data = plat_data;
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
563
hdmi->chip_data = plat_data->phy_data;
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
564
plat_data->phy_data = hdmi;
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
565
plat_data->priv_data = hdmi;
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
566
encoder = &hdmi->encoder.encoder;
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
569
rockchip_drm_encoder_set_crtc_endpoint_id(&hdmi->encoder,
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
581
ret = rockchip_hdmi_parse_dt(hdmi);
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
583
return dev_err_probe(hdmi->dev, ret, "Unable to parse OF data\n");
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
586
hdmi->phy = devm_phy_optional_get(dev, "hdmi");
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
587
if (IS_ERR(hdmi->phy)) {
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
588
ret = PTR_ERR(hdmi->phy);
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
589
return dev_err_probe(hdmi->dev, ret, "failed to get phy\n");
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
598
hdmi->hdmiphy_clk = of_clk_get_from_provider(&clkspec);
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
600
if (IS_ERR(hdmi->hdmiphy_clk))
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
601
hdmi->hdmiphy_clk = NULL;
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
605
if (hdmi->chip_data == &rk3568_chip_data) {
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
606
regmap_write(hdmi->regmap, RK3568_GRF_VO_CON1,
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
614
platform_set_drvdata(pdev, hdmi);
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
616
hdmi->hdmi = dw_hdmi_bind(pdev, encoder, plat_data);
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
622
if (IS_ERR(hdmi->hdmi)) {
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
623
ret = PTR_ERR(hdmi->hdmi);
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
638
struct rockchip_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
640
dw_hdmi_unbind(hdmi->hdmi);
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
641
drm_encoder_cleanup(&hdmi->encoder.encoder);
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
661
struct rockchip_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
663
dw_hdmi_resume(hdmi->hdmi);
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
81
struct dw_hdmi *hdmi;
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
106
void (*io_init)(struct rockchip_hdmi_qp *hdmi);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
107
void (*enc_init)(struct rockchip_hdmi_qp *hdmi, struct rockchip_crtc_state *state);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
121
struct rockchip_hdmi_qp *hdmi = to_rockchip_hdmi_qp(encoder);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
125
gpiod_set_value_cansleep(hdmi->frl_enable_gpio, 0);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
130
if (hdmi->ctrl_ops->enc_init)
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
131
hdmi->ctrl_ops->enc_init(hdmi, to_rockchip_crtc_state(crtc->state));
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
139
struct rockchip_hdmi_qp *hdmi = to_rockchip_hdmi_qp(encoder);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
144
if (hdmi->tmds_char_rate == conn_state->hdmi.tmds_char_rate &&
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
145
s->output_bpc == conn_state->hdmi.output_bpc)
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
148
phy_cfg.hdmi.tmds_char_rate = conn_state->hdmi.tmds_char_rate;
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
149
phy_cfg.hdmi.bpc = conn_state->hdmi.output_bpc;
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
151
ret = phy_configure(hdmi->phy, &phy_cfg);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
153
hdmi->tmds_char_rate = conn_state->hdmi.tmds_char_rate;
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
156
s->output_bpc = conn_state->hdmi.output_bpc;
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
158
dev_err(hdmi->dev, "Failed to configure phy: %d\n", ret);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
172
struct rockchip_hdmi_qp *hdmi = (struct rockchip_hdmi_qp *)data;
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
174
return phy_power_on(hdmi->phy);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
180
struct rockchip_hdmi_qp *hdmi = (struct rockchip_hdmi_qp *)data;
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
182
phy_power_off(hdmi->phy);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
188
struct rockchip_hdmi_qp *hdmi = (struct rockchip_hdmi_qp *)data;
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
191
regmap_read(hdmi->regmap, RK3588_GRF_SOC_STATUS1, &val);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
192
val &= hdmi->port_id ? RK3588_HDMI1_LEVEL_INT : RK3588_HDMI0_LEVEL_INT;
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
199
struct rockchip_hdmi_qp *hdmi = (struct rockchip_hdmi_qp *)data;
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
202
if (hdmi->port_id)
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
209
regmap_write(hdmi->regmap, RK3588_GRF_SOC_CON2, val);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
222
struct rockchip_hdmi_qp *hdmi = (struct rockchip_hdmi_qp *)data;
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
225
regmap_read(hdmi->regmap, RK3576_IOC_HDMI_HPD_STATUS, &val);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
233
struct rockchip_hdmi_qp *hdmi = (struct rockchip_hdmi_qp *)data;
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
239
regmap_write(hdmi->regmap, RK3576_IOC_MISC_CON0, val);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
240
regmap_write(hdmi->regmap, 0xa404, 0xffff0102);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
252
struct rockchip_hdmi_qp *hdmi = container_of(work,
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
255
struct drm_device *drm = hdmi->encoder.encoder.dev;
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
261
dev_dbg(hdmi->dev, "connector status changed\n");
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
267
struct rockchip_hdmi_qp *hdmi = dev_id;
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
270
regmap_read(hdmi->regmap, RK3576_IOC_HDMI_HPD_STATUS, &intr_stat);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
274
regmap_write(hdmi->regmap, RK3576_IOC_MISC_CON0, val);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
283
struct rockchip_hdmi_qp *hdmi = dev_id;
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
287
regmap_write(hdmi->regmap, RK3576_IOC_MISC_CON0, val);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
288
mod_delayed_work(system_percpu_wq, &hdmi->hpd_work,
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
292
regmap_write(hdmi->regmap, RK3576_IOC_MISC_CON0, val);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
299
struct rockchip_hdmi_qp *hdmi = dev_id;
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
302
regmap_read(hdmi->regmap, RK3588_GRF_SOC_STATUS1, &intr_stat);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
305
if (hdmi->port_id)
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
309
regmap_write(hdmi->regmap, RK3588_GRF_SOC_CON2, val);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
318
struct rockchip_hdmi_qp *hdmi = dev_id;
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
321
if (hdmi->port_id)
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
325
regmap_write(hdmi->regmap, RK3588_GRF_SOC_CON2, val);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
327
mod_delayed_work(system_percpu_wq, &hdmi->hpd_work,
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
330
if (hdmi->port_id)
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
334
regmap_write(hdmi->regmap, RK3588_GRF_SOC_CON2, val);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
339
static void dw_hdmi_qp_rk3576_io_init(struct rockchip_hdmi_qp *hdmi)
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
348
regmap_write(hdmi->vo_regmap, RK3576_VO0_GRF_SOC_CON14, val);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
351
regmap_write(hdmi->regmap, RK3576_IOC_MISC_CON0, val);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
354
static void dw_hdmi_qp_rk3588_io_init(struct rockchip_hdmi_qp *hdmi)
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
362
regmap_write(hdmi->vo_regmap,
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
363
hdmi->port_id ? RK3588_GRF_VO1_CON6 : RK3588_GRF_VO1_CON3,
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
368
regmap_write(hdmi->regmap, RK3588_GRF_SOC_CON7, val);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
370
if (hdmi->port_id)
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
374
regmap_write(hdmi->vo_regmap, RK3588_GRF_VO1_CON9, val);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
376
if (hdmi->port_id)
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
380
regmap_write(hdmi->regmap, RK3588_GRF_SOC_CON2, val);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
383
static void dw_hdmi_qp_rk3576_enc_init(struct rockchip_hdmi_qp *hdmi,
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
393
regmap_write(hdmi->vo_regmap, RK3576_VO0_GRF_SOC_CON8, val);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
396
static void dw_hdmi_qp_rk3588_enc_init(struct rockchip_hdmi_qp *hdmi,
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
406
regmap_write(hdmi->vo_regmap,
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
407
hdmi->port_id ? RK3588_GRF_VO1_CON6 : RK3588_GRF_VO1_CON3,
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
472
struct rockchip_hdmi_qp *hdmi;
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
481
hdmi = drmm_kzalloc(drm, sizeof(*hdmi), GFP_KERNEL);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
482
if (!hdmi)
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
497
hdmi->ctrl_ops = cfg->ctrl_ops;
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
498
hdmi->dev = &pdev->dev;
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
499
hdmi->port_id = -ENODEV;
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
504
hdmi->port_id = i;
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
508
if (hdmi->port_id < 0)
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
509
return dev_err_probe(hdmi->dev, hdmi->port_id,
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
513
plat_data.phy_data = hdmi;
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
516
encoder = &hdmi->encoder.encoder;
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
519
rockchip_drm_encoder_set_crtc_endpoint_id(&hdmi->encoder,
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
530
hdmi->regmap = syscon_regmap_lookup_by_phandle(dev->of_node,
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
532
if (IS_ERR(hdmi->regmap))
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
533
return dev_err_probe(hdmi->dev, PTR_ERR(hdmi->regmap),
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
536
hdmi->vo_regmap = syscon_regmap_lookup_by_phandle(dev->of_node,
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
538
if (IS_ERR(hdmi->vo_regmap))
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
539
return dev_err_probe(hdmi->dev, PTR_ERR(hdmi->vo_regmap),
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
542
ret = devm_clk_bulk_get_all_enabled(hdmi->dev, &clks);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
544
return dev_err_probe(hdmi->dev, ret, "Failed to get clocks\n");
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
546
ref_clk = clk_get(hdmi->dev, "ref");
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
548
return dev_err_probe(hdmi->dev, PTR_ERR(ref_clk),
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
554
hdmi->frl_enable_gpio = devm_gpiod_get_optional(hdmi->dev, "frl-enable",
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
556
if (IS_ERR(hdmi->frl_enable_gpio))
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
557
return dev_err_probe(hdmi->dev, PTR_ERR(hdmi->frl_enable_gpio),
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
560
hdmi->phy = devm_of_phy_get_by_index(dev, dev->of_node, 0);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
561
if (IS_ERR(hdmi->phy))
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
562
return dev_err_probe(hdmi->dev, PTR_ERR(hdmi->phy),
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
565
cfg->ctrl_ops->io_init(hdmi);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
567
INIT_DELAYED_WORK(&hdmi->hpd_work, dw_hdmi_qp_rk3588_hpd_work);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
581
ret = devm_request_threaded_irq(hdmi->dev, irq,
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
585
hdmi);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
592
return dev_err_probe(hdmi->dev, ret, "Failed to init encoder");
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
594
platform_set_drvdata(pdev, hdmi);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
596
hdmi->hdmi = dw_hdmi_qp_bind(pdev, encoder, &plat_data);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
597
if (IS_ERR(hdmi->hdmi))
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
598
return dev_err_probe(hdmi->dev, PTR_ERR(hdmi->hdmi),
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
603
return dev_err_probe(hdmi->dev, PTR_ERR(connector),
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
613
struct rockchip_hdmi_qp *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
615
cancel_delayed_work_sync(&hdmi->hpd_work);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
635
struct rockchip_hdmi_qp *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
637
dw_hdmi_qp_suspend(dev, hdmi->hdmi);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
644
struct rockchip_hdmi_qp *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
646
hdmi->ctrl_ops->io_init(hdmi);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
648
dw_hdmi_qp_resume(dev, hdmi->hdmi);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
650
if (hdmi->encoder.encoder.dev)
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
651
drm_helper_hpd_irq_event(hdmi->encoder.encoder.dev);
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
96
struct dw_hdmi_qp *hdmi;
drivers/gpu/drm/rockchip/inno_hdmi-rockchip.c
104
hdmi->grf = syscon_regmap_lookup_by_phandle(dev->of_node, "rockchip,grf");
drivers/gpu/drm/rockchip/inno_hdmi-rockchip.c
105
if (IS_ERR(hdmi->grf))
drivers/gpu/drm/rockchip/inno_hdmi-rockchip.c
107
PTR_ERR(hdmi->grf), "Unable to get rockchip,grf\n");
drivers/gpu/drm/rockchip/inno_hdmi-rockchip.c
110
encoder = &hdmi->encoder.encoder;
drivers/gpu/drm/rockchip/inno_hdmi-rockchip.c
128
dev_set_drvdata(dev, hdmi);
drivers/gpu/drm/rockchip/inno_hdmi-rockchip.c
130
hdmi->base = inno_hdmi_bind(dev, encoder, plat_data);
drivers/gpu/drm/rockchip/inno_hdmi-rockchip.c
135
dev_err(hdmi->dev, "failed to init bridge connector: %d\n", ret);
drivers/gpu/drm/rockchip/inno_hdmi-rockchip.c
58
struct rockchip_inno_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/rockchip/inno_hdmi-rockchip.c
65
regmap_write(hdmi->grf, RK3036_GRF_SOC_CON2, value);
drivers/gpu/drm/rockchip/inno_hdmi-rockchip.c
89
struct rockchip_inno_hdmi *hdmi;
drivers/gpu/drm/rockchip/inno_hdmi-rockchip.c
93
hdmi = drmm_kzalloc(drm, sizeof(*hdmi), GFP_KERNEL);
drivers/gpu/drm/rockchip/inno_hdmi-rockchip.c
94
if (!hdmi)
drivers/gpu/drm/rockchip/inno_hdmi-rockchip.c
97
hdmi->dev = dev;
drivers/gpu/drm/rockchip/inno_hdmi-rockchip.c
99
plat_data = of_device_get_match_data(hdmi->dev);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
102
static inline u8 rk3066_hdmi_get_power_mode(struct rk3066_hdmi *hdmi)
drivers/gpu/drm/rockchip/rk3066_hdmi.c
104
return hdmi_readb(hdmi, HDMI_SYS_CTRL) & HDMI_SYS_POWER_MODE_MASK;
drivers/gpu/drm/rockchip/rk3066_hdmi.c
107
static void rk3066_hdmi_set_power_mode(struct rk3066_hdmi *hdmi, int mode)
drivers/gpu/drm/rockchip/rk3066_hdmi.c
112
current_mode = rk3066_hdmi_get_power_mode(hdmi);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
114
DRM_DEV_DEBUG(hdmi->dev, "mode :%d\n", mode);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
115
DRM_DEV_DEBUG(hdmi->dev, "current_mode :%d\n", current_mode);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
130
DRM_DEV_DEBUG(hdmi->dev, "%d: next_mode :%d\n", i, next_mode);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
133
hdmi_modb(hdmi, HDMI_SYS_CTRL,
drivers/gpu/drm/rockchip/rk3066_hdmi.c
136
hdmi_writeb(hdmi, HDMI_SYS_CTRL,
drivers/gpu/drm/rockchip/rk3066_hdmi.c
140
hdmi_writeb(hdmi, HDMI_SYS_CTRL,
drivers/gpu/drm/rockchip/rk3066_hdmi.c
144
hdmi_writeb(hdmi, HDMI_SYS_CTRL,
drivers/gpu/drm/rockchip/rk3066_hdmi.c
158
hdmi->tmdsclk = DEFAULT_PLLA_RATE;
drivers/gpu/drm/rockchip/rk3066_hdmi.c
163
struct rk3066_hdmi *hdmi = bridge_to_rk3066_hdmi(bridge);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
165
hdmi_writeb(hdmi, HDMI_CP_BUF_INDEX, HDMI_INFOFRAME_AVI);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
184
struct rk3066_hdmi *hdmi = bridge_to_rk3066_hdmi(bridge);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
190
hdmi_writeb(hdmi, HDMI_CP_BUF_ACC_HB0 + i * 4, buffer[i]);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
206
static int rk3066_hdmi_config_video_timing(struct rk3066_hdmi *hdmi,
drivers/gpu/drm/rockchip/rk3066_hdmi.c
220
if (hdmi->hdmi_data.vic == 2 || hdmi->hdmi_data.vic == 3)
drivers/gpu/drm/rockchip/rk3066_hdmi.c
226
hdmi_writeb(hdmi, HDMI_EXT_VIDEO_PARA, value);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
230
hdmi_writeb(hdmi, HDMI_EXT_HTOTAL_L, value & 0xFF);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
231
hdmi_writeb(hdmi, HDMI_EXT_HTOTAL_H, (value >> 8) & 0xFF);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
234
hdmi_writeb(hdmi, HDMI_EXT_HBLANK_L, value & 0xFF);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
235
hdmi_writeb(hdmi, HDMI_EXT_HBLANK_H, (value >> 8) & 0xFF);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
238
hdmi_writeb(hdmi, HDMI_EXT_HDELAY_L, value & 0xFF);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
239
hdmi_writeb(hdmi, HDMI_EXT_HDELAY_H, (value >> 8) & 0xFF);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
242
hdmi_writeb(hdmi, HDMI_EXT_HDURATION_L, value & 0xFF);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
243
hdmi_writeb(hdmi, HDMI_EXT_HDURATION_H, (value >> 8) & 0xFF);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
246
hdmi_writeb(hdmi, HDMI_EXT_VTOTAL_L, value & 0xFF);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
247
hdmi_writeb(hdmi, HDMI_EXT_VTOTAL_H, (value >> 8) & 0xFF);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
250
hdmi_writeb(hdmi, HDMI_EXT_VBLANK_L, value & 0xFF);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
253
hdmi_writeb(hdmi, HDMI_EXT_VDELAY, value & 0xFF);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
256
hdmi_writeb(hdmi, HDMI_EXT_VDURATION, value & 0xFF);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
262
rk3066_hdmi_phy_write(struct rk3066_hdmi *hdmi, u16 offset, u8 value)
drivers/gpu/drm/rockchip/rk3066_hdmi.c
264
hdmi_writeb(hdmi, offset, value);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
265
hdmi_modb(hdmi, HDMI_SYS_CTRL,
drivers/gpu/drm/rockchip/rk3066_hdmi.c
268
hdmi_modb(hdmi, HDMI_SYS_CTRL, HDMI_SYS_PLL_RESET_MASK, 0);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
272
static void rk3066_hdmi_config_phy(struct rk3066_hdmi *hdmi)
drivers/gpu/drm/rockchip/rk3066_hdmi.c
275
hdmi_writeb(hdmi, HDMI_DEEP_COLOR_MODE, 0x22);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
282
if (hdmi->tmdsclk > 100000000) {
drivers/gpu/drm/rockchip/rk3066_hdmi.c
283
rk3066_hdmi_phy_write(hdmi, 0x158, 0x0E);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
284
rk3066_hdmi_phy_write(hdmi, 0x15c, 0x00);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
285
rk3066_hdmi_phy_write(hdmi, 0x160, 0x60);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
286
rk3066_hdmi_phy_write(hdmi, 0x164, 0x00);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
287
rk3066_hdmi_phy_write(hdmi, 0x168, 0xDA);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
288
rk3066_hdmi_phy_write(hdmi, 0x16c, 0xA1);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
289
rk3066_hdmi_phy_write(hdmi, 0x170, 0x0e);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
290
rk3066_hdmi_phy_write(hdmi, 0x174, 0x22);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
291
rk3066_hdmi_phy_write(hdmi, 0x178, 0x00);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
292
} else if (hdmi->tmdsclk > 50000000) {
drivers/gpu/drm/rockchip/rk3066_hdmi.c
293
rk3066_hdmi_phy_write(hdmi, 0x158, 0x06);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
294
rk3066_hdmi_phy_write(hdmi, 0x15c, 0x00);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
295
rk3066_hdmi_phy_write(hdmi, 0x160, 0x60);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
296
rk3066_hdmi_phy_write(hdmi, 0x164, 0x00);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
297
rk3066_hdmi_phy_write(hdmi, 0x168, 0xCA);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
298
rk3066_hdmi_phy_write(hdmi, 0x16c, 0xA3);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
299
rk3066_hdmi_phy_write(hdmi, 0x170, 0x0e);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
300
rk3066_hdmi_phy_write(hdmi, 0x174, 0x20);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
301
rk3066_hdmi_phy_write(hdmi, 0x178, 0x00);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
303
rk3066_hdmi_phy_write(hdmi, 0x158, 0x02);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
304
rk3066_hdmi_phy_write(hdmi, 0x15c, 0x00);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
305
rk3066_hdmi_phy_write(hdmi, 0x160, 0x60);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
306
rk3066_hdmi_phy_write(hdmi, 0x164, 0x00);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
307
rk3066_hdmi_phy_write(hdmi, 0x168, 0xC2);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
308
rk3066_hdmi_phy_write(hdmi, 0x16c, 0xA2);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
309
rk3066_hdmi_phy_write(hdmi, 0x170, 0x0e);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
310
rk3066_hdmi_phy_write(hdmi, 0x174, 0x20);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
311
rk3066_hdmi_phy_write(hdmi, 0x178, 0x00);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
315
static int rk3066_hdmi_setup(struct rk3066_hdmi *hdmi,
drivers/gpu/drm/rockchip/rk3066_hdmi.c
318
struct drm_bridge *bridge = &hdmi->bridge;
drivers/gpu/drm/rockchip/rk3066_hdmi.c
338
hdmi->hdmi_data.vic = drm_match_cea_mode(mode);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
339
hdmi->hdmi_data.enc_out_format = HDMI_COLORSPACE_RGB;
drivers/gpu/drm/rockchip/rk3066_hdmi.c
341
if (hdmi->hdmi_data.vic == 6 || hdmi->hdmi_data.vic == 7 ||
drivers/gpu/drm/rockchip/rk3066_hdmi.c
342
hdmi->hdmi_data.vic == 21 || hdmi->hdmi_data.vic == 22 ||
drivers/gpu/drm/rockchip/rk3066_hdmi.c
343
hdmi->hdmi_data.vic == 2 || hdmi->hdmi_data.vic == 3 ||
drivers/gpu/drm/rockchip/rk3066_hdmi.c
344
hdmi->hdmi_data.vic == 17 || hdmi->hdmi_data.vic == 18)
drivers/gpu/drm/rockchip/rk3066_hdmi.c
345
hdmi->hdmi_data.colorimetry = HDMI_COLORIMETRY_ITU_601;
drivers/gpu/drm/rockchip/rk3066_hdmi.c
347
hdmi->hdmi_data.colorimetry = HDMI_COLORIMETRY_ITU_709;
drivers/gpu/drm/rockchip/rk3066_hdmi.c
349
hdmi->tmdsclk = mode->clock * 1000;
drivers/gpu/drm/rockchip/rk3066_hdmi.c
352
hdmi_modb(hdmi, HDMI_VIDEO_CTRL2, HDMI_VIDEO_AUDIO_DISABLE_MASK,
drivers/gpu/drm/rockchip/rk3066_hdmi.c
356
if (rk3066_hdmi_get_power_mode(hdmi) != HDMI_SYS_POWER_MODE_B)
drivers/gpu/drm/rockchip/rk3066_hdmi.c
357
rk3066_hdmi_set_power_mode(hdmi, HDMI_SYS_POWER_MODE_B);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
360
hdmi_modb(hdmi, HDMI_AV_CTRL1,
drivers/gpu/drm/rockchip/rk3066_hdmi.c
362
hdmi_writeb(hdmi, HDMI_VIDEO_CTRL1,
drivers/gpu/drm/rockchip/rk3066_hdmi.c
366
hdmi_writeb(hdmi, HDMI_DEEP_COLOR_MODE, 0x20);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
368
rk3066_hdmi_config_video_timing(hdmi, mode);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
371
hdmi_modb(hdmi, HDMI_HDCP_CTRL, HDMI_VIDEO_MODE_MASK,
drivers/gpu/drm/rockchip/rk3066_hdmi.c
375
hdmi_modb(hdmi, HDMI_HDCP_CTRL, HDMI_VIDEO_MODE_MASK, 0);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
378
rk3066_hdmi_config_phy(hdmi);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
380
rk3066_hdmi_set_power_mode(hdmi, HDMI_SYS_POWER_MODE_E);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
388
rk3066_hdmi_i2c_init(hdmi);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
391
hdmi_modb(hdmi, HDMI_VIDEO_CTRL2,
drivers/gpu/drm/rockchip/rk3066_hdmi.c
399
struct rk3066_hdmi *hdmi = bridge_to_rk3066_hdmi(bridge);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
404
conn_state = drm_atomic_get_new_connector_state(state, hdmi->connector);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
412
mux = drm_of_encoder_active_endpoint_id(hdmi->dev->of_node, &hdmi->encoder.encoder);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
418
regmap_write(hdmi->grf_regmap, GRF_SOC_CON0, val);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
420
DRM_DEV_DEBUG(hdmi->dev, "hdmi encoder enable select: vop%s\n",
drivers/gpu/drm/rockchip/rk3066_hdmi.c
423
rk3066_hdmi_setup(hdmi, state);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
429
struct rk3066_hdmi *hdmi = bridge_to_rk3066_hdmi(bridge);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
431
DRM_DEV_DEBUG(hdmi->dev, "hdmi encoder disable\n");
drivers/gpu/drm/rockchip/rk3066_hdmi.c
433
if (rk3066_hdmi_get_power_mode(hdmi) == HDMI_SYS_POWER_MODE_E) {
drivers/gpu/drm/rockchip/rk3066_hdmi.c
434
hdmi_writeb(hdmi, HDMI_VIDEO_CTRL2,
drivers/gpu/drm/rockchip/rk3066_hdmi.c
436
hdmi_modb(hdmi, HDMI_VIDEO_CTRL2,
drivers/gpu/drm/rockchip/rk3066_hdmi.c
441
rk3066_hdmi_set_power_mode(hdmi, HDMI_SYS_POWER_MODE_A);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
465
struct rk3066_hdmi *hdmi = bridge_to_rk3066_hdmi(bridge);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
467
return (hdmi_readb(hdmi, HDMI_HPG_MENS_STA) & HDMI_HPG_IN_STATUS_HIGH) ?
drivers/gpu/drm/rockchip/rk3066_hdmi.c
474
struct rk3066_hdmi *hdmi = bridge_to_rk3066_hdmi(bridge);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
479
dev_dbg(hdmi->dev, "failed to get edid\n");
drivers/gpu/drm/rockchip/rk3066_hdmi.c
515
struct rk3066_hdmi *hdmi = dev_id;
drivers/gpu/drm/rockchip/rk3066_hdmi.c
519
if (rk3066_hdmi_get_power_mode(hdmi) == HDMI_SYS_POWER_MODE_A)
drivers/gpu/drm/rockchip/rk3066_hdmi.c
520
hdmi_writeb(hdmi, HDMI_SYS_CTRL, HDMI_SYS_POWER_MODE_B);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
522
interrupt = hdmi_readb(hdmi, HDMI_INTR_STATUS1);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
524
hdmi_writeb(hdmi, HDMI_INTR_STATUS1, interrupt);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
527
hdmi->i2c->stat = interrupt;
drivers/gpu/drm/rockchip/rk3066_hdmi.c
528
complete(&hdmi->i2c->cmpltn);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
539
struct rk3066_hdmi *hdmi = dev_id;
drivers/gpu/drm/rockchip/rk3066_hdmi.c
541
drm_helper_hpd_irq_event(hdmi->connector->dev);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
546
static int rk3066_hdmi_i2c_read(struct rk3066_hdmi *hdmi, struct i2c_msg *msgs)
drivers/gpu/drm/rockchip/rk3066_hdmi.c
552
ret = wait_for_completion_timeout(&hdmi->i2c->cmpltn, HZ / 10);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
553
if (!ret || hdmi->i2c->stat & HDMI_INTR_EDID_ERR)
drivers/gpu/drm/rockchip/rk3066_hdmi.c
557
*buf++ = hdmi_readb(hdmi, HDMI_DDC_READ_FIFO_ADDR);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
562
static int rk3066_hdmi_i2c_write(struct rk3066_hdmi *hdmi, struct i2c_msg *msgs)
drivers/gpu/drm/rockchip/rk3066_hdmi.c
573
reinit_completion(&hdmi->i2c->cmpltn);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
576
hdmi->i2c->segment_addr = msgs->buf[0];
drivers/gpu/drm/rockchip/rk3066_hdmi.c
578
hdmi->i2c->ddc_addr = msgs->buf[0];
drivers/gpu/drm/rockchip/rk3066_hdmi.c
581
hdmi_writeb(hdmi, HDMI_EDID_FIFO_ADDR, 0x00);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
584
hdmi_writeb(hdmi, HDMI_EDID_WORD_ADDR, hdmi->i2c->ddc_addr);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
587
hdmi_writeb(hdmi, HDMI_EDID_SEGMENT_POINTER, hdmi->i2c->segment_addr);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
595
struct rk3066_hdmi *hdmi = i2c_get_adapdata(adap);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
596
struct rk3066_hdmi_i2c *i2c = hdmi->i2c;
drivers/gpu/drm/rockchip/rk3066_hdmi.c
601
rk3066_hdmi_i2c_init(hdmi);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
604
hdmi_modb(hdmi, HDMI_INTR_MASK1,
drivers/gpu/drm/rockchip/rk3066_hdmi.c
609
DRM_DEV_DEBUG(hdmi->dev,
drivers/gpu/drm/rockchip/rk3066_hdmi.c
614
ret = rk3066_hdmi_i2c_read(hdmi, &msgs[i]);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
616
ret = rk3066_hdmi_i2c_write(hdmi, &msgs[i]);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
626
hdmi_modb(hdmi, HDMI_INTR_MASK1, HDMI_INTR_EDID_MASK, 0);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
643
static struct i2c_adapter *rk3066_hdmi_i2c_adapter(struct rk3066_hdmi *hdmi)
drivers/gpu/drm/rockchip/rk3066_hdmi.c
649
i2c = devm_kzalloc(hdmi->dev, sizeof(*i2c), GFP_KERNEL);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
658
adap->dev.parent = hdmi->dev;
drivers/gpu/drm/rockchip/rk3066_hdmi.c
659
adap->dev.of_node = hdmi->dev->of_node;
drivers/gpu/drm/rockchip/rk3066_hdmi.c
662
i2c_set_adapdata(adap, hdmi);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
664
ret = devm_i2c_add_adapter(hdmi->dev, adap);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
666
DRM_DEV_ERROR(hdmi->dev, "cannot add %s I2C adapter\n",
drivers/gpu/drm/rockchip/rk3066_hdmi.c
668
devm_kfree(hdmi->dev, i2c);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
672
hdmi->i2c = i2c;
drivers/gpu/drm/rockchip/rk3066_hdmi.c
674
DRM_DEV_DEBUG(hdmi->dev, "registered %s I2C bus driver\n", adap->name);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
680
rk3066_hdmi_register(struct drm_device *drm, struct rk3066_hdmi *hdmi)
drivers/gpu/drm/rockchip/rk3066_hdmi.c
682
struct drm_encoder *encoder = &hdmi->encoder.encoder;
drivers/gpu/drm/rockchip/rk3066_hdmi.c
683
struct device *dev = hdmi->dev;
drivers/gpu/drm/rockchip/rk3066_hdmi.c
69
static inline u8 hdmi_readb(struct rk3066_hdmi *hdmi, u16 offset)
drivers/gpu/drm/rockchip/rk3066_hdmi.c
701
hdmi->bridge.driver_private = hdmi;
drivers/gpu/drm/rockchip/rk3066_hdmi.c
702
hdmi->bridge.funcs = &rk3066_hdmi_bridge_funcs;
drivers/gpu/drm/rockchip/rk3066_hdmi.c
703
hdmi->bridge.ops = DRM_BRIDGE_OP_DETECT |
drivers/gpu/drm/rockchip/rk3066_hdmi.c
707
hdmi->bridge.of_node = hdmi->dev->of_node;
drivers/gpu/drm/rockchip/rk3066_hdmi.c
708
hdmi->bridge.type = DRM_MODE_CONNECTOR_HDMIA;
drivers/gpu/drm/rockchip/rk3066_hdmi.c
709
hdmi->bridge.vendor = "Rockchip";
drivers/gpu/drm/rockchip/rk3066_hdmi.c
71
return readl_relaxed(hdmi->regs + offset);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
710
hdmi->bridge.product = "RK3066 HDMI";
drivers/gpu/drm/rockchip/rk3066_hdmi.c
712
hdmi->bridge.ddc = rk3066_hdmi_i2c_adapter(hdmi);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
713
if (IS_ERR(hdmi->bridge.ddc))
drivers/gpu/drm/rockchip/rk3066_hdmi.c
714
return PTR_ERR(hdmi->bridge.ddc);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
716
if (IS_ERR(hdmi->bridge.ddc))
drivers/gpu/drm/rockchip/rk3066_hdmi.c
717
return PTR_ERR(hdmi->bridge.ddc);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
719
ret = devm_drm_bridge_add(dev, &hdmi->bridge);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
723
ret = drm_bridge_attach(encoder, &hdmi->bridge, NULL, DRM_BRIDGE_ATTACH_NO_CONNECTOR);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
727
hdmi->connector = drm_bridge_connector_init(drm, encoder);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
728
if (IS_ERR(hdmi->connector)) {
drivers/gpu/drm/rockchip/rk3066_hdmi.c
729
ret = PTR_ERR(hdmi->connector);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
730
dev_err(hdmi->dev, "failed to init bridge connector: %d\n", ret);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
74
static inline void hdmi_writeb(struct rk3066_hdmi *hdmi, u16 offset, u32 val)
drivers/gpu/drm/rockchip/rk3066_hdmi.c
742
struct rk3066_hdmi *hdmi;
drivers/gpu/drm/rockchip/rk3066_hdmi.c
746
hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
747
if (!hdmi)
drivers/gpu/drm/rockchip/rk3066_hdmi.c
750
hdmi->dev = dev;
drivers/gpu/drm/rockchip/rk3066_hdmi.c
751
hdmi->drm_dev = drm;
drivers/gpu/drm/rockchip/rk3066_hdmi.c
752
hdmi->regs = devm_platform_ioremap_resource(pdev, 0);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
753
if (IS_ERR(hdmi->regs))
drivers/gpu/drm/rockchip/rk3066_hdmi.c
754
return PTR_ERR(hdmi->regs);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
76
writel_relaxed(val, hdmi->regs + offset);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
760
hdmi->hclk = devm_clk_get(dev, "hclk");
drivers/gpu/drm/rockchip/rk3066_hdmi.c
761
if (IS_ERR(hdmi->hclk)) {
drivers/gpu/drm/rockchip/rk3066_hdmi.c
763
return PTR_ERR(hdmi->hclk);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
766
ret = clk_prepare_enable(hdmi->hclk);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
772
hdmi->grf_regmap = syscon_regmap_lookup_by_phandle(dev->of_node,
drivers/gpu/drm/rockchip/rk3066_hdmi.c
774
if (IS_ERR(hdmi->grf_regmap)) {
drivers/gpu/drm/rockchip/rk3066_hdmi.c
776
ret = PTR_ERR(hdmi->grf_regmap);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
781
hdmi_writeb(hdmi, HDMI_INTERNAL_CLK_DIVIDER, 25);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
783
rk3066_hdmi_set_power_mode(hdmi, HDMI_SYS_POWER_MODE_B);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
785
hdmi_writeb(hdmi, HDMI_INTR_MASK1, HDMI_INTR_HOTPLUG);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
786
hdmi_writeb(hdmi, HDMI_INTR_MASK2, 0);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
787
hdmi_writeb(hdmi, HDMI_INTR_MASK3, 0);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
788
hdmi_writeb(hdmi, HDMI_INTR_MASK4, 0);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
789
rk3066_hdmi_set_power_mode(hdmi, HDMI_SYS_POWER_MODE_A);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
79
static inline void hdmi_modb(struct rk3066_hdmi *hdmi, u16 offset,
drivers/gpu/drm/rockchip/rk3066_hdmi.c
791
ret = rk3066_hdmi_register(drm, hdmi);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
795
dev_set_drvdata(dev, hdmi);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
799
dev_name(dev), hdmi);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
808
hdmi->encoder.encoder.funcs->destroy(&hdmi->encoder.encoder);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
810
clk_disable_unprepare(hdmi->hclk);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
818
struct rk3066_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
82
u8 temp = hdmi_readb(hdmi, offset) & ~msk;
drivers/gpu/drm/rockchip/rk3066_hdmi.c
820
hdmi->encoder.encoder.funcs->destroy(&hdmi->encoder.encoder);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
822
clk_disable_unprepare(hdmi->hclk);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
85
hdmi_writeb(hdmi, offset, temp);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
88
static void rk3066_hdmi_i2c_init(struct rk3066_hdmi *hdmi)
drivers/gpu/drm/rockchip/rk3066_hdmi.c
92
ddc_bus_freq = (hdmi->tmdsclk >> 2) / HDMI_SCL_RATE;
drivers/gpu/drm/rockchip/rk3066_hdmi.c
94
hdmi_writeb(hdmi, HDMI_DDC_BUS_FREQ_L, ddc_bus_freq & 0xFF);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
95
hdmi_writeb(hdmi, HDMI_DDC_BUS_FREQ_H, (ddc_bus_freq >> 8) & 0xFF);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
98
hdmi_modb(hdmi, HDMI_INTR_MASK1, HDMI_INTR_EDID_MASK, 0);
drivers/gpu/drm/rockchip/rk3066_hdmi.c
99
hdmi_writeb(hdmi, HDMI_INTR_STATUS1, HDMI_INTR_EDID_MASK);
drivers/gpu/drm/sti/sti_hdmi.c
1027
struct sti_hdmi *hdmi = hdmi_connector->hdmi;
drivers/gpu/drm/sti/sti_hdmi.c
1030
result = clk_round_rate(hdmi->clk_pix, target);
drivers/gpu/drm/sti/sti_hdmi.c
1055
struct sti_hdmi *hdmi = hdmi_connector->hdmi;
drivers/gpu/drm/sti/sti_hdmi.c
1059
if (hdmi->hpd) {
drivers/gpu/drm/sti/sti_hdmi.c
1065
cec_notifier_set_phys_addr(hdmi->notifier, CEC_PHYS_ADDR_INVALID);
drivers/gpu/drm/sti/sti_hdmi.c
1074
struct sti_hdmi *hdmi = hdmi_connector->hdmi;
drivers/gpu/drm/sti/sti_hdmi.c
1078
hdmi->colorspace = DEFAULT_COLORSPACE_MODE;
drivers/gpu/drm/sti/sti_hdmi.c
1087
drm_object_attach_property(&connector->base, prop, hdmi->colorspace);
drivers/gpu/drm/sti/sti_hdmi.c
1098
struct sti_hdmi *hdmi = hdmi_connector->hdmi;
drivers/gpu/drm/sti/sti_hdmi.c
1101
hdmi->colorspace = val;
drivers/gpu/drm/sti/sti_hdmi.c
1117
struct sti_hdmi *hdmi = hdmi_connector->hdmi;
drivers/gpu/drm/sti/sti_hdmi.c
1120
*val = hdmi->colorspace;
drivers/gpu/drm/sti/sti_hdmi.c
1132
struct sti_hdmi *hdmi = hdmi_connector->hdmi;
drivers/gpu/drm/sti/sti_hdmi.c
1134
hdmi_debugfs_init(hdmi, hdmi->drm_dev->primary);
drivers/gpu/drm/sti/sti_hdmi.c
1165
struct sti_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/sti/sti_hdmi.c
1173
hdmi_write(hdmi, audio_cfg, HDMI_AUDIO_CFG);
drivers/gpu/drm/sti/sti_hdmi.c
1175
hdmi->audio.enabled = false;
drivers/gpu/drm/sti/sti_hdmi.c
1176
hdmi_audio_infoframe_config(hdmi);
drivers/gpu/drm/sti/sti_hdmi.c
1184
struct sti_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/sti/sti_hdmi.c
1199
hdmi->audio.sample_width = params->sample_width;
drivers/gpu/drm/sti/sti_hdmi.c
1200
hdmi->audio.sample_rate = params->sample_rate;
drivers/gpu/drm/sti/sti_hdmi.c
1201
hdmi->audio.cea = params->cea;
drivers/gpu/drm/sti/sti_hdmi.c
1203
hdmi->audio.enabled = true;
drivers/gpu/drm/sti/sti_hdmi.c
1205
ret = hdmi_audio_configure(hdmi);
drivers/gpu/drm/sti/sti_hdmi.c
1215
struct sti_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/sti/sti_hdmi.c
1220
hdmi_write(hdmi, HDMI_SAMPLE_FLAT_ALL, HDMI_SAMPLE_FLAT_MASK);
drivers/gpu/drm/sti/sti_hdmi.c
1222
hdmi_write(hdmi, HDMI_SAMPLE_FLAT_NO, HDMI_SAMPLE_FLAT_MASK);
drivers/gpu/drm/sti/sti_hdmi.c
1229
struct sti_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/sti/sti_hdmi.c
1230
struct drm_connector *connector = hdmi->drm_connector;
drivers/gpu/drm/sti/sti_hdmi.c
1248
struct sti_hdmi *hdmi)
drivers/gpu/drm/sti/sti_hdmi.c
1259
hdmi->audio.enabled = false;
drivers/gpu/drm/sti/sti_hdmi.c
1261
hdmi->audio_pdev = platform_device_register_data(
drivers/gpu/drm/sti/sti_hdmi.c
1265
if (IS_ERR(hdmi->audio_pdev))
drivers/gpu/drm/sti/sti_hdmi.c
1266
return PTR_ERR(hdmi->audio_pdev);
drivers/gpu/drm/sti/sti_hdmi.c
1275
struct sti_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/sti/sti_hdmi.c
1284
hdmi->drm_dev = drm_dev;
drivers/gpu/drm/sti/sti_hdmi.c
1294
connector->hdmi = hdmi;
drivers/gpu/drm/sti/sti_hdmi.c
1296
drm_bridge_attach(encoder, &hdmi->bridge, NULL, 0);
drivers/gpu/drm/sti/sti_hdmi.c
1307
hdmi->ddc_adapt);
drivers/gpu/drm/sti/sti_hdmi.c
1314
hdmi->drm_connector = drm_connector;
drivers/gpu/drm/sti/sti_hdmi.c
1322
err = sti_hdmi_register_audio_driver(dev, hdmi);
drivers/gpu/drm/sti/sti_hdmi.c
1329
err = hdmi_audio_infoframe_init(&hdmi->audio.cea);
drivers/gpu/drm/sti/sti_hdmi.c
1336
hdmi->notifier = cec_notifier_conn_register(&hdmi->dev, NULL,
drivers/gpu/drm/sti/sti_hdmi.c
1338
if (!hdmi->notifier) {
drivers/gpu/drm/sti/sti_hdmi.c
1339
hdmi->drm_connector = NULL;
drivers/gpu/drm/sti/sti_hdmi.c
1344
hdmi_write(hdmi, HDMI_DEFAULT_INT, HDMI_INT_EN);
drivers/gpu/drm/sti/sti_hdmi.c
1349
hdmi->drm_connector = NULL;
drivers/gpu/drm/sti/sti_hdmi.c
1356
struct sti_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/sti/sti_hdmi.c
1358
cec_notifier_conn_unregister(hdmi->notifier);
drivers/gpu/drm/sti/sti_hdmi.c
1379
struct sti_hdmi *hdmi;
drivers/gpu/drm/sti/sti_hdmi.c
1386
hdmi = devm_drm_bridge_alloc(dev, struct sti_hdmi, bridge, &sti_hdmi_bridge_funcs);
drivers/gpu/drm/sti/sti_hdmi.c
1387
if (IS_ERR(hdmi))
drivers/gpu/drm/sti/sti_hdmi.c
1388
return PTR_ERR(hdmi);
drivers/gpu/drm/sti/sti_hdmi.c
1392
hdmi->ddc_adapt = of_get_i2c_adapter_by_node(ddc);
drivers/gpu/drm/sti/sti_hdmi.c
1394
if (!hdmi->ddc_adapt)
drivers/gpu/drm/sti/sti_hdmi.c
1398
hdmi->dev = pdev->dev;
drivers/gpu/drm/sti/sti_hdmi.c
1399
hdmi->regs = devm_platform_ioremap_resource_byname(pdev, "hdmi-reg");
drivers/gpu/drm/sti/sti_hdmi.c
1400
if (IS_ERR(hdmi->regs)) {
drivers/gpu/drm/sti/sti_hdmi.c
1401
ret = PTR_ERR(hdmi->regs);
drivers/gpu/drm/sti/sti_hdmi.c
1405
hdmi->phy_ops = (struct hdmi_phy_ops *)
drivers/gpu/drm/sti/sti_hdmi.c
1409
hdmi->clk_pix = devm_clk_get(dev, "pix");
drivers/gpu/drm/sti/sti_hdmi.c
1410
if (IS_ERR(hdmi->clk_pix)) {
drivers/gpu/drm/sti/sti_hdmi.c
1412
ret = PTR_ERR(hdmi->clk_pix);
drivers/gpu/drm/sti/sti_hdmi.c
1416
hdmi->clk_tmds = devm_clk_get(dev, "tmds");
drivers/gpu/drm/sti/sti_hdmi.c
1417
if (IS_ERR(hdmi->clk_tmds)) {
drivers/gpu/drm/sti/sti_hdmi.c
1419
ret = PTR_ERR(hdmi->clk_tmds);
drivers/gpu/drm/sti/sti_hdmi.c
1423
hdmi->clk_phy = devm_clk_get(dev, "phy");
drivers/gpu/drm/sti/sti_hdmi.c
1424
if (IS_ERR(hdmi->clk_phy)) {
drivers/gpu/drm/sti/sti_hdmi.c
1426
ret = PTR_ERR(hdmi->clk_phy);
drivers/gpu/drm/sti/sti_hdmi.c
1430
hdmi->clk_audio = devm_clk_get(dev, "audio");
drivers/gpu/drm/sti/sti_hdmi.c
1431
if (IS_ERR(hdmi->clk_audio)) {
drivers/gpu/drm/sti/sti_hdmi.c
1433
ret = PTR_ERR(hdmi->clk_audio);
drivers/gpu/drm/sti/sti_hdmi.c
1437
hdmi->hpd = readl(hdmi->regs + HDMI_STA) & HDMI_STA_HOT_PLUG;
drivers/gpu/drm/sti/sti_hdmi.c
1439
init_waitqueue_head(&hdmi->wait_event);
drivers/gpu/drm/sti/sti_hdmi.c
1441
hdmi->irq = platform_get_irq_byname(pdev, "irq");
drivers/gpu/drm/sti/sti_hdmi.c
1442
if (hdmi->irq < 0) {
drivers/gpu/drm/sti/sti_hdmi.c
1444
ret = hdmi->irq;
drivers/gpu/drm/sti/sti_hdmi.c
1448
ret = devm_request_threaded_irq(dev, hdmi->irq, hdmi_irq,
drivers/gpu/drm/sti/sti_hdmi.c
1449
hdmi_irq_thread, IRQF_ONESHOT, dev_name(dev), hdmi);
drivers/gpu/drm/sti/sti_hdmi.c
1455
hdmi->reset = devm_reset_control_get(dev, "hdmi");
drivers/gpu/drm/sti/sti_hdmi.c
1457
if (!IS_ERR(hdmi->reset))
drivers/gpu/drm/sti/sti_hdmi.c
1458
reset_control_deassert(hdmi->reset);
drivers/gpu/drm/sti/sti_hdmi.c
1460
platform_set_drvdata(pdev, hdmi);
drivers/gpu/drm/sti/sti_hdmi.c
1462
drm_bridge_add(&hdmi->bridge);
drivers/gpu/drm/sti/sti_hdmi.c
1466
i2c_put_adapter(hdmi->ddc_adapt);
drivers/gpu/drm/sti/sti_hdmi.c
1473
struct sti_hdmi *hdmi = dev_get_drvdata(&pdev->dev);
drivers/gpu/drm/sti/sti_hdmi.c
1475
i2c_put_adapter(hdmi->ddc_adapt);
drivers/gpu/drm/sti/sti_hdmi.c
1476
if (hdmi->audio_pdev)
drivers/gpu/drm/sti/sti_hdmi.c
1477
platform_device_unregister(hdmi->audio_pdev);
drivers/gpu/drm/sti/sti_hdmi.c
1479
drm_bridge_remove(&hdmi->bridge);
drivers/gpu/drm/sti/sti_hdmi.c
164
struct sti_hdmi *hdmi;
drivers/gpu/drm/sti/sti_hdmi.c
182
u32 hdmi_read(struct sti_hdmi *hdmi, int offset)
drivers/gpu/drm/sti/sti_hdmi.c
184
return readl(hdmi->regs + offset);
drivers/gpu/drm/sti/sti_hdmi.c
187
void hdmi_write(struct sti_hdmi *hdmi, u32 val, int offset)
drivers/gpu/drm/sti/sti_hdmi.c
189
writel(val, hdmi->regs + offset);
drivers/gpu/drm/sti/sti_hdmi.c
200
struct sti_hdmi *hdmi = arg;
drivers/gpu/drm/sti/sti_hdmi.c
203
if (hdmi->irq_status & HDMI_INT_HOT_PLUG) {
drivers/gpu/drm/sti/sti_hdmi.c
204
hdmi->hpd = readl(hdmi->regs + HDMI_STA) & HDMI_STA_HOT_PLUG;
drivers/gpu/drm/sti/sti_hdmi.c
205
if (hdmi->drm_dev)
drivers/gpu/drm/sti/sti_hdmi.c
206
drm_helper_hpd_irq_event(hdmi->drm_dev);
drivers/gpu/drm/sti/sti_hdmi.c
212
if (hdmi->irq_status & (HDMI_INT_SW_RST | HDMI_INT_DLL_LCK)) {
drivers/gpu/drm/sti/sti_hdmi.c
213
hdmi->event_received = true;
drivers/gpu/drm/sti/sti_hdmi.c
214
wake_up_interruptible(&hdmi->wait_event);
drivers/gpu/drm/sti/sti_hdmi.c
218
if (hdmi->irq_status & HDMI_INT_AUDIO_FIFO_XRUN)
drivers/gpu/drm/sti/sti_hdmi.c
232
struct sti_hdmi *hdmi = arg;
drivers/gpu/drm/sti/sti_hdmi.c
235
hdmi->irq_status = hdmi_read(hdmi, HDMI_INT_STA);
drivers/gpu/drm/sti/sti_hdmi.c
238
hdmi_write(hdmi, hdmi->irq_status, HDMI_INT_CLR);
drivers/gpu/drm/sti/sti_hdmi.c
241
hdmi_read(hdmi, HDMI_INT_STA);
drivers/gpu/drm/sti/sti_hdmi.c
251
static void hdmi_active_area(struct sti_hdmi *hdmi)
drivers/gpu/drm/sti/sti_hdmi.c
256
xmin = sti_vtg_get_pixel_number(hdmi->mode, 1);
drivers/gpu/drm/sti/sti_hdmi.c
257
xmax = sti_vtg_get_pixel_number(hdmi->mode, hdmi->mode.hdisplay);
drivers/gpu/drm/sti/sti_hdmi.c
258
ymin = sti_vtg_get_line_number(hdmi->mode, 0);
drivers/gpu/drm/sti/sti_hdmi.c
259
ymax = sti_vtg_get_line_number(hdmi->mode, hdmi->mode.vdisplay - 1);
drivers/gpu/drm/sti/sti_hdmi.c
261
hdmi_write(hdmi, xmin, HDMI_ACTIVE_VID_XMIN);
drivers/gpu/drm/sti/sti_hdmi.c
262
hdmi_write(hdmi, xmax, HDMI_ACTIVE_VID_XMAX);
drivers/gpu/drm/sti/sti_hdmi.c
263
hdmi_write(hdmi, ymin, HDMI_ACTIVE_VID_YMIN);
drivers/gpu/drm/sti/sti_hdmi.c
264
hdmi_write(hdmi, ymax, HDMI_ACTIVE_VID_YMAX);
drivers/gpu/drm/sti/sti_hdmi.c
272
static void hdmi_config(struct sti_hdmi *hdmi)
drivers/gpu/drm/sti/sti_hdmi.c
274
struct drm_connector *connector = hdmi->drm_connector;
drivers/gpu/drm/sti/sti_hdmi.c
288
if (hdmi->mode.flags & DRM_MODE_FLAG_NHSYNC) {
drivers/gpu/drm/sti/sti_hdmi.c
294
if (hdmi->mode.flags & DRM_MODE_FLAG_NVSYNC) {
drivers/gpu/drm/sti/sti_hdmi.c
302
hdmi_write(hdmi, conf, HDMI_CFG);
drivers/gpu/drm/sti/sti_hdmi.c
311
static void hdmi_infoframe_reset(struct sti_hdmi *hdmi,
drivers/gpu/drm/sti/sti_hdmi.c
336
val = hdmi_read(hdmi, HDMI_SW_DI_CFG);
drivers/gpu/drm/sti/sti_hdmi.c
338
hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
drivers/gpu/drm/sti/sti_hdmi.c
341
hdmi_write(hdmi, 0x0, head_offset);
drivers/gpu/drm/sti/sti_hdmi.c
343
hdmi_write(hdmi, 0x0, pack_offset + i);
drivers/gpu/drm/sti/sti_hdmi.c
370
static void hdmi_infoframe_write_infopack(struct sti_hdmi *hdmi,
drivers/gpu/drm/sti/sti_hdmi.c
403
val = hdmi_read(hdmi, HDMI_SW_DI_CFG);
drivers/gpu/drm/sti/sti_hdmi.c
405
hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
drivers/gpu/drm/sti/sti_hdmi.c
410
writel(val, hdmi->regs + head_offset);
drivers/gpu/drm/sti/sti_hdmi.c
424
writel(val, hdmi->regs + pack_offset + i);
drivers/gpu/drm/sti/sti_hdmi.c
428
val = hdmi_read(hdmi, HDMI_SW_DI_CFG);
drivers/gpu/drm/sti/sti_hdmi.c
430
hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
drivers/gpu/drm/sti/sti_hdmi.c
444
static int hdmi_avi_infoframe_config(struct sti_hdmi *hdmi)
drivers/gpu/drm/sti/sti_hdmi.c
446
struct drm_display_mode *mode = &hdmi->mode;
drivers/gpu/drm/sti/sti_hdmi.c
454
hdmi->drm_connector, mode);
drivers/gpu/drm/sti/sti_hdmi.c
461
infoframe.colorspace = hdmi->colorspace;
drivers/gpu/drm/sti/sti_hdmi.c
471
hdmi_infoframe_write_infopack(hdmi, buffer, ret);
drivers/gpu/drm/sti/sti_hdmi.c
487
static int hdmi_audio_infoframe_config(struct sti_hdmi *hdmi)
drivers/gpu/drm/sti/sti_hdmi.c
489
struct hdmi_audio_params *audio = &hdmi->audio;
drivers/gpu/drm/sti/sti_hdmi.c
503
hdmi_infoframe_write_infopack(hdmi, buffer, ret);
drivers/gpu/drm/sti/sti_hdmi.c
506
val = hdmi_read(hdmi, HDMI_SW_DI_CFG);
drivers/gpu/drm/sti/sti_hdmi.c
509
hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
drivers/gpu/drm/sti/sti_hdmi.c
526
static int hdmi_vendor_infoframe_config(struct sti_hdmi *hdmi)
drivers/gpu/drm/sti/sti_hdmi.c
528
struct drm_display_mode *mode = &hdmi->mode;
drivers/gpu/drm/sti/sti_hdmi.c
536
hdmi->drm_connector,
drivers/gpu/drm/sti/sti_hdmi.c
554
hdmi_infoframe_write_infopack(hdmi, buffer, ret);
drivers/gpu/drm/sti/sti_hdmi.c
567
static void hdmi_swreset(struct sti_hdmi *hdmi)
drivers/gpu/drm/sti/sti_hdmi.c
574
if (clk_prepare_enable(hdmi->clk_audio))
drivers/gpu/drm/sti/sti_hdmi.c
578
hdmi->event_received = false;
drivers/gpu/drm/sti/sti_hdmi.c
580
val = hdmi_read(hdmi, HDMI_CFG);
drivers/gpu/drm/sti/sti_hdmi.c
582
hdmi_write(hdmi, val, HDMI_CFG);
drivers/gpu/drm/sti/sti_hdmi.c
585
wait_event_interruptible_timeout(hdmi->wait_event,
drivers/gpu/drm/sti/sti_hdmi.c
586
hdmi->event_received,
drivers/gpu/drm/sti/sti_hdmi.c
594
if ((hdmi_read(hdmi, HDMI_STA) & HDMI_STA_SW_RST) == 0)
drivers/gpu/drm/sti/sti_hdmi.c
597
val = hdmi_read(hdmi, HDMI_CFG);
drivers/gpu/drm/sti/sti_hdmi.c
599
hdmi_write(hdmi, val, HDMI_CFG);
drivers/gpu/drm/sti/sti_hdmi.c
602
clk_disable_unprepare(hdmi->clk_audio);
drivers/gpu/drm/sti/sti_hdmi.c
608
hdmi_read(hdmi, reg))
drivers/gpu/drm/sti/sti_hdmi.c
678
struct sti_hdmi *hdmi = (struct sti_hdmi *)node->info_ent->data;
drivers/gpu/drm/sti/sti_hdmi.c
680
seq_printf(s, "HDMI: (vaddr = 0x%p)", hdmi->regs);
drivers/gpu/drm/sti/sti_hdmi.c
682
hdmi_dbg_cfg(s, hdmi_read(hdmi, HDMI_CFG));
drivers/gpu/drm/sti/sti_hdmi.c
685
hdmi_dbg_sta(s, hdmi_read(hdmi, HDMI_STA));
drivers/gpu/drm/sti/sti_hdmi.c
688
DBGFS_PRINT_INT("Xmin:", hdmi_read(hdmi, HDMI_ACTIVE_VID_XMIN));
drivers/gpu/drm/sti/sti_hdmi.c
691
DBGFS_PRINT_INT("Xmax:", hdmi_read(hdmi, HDMI_ACTIVE_VID_XMAX));
drivers/gpu/drm/sti/sti_hdmi.c
694
DBGFS_PRINT_INT("Ymin:", hdmi_read(hdmi, HDMI_ACTIVE_VID_YMIN));
drivers/gpu/drm/sti/sti_hdmi.c
697
DBGFS_PRINT_INT("Ymax:", hdmi_read(hdmi, HDMI_ACTIVE_VID_YMAX));
drivers/gpu/drm/sti/sti_hdmi.c
699
hdmi_dbg_sw_di_cfg(s, hdmi_read(hdmi, HDMI_SW_DI_CFG));
drivers/gpu/drm/sti/sti_hdmi.c
743
static void hdmi_debugfs_init(struct sti_hdmi *hdmi, struct drm_minor *minor)
drivers/gpu/drm/sti/sti_hdmi.c
748
hdmi_debugfs_files[i].data = hdmi;
drivers/gpu/drm/sti/sti_hdmi.c
757
struct sti_hdmi *hdmi = drm_bridge_to_sti_hdmi(bridge);
drivers/gpu/drm/sti/sti_hdmi.c
759
u32 val = hdmi_read(hdmi, HDMI_CFG);
drivers/gpu/drm/sti/sti_hdmi.c
761
if (!hdmi->enabled)
drivers/gpu/drm/sti/sti_hdmi.c
768
hdmi_write(hdmi, val, HDMI_CFG);
drivers/gpu/drm/sti/sti_hdmi.c
770
hdmi_write(hdmi, 0xffffffff, HDMI_INT_CLR);
drivers/gpu/drm/sti/sti_hdmi.c
773
hdmi->phy_ops->stop(hdmi);
drivers/gpu/drm/sti/sti_hdmi.c
776
hdmi_infoframe_reset(hdmi, HDMI_IFRAME_SLOT_AVI);
drivers/gpu/drm/sti/sti_hdmi.c
777
hdmi_infoframe_reset(hdmi, HDMI_IFRAME_SLOT_AUDIO);
drivers/gpu/drm/sti/sti_hdmi.c
778
hdmi_infoframe_reset(hdmi, HDMI_IFRAME_SLOT_VENDOR);
drivers/gpu/drm/sti/sti_hdmi.c
781
hdmi_write(hdmi, 0x0000, HDMI_DFLT_CHL0_DAT);
drivers/gpu/drm/sti/sti_hdmi.c
782
hdmi_write(hdmi, 0x0000, HDMI_DFLT_CHL1_DAT);
drivers/gpu/drm/sti/sti_hdmi.c
783
hdmi_write(hdmi, 0x0060, HDMI_DFLT_CHL2_DAT);
drivers/gpu/drm/sti/sti_hdmi.c
786
clk_disable_unprepare(hdmi->clk_phy);
drivers/gpu/drm/sti/sti_hdmi.c
787
clk_disable_unprepare(hdmi->clk_tmds);
drivers/gpu/drm/sti/sti_hdmi.c
788
clk_disable_unprepare(hdmi->clk_pix);
drivers/gpu/drm/sti/sti_hdmi.c
790
hdmi->enabled = false;
drivers/gpu/drm/sti/sti_hdmi.c
792
cec_notifier_set_phys_addr(hdmi->notifier, CEC_PHYS_ADDR_INVALID);
drivers/gpu/drm/sti/sti_hdmi.c
841
static int hdmi_audio_configure(struct sti_hdmi *hdmi)
drivers/gpu/drm/sti/sti_hdmi.c
844
struct hdmi_audio_params *params = &hdmi->audio;
drivers/gpu/drm/sti/sti_hdmi.c
849
if (!hdmi->enabled)
drivers/gpu/drm/sti/sti_hdmi.c
856
params->sample_rate, hdmi->mode.clock * 1000, n);
drivers/gpu/drm/sti/sti_hdmi.c
857
hdmi_write(hdmi, n, HDMI_AUDN);
drivers/gpu/drm/sti/sti_hdmi.c
882
hdmi_write(hdmi, audio_cfg, HDMI_AUDIO_CFG);
drivers/gpu/drm/sti/sti_hdmi.c
884
return hdmi_audio_infoframe_config(hdmi);
drivers/gpu/drm/sti/sti_hdmi.c
889
struct sti_hdmi *hdmi = drm_bridge_to_sti_hdmi(bridge);
drivers/gpu/drm/sti/sti_hdmi.c
893
if (hdmi->enabled)
drivers/gpu/drm/sti/sti_hdmi.c
897
if (clk_prepare_enable(hdmi->clk_pix))
drivers/gpu/drm/sti/sti_hdmi.c
899
if (clk_prepare_enable(hdmi->clk_tmds))
drivers/gpu/drm/sti/sti_hdmi.c
901
if (clk_prepare_enable(hdmi->clk_phy))
drivers/gpu/drm/sti/sti_hdmi.c
904
hdmi->enabled = true;
drivers/gpu/drm/sti/sti_hdmi.c
907
if (!hdmi->phy_ops->start(hdmi)) {
drivers/gpu/drm/sti/sti_hdmi.c
913
hdmi_active_area(hdmi);
drivers/gpu/drm/sti/sti_hdmi.c
916
hdmi_write(hdmi, HDMI_WORKING_INT, HDMI_INT_EN);
drivers/gpu/drm/sti/sti_hdmi.c
919
hdmi_config(hdmi);
drivers/gpu/drm/sti/sti_hdmi.c
922
if (hdmi_avi_infoframe_config(hdmi))
drivers/gpu/drm/sti/sti_hdmi.c
925
if (hdmi->audio.enabled) {
drivers/gpu/drm/sti/sti_hdmi.c
926
if (hdmi_audio_configure(hdmi))
drivers/gpu/drm/sti/sti_hdmi.c
929
hdmi_audio_infoframe_config(hdmi);
drivers/gpu/drm/sti/sti_hdmi.c
933
if (hdmi_vendor_infoframe_config(hdmi))
drivers/gpu/drm/sti/sti_hdmi.c
937
hdmi_swreset(hdmi);
drivers/gpu/drm/sti/sti_hdmi.c
944
struct sti_hdmi *hdmi = drm_bridge_to_sti_hdmi(bridge);
drivers/gpu/drm/sti/sti_hdmi.c
950
drm_mode_copy(&hdmi->mode, mode);
drivers/gpu/drm/sti/sti_hdmi.c
953
ret = clk_set_rate(hdmi->clk_pix, mode->clock * 1000);
drivers/gpu/drm/sti/sti_hdmi.c
959
ret = clk_set_rate(hdmi->clk_phy, mode->clock * 1000);
drivers/gpu/drm/sti/sti_hdmi.c
985
struct sti_hdmi *hdmi = hdmi_connector->hdmi;
drivers/gpu/drm/sti/sti_hdmi.c
995
cec_notifier_set_phys_addr(hdmi->notifier,
drivers/gpu/drm/sti/sti_hdmi.h
26
bool (*start)(struct sti_hdmi *hdmi);
drivers/gpu/drm/sti/sti_hdmi.h
27
void (*stop)(struct sti_hdmi *hdmi);
drivers/gpu/drm/sti/sti_hdmi.h
93
u32 hdmi_read(struct sti_hdmi *hdmi, int offset);
drivers/gpu/drm/sti/sti_hdmi.h
94
void hdmi_write(struct sti_hdmi *hdmi, u32 val, int offset);
drivers/gpu/drm/sti/sti_hdmi_tx3g4c28phy.c
118
hdmi->event_received = false;
drivers/gpu/drm/sti/sti_hdmi_tx3g4c28phy.c
120
hdmi_write(hdmi, (pllctrl | PLL_CFG_EN), HDMI_SRZ_PLL_CFG);
drivers/gpu/drm/sti/sti_hdmi_tx3g4c28phy.c
123
wait_event_interruptible_timeout(hdmi->wait_event,
drivers/gpu/drm/sti/sti_hdmi_tx3g4c28phy.c
124
hdmi->event_received == true,
drivers/gpu/drm/sti/sti_hdmi_tx3g4c28phy.c
128
if ((hdmi_read(hdmi, HDMI_STA) & HDMI_STA_DLL_LCK) == 0) {
drivers/gpu/drm/sti/sti_hdmi_tx3g4c28phy.c
153
hdmi_write(hdmi, val, HDMI_SRZ_CFG);
drivers/gpu/drm/sti/sti_hdmi_tx3g4c28phy.c
156
hdmi_write(hdmi, val, HDMI_SRZ_ICNTL);
drivers/gpu/drm/sti/sti_hdmi_tx3g4c28phy.c
159
hdmi_write(hdmi, val, HDMI_SRZ_CALCODE_EXT);
drivers/gpu/drm/sti/sti_hdmi_tx3g4c28phy.c
173
hdmi_write(hdmi, val, HDMI_SRZ_CFG);
drivers/gpu/drm/sti/sti_hdmi_tx3g4c28phy.c
174
hdmi_write(hdmi, 0x0, HDMI_SRZ_ICNTL);
drivers/gpu/drm/sti/sti_hdmi_tx3g4c28phy.c
175
hdmi_write(hdmi, 0x0, HDMI_SRZ_CALCODE_EXT);
drivers/gpu/drm/sti/sti_hdmi_tx3g4c28phy.c
188
static void sti_hdmi_tx3g4c28phy_stop(struct sti_hdmi *hdmi)
drivers/gpu/drm/sti/sti_hdmi_tx3g4c28phy.c
194
hdmi->event_received = false;
drivers/gpu/drm/sti/sti_hdmi_tx3g4c28phy.c
199
hdmi_write(hdmi, val, HDMI_SRZ_CFG);
drivers/gpu/drm/sti/sti_hdmi_tx3g4c28phy.c
200
hdmi_write(hdmi, 0, HDMI_SRZ_PLL_CFG);
drivers/gpu/drm/sti/sti_hdmi_tx3g4c28phy.c
203
wait_event_interruptible_timeout(hdmi->wait_event,
drivers/gpu/drm/sti/sti_hdmi_tx3g4c28phy.c
204
hdmi->event_received == true,
drivers/gpu/drm/sti/sti_hdmi_tx3g4c28phy.c
208
if (hdmi_read(hdmi, HDMI_STA) & HDMI_STA_DLL_LCK)
drivers/gpu/drm/sti/sti_hdmi_tx3g4c28phy.c
78
static bool sti_hdmi_tx3g4c28phy_start(struct sti_hdmi *hdmi)
drivers/gpu/drm/sti/sti_hdmi_tx3g4c28phy.c
80
u32 ckpxpll = hdmi->mode.clock * 1000;
drivers/gpu/drm/sti/sti_tvout.c
117
struct drm_encoder *hdmi;
drivers/gpu/drm/sti/sti_tvout.c
506
crtc = tvout->hdmi->crtc;
drivers/gpu/drm/sti/sti_tvout.c
784
tvout->hdmi = sti_tvout_create_hdmi_encoder(dev, tvout);
drivers/gpu/drm/sti/sti_tvout.c
788
tvout->hdmi->possible_clones = drm_encoder_mask(tvout->hdmi) |
drivers/gpu/drm/sti/sti_tvout.c
790
tvout->hda->possible_clones = drm_encoder_mask(tvout->hdmi) |
drivers/gpu/drm/sti/sti_tvout.c
792
tvout->dvo->possible_clones = drm_encoder_mask(tvout->hdmi) |
drivers/gpu/drm/sti/sti_tvout.c
798
if (tvout->hdmi)
drivers/gpu/drm/sti/sti_tvout.c
799
drm_encoder_cleanup(tvout->hdmi);
drivers/gpu/drm/sti/sti_tvout.c
800
tvout->hdmi = NULL;
drivers/gpu/drm/sun4i/sun4i_hdmi.h
293
int sun4i_ddc_create(struct sun4i_hdmi *hdmi, struct clk *clk);
drivers/gpu/drm/sun4i/sun4i_hdmi.h
294
int sun4i_tmds_create(struct sun4i_hdmi *hdmi);
drivers/gpu/drm/sun4i/sun4i_hdmi.h
295
int sun4i_hdmi_i2c_create(struct device *dev, struct sun4i_hdmi *hdmi);
drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c
110
int sun4i_ddc_create(struct sun4i_hdmi *hdmi, struct clk *parent)
drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c
120
ddc = devm_kzalloc(hdmi->dev, sizeof(*ddc), GFP_KERNEL);
drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c
124
ddc->reg = devm_regmap_field_alloc(hdmi->dev, hdmi->regmap,
drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c
125
hdmi->variant->ddc_clk_reg);
drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c
134
ddc->hdmi = hdmi;
drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c
136
ddc->pre_div = hdmi->variant->ddc_clk_pre_divider;
drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c
137
ddc->m_offset = hdmi->variant->ddc_clk_m_offset;
drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c
139
hdmi->ddc_clk = devm_clk_register(hdmi->dev, &ddc->hw);
drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c
140
if (IS_ERR(hdmi->ddc_clk))
drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c
141
return PTR_ERR(hdmi->ddc_clk);
drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c
16
struct sun4i_hdmi *hdmi;
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
102
unsigned long long tmds_rate = conn_state->hdmi.tmds_char_rate;
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
108
clk_set_rate(hdmi->mod_clk, tmds_rate);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
109
clk_set_rate(hdmi->tmds_clk, tmds_rate);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
113
hdmi->base + SUN4I_HDMI_UNKNOWN_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
125
val = readl(hdmi->base + SUN4I_HDMI_PAD_CTRL1_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
127
val |= hdmi->variant->pad_ctrl1_init_val;
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
128
writel(val, hdmi->base + SUN4I_HDMI_PAD_CTRL1_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
129
val = readl(hdmi->base + SUN4I_HDMI_PAD_CTRL1_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
134
hdmi->base + SUN4I_HDMI_VID_TIMING_ACT_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
139
hdmi->base + SUN4I_HDMI_VID_TIMING_BP_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
144
hdmi->base + SUN4I_HDMI_VID_TIMING_FP_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
149
hdmi->base + SUN4I_HDMI_VID_TIMING_SPW_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
158
writel(val, hdmi->base + SUN4I_HDMI_VID_TIMING_POL_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
160
clk_prepare_enable(hdmi->tmds_clk);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
166
writel(val, hdmi->base + SUN4I_HDMI_PKT_CTRL_REG(0));
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
172
writel(val, hdmi->base + SUN4I_HDMI_VID_CTRL_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
185
const struct sun4i_hdmi *hdmi = drm_connector_to_sun4i_hdmi(connector);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
196
rounded_rate = clk_round_rate(hdmi->tmds_clk, clock);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
207
struct sun4i_hdmi *hdmi = drm_connector_to_sun4i_hdmi(connector);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
211
drm_edid = drm_edid_read_ddc(connector, hdmi->ddc_i2c ?: hdmi->i2c);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
214
cec_s_phys_addr(hdmi->cec_adap,
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
258
.hdmi = {
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
273
struct sun4i_hdmi *hdmi = drm_connector_to_sun4i_hdmi(connector);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
276
reg = readl(hdmi->base + SUN4I_HDMI_HPD_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
278
cec_phys_addr_invalidate(hdmi->cec_adap);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
302
struct sun4i_hdmi *hdmi = cec_get_drvdata(adap);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
304
return readl(hdmi->base + SUN4I_HDMI_CEC) & SUN4I_HDMI_CEC_RX;
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
309
struct sun4i_hdmi *hdmi = cec_get_drvdata(adap);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
312
writel(SUN4I_HDMI_CEC_ENABLE, hdmi->base + SUN4I_HDMI_CEC);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
317
struct sun4i_hdmi *hdmi = cec_get_drvdata(adap);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
323
writel(0, hdmi->base + SUN4I_HDMI_CEC);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
510
struct sun4i_hdmi *hdmi;
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
514
hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
515
if (!hdmi)
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
517
dev_set_drvdata(dev, hdmi);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
518
hdmi->dev = dev;
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
519
hdmi->drv = drv;
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
521
hdmi->variant = of_device_get_match_data(dev);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
522
if (!hdmi->variant)
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
525
hdmi->base = devm_platform_ioremap_resource(pdev, 0);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
526
if (IS_ERR(hdmi->base)) {
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
528
return PTR_ERR(hdmi->base);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
53
struct sun4i_hdmi *hdmi = drm_connector_to_sun4i_hdmi(connector);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
531
if (hdmi->variant->has_reset_control) {
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
532
hdmi->reset = devm_reset_control_get(dev, NULL);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
533
if (IS_ERR(hdmi->reset)) {
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
535
return PTR_ERR(hdmi->reset);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
538
ret = reset_control_deassert(hdmi->reset);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
545
hdmi->bus_clk = devm_clk_get(dev, "ahb");
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
546
if (IS_ERR(hdmi->bus_clk)) {
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
548
ret = PTR_ERR(hdmi->bus_clk);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
551
clk_prepare_enable(hdmi->bus_clk);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
553
hdmi->mod_clk = devm_clk_get(dev, "mod");
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
554
if (IS_ERR(hdmi->mod_clk)) {
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
556
ret = PTR_ERR(hdmi->mod_clk);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
559
clk_prepare_enable(hdmi->mod_clk);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
561
hdmi->pll0_clk = devm_clk_get(dev, "pll-0");
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
562
if (IS_ERR(hdmi->pll0_clk)) {
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
564
ret = PTR_ERR(hdmi->pll0_clk);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
568
hdmi->pll1_clk = devm_clk_get(dev, "pll-1");
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
569
if (IS_ERR(hdmi->pll1_clk)) {
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
57
writeb(buffer[i], hdmi->base + SUN4I_HDMI_AVI_INFOFRAME_REG(i));
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
571
ret = PTR_ERR(hdmi->pll1_clk);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
575
hdmi->regmap = devm_regmap_init_mmio(dev, hdmi->base,
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
577
if (IS_ERR(hdmi->regmap)) {
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
579
ret = PTR_ERR(hdmi->regmap);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
583
ret = sun4i_tmds_create(hdmi);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
589
if (hdmi->variant->has_ddc_parent_clk) {
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
590
hdmi->ddc_parent_clk = devm_clk_get(dev, "ddc");
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
591
if (IS_ERR(hdmi->ddc_parent_clk)) {
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
593
ret = PTR_ERR(hdmi->ddc_parent_clk);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
597
hdmi->ddc_parent_clk = hdmi->tmds_clk;
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
600
writel(SUN4I_HDMI_CTRL_ENABLE, hdmi->base + SUN4I_HDMI_CTRL_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
602
writel(hdmi->variant->pad_ctrl0_init_val,
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
603
hdmi->base + SUN4I_HDMI_PAD_CTRL0_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
605
reg = readl(hdmi->base + SUN4I_HDMI_PLL_CTRL_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
607
reg |= hdmi->variant->pll_ctrl_init_val;
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
608
writel(reg, hdmi->base + SUN4I_HDMI_PLL_CTRL_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
610
ret = sun4i_hdmi_i2c_create(dev, hdmi);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
616
hdmi->ddc_i2c = sun4i_hdmi_get_ddc(dev);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
617
if (IS_ERR(hdmi->ddc_i2c)) {
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
618
ret = PTR_ERR(hdmi->ddc_i2c);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
620
hdmi->ddc_i2c = NULL;
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
625
drm_encoder_helper_add(&hdmi->encoder,
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
627
ret = drm_simple_encoder_init(drm, &hdmi->encoder,
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
634
hdmi->encoder.possible_crtcs = drm_of_find_possible_crtcs(drm,
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
636
if (!hdmi->encoder.possible_crtcs) {
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
642
hdmi->cec_adap = cec_pin_allocate_adapter(&sun4i_hdmi_cec_pin_ops,
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
643
hdmi, "sun4i", CEC_CAP_DEFAULTS | CEC_CAP_CONNECTOR_INFO);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
644
ret = PTR_ERR_OR_ZERO(hdmi->cec_adap);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
647
writel(readl(hdmi->base + SUN4I_HDMI_CEC) & ~SUN4I_HDMI_CEC_TX,
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
648
hdmi->base + SUN4I_HDMI_CEC);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
651
drm_connector_helper_add(&hdmi->connector,
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
653
ret = drmm_connector_hdmi_init(drm, &hdmi->connector,
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
663
hdmi->ddc_i2c,
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
671
cec_fill_conn_info_from_drm(&conn_info, &hdmi->connector);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
672
cec_s_conn_info(hdmi->cec_adap, &conn_info);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
675
hdmi->connector.polled = DRM_CONNECTOR_POLL_CONNECT |
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
678
ret = cec_register_adapter(hdmi->cec_adap, dev);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
681
drm_connector_attach_encoder(&hdmi->connector, &hdmi->encoder);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
686
cec_delete_adapter(hdmi->cec_adap);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
687
drm_encoder_cleanup(&hdmi->encoder);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
689
i2c_put_adapter(hdmi->ddc_i2c);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
691
i2c_del_adapter(hdmi->i2c);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
693
clk_disable_unprepare(hdmi->mod_clk);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
695
clk_disable_unprepare(hdmi->bus_clk);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
697
reset_control_assert(hdmi->reset);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
704
struct sun4i_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
706
cec_unregister_adapter(hdmi->cec_adap);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
707
i2c_del_adapter(hdmi->i2c);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
708
i2c_put_adapter(hdmi->ddc_i2c);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
709
clk_disable_unprepare(hdmi->mod_clk);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
710
clk_disable_unprepare(hdmi->bus_clk);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
81
struct sun4i_hdmi *hdmi = drm_encoder_to_sun4i_hdmi(encoder);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
86
val = readl(hdmi->base + SUN4I_HDMI_VID_CTRL_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
88
writel(val, hdmi->base + SUN4I_HDMI_VID_CTRL_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
90
clk_disable_unprepare(hdmi->tmds_clk);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
97
struct sun4i_hdmi *hdmi = drm_encoder_to_sun4i_hdmi(encoder);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
98
struct drm_connector *connector = &hdmi->connector;
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
100
regmap_field_write(hdmi->field_ddc_fifo_clear, 1);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
101
if (regmap_field_read_poll_timeout(hdmi->field_ddc_fifo_clear,
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
106
regmap_field_write(hdmi->field_ddc_byte_count, msg->len);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
109
regmap_field_write(hdmi->field_ddc_cmd,
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
115
regmap_field_force_write(hdmi->field_ddc_int_status,
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
121
regmap_field_write(hdmi->field_ddc_start, 1);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
125
len = fifo_transfer(hdmi, msg->buf + i, msg->len - i,
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
132
if (regmap_field_read_poll_timeout(hdmi->field_ddc_start,
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
137
regmap_field_read(hdmi->field_ddc_int_status, &reg);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
149
struct sun4i_hdmi *hdmi = i2c_get_adapdata(adap);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
161
clk_prepare_enable(hdmi->ddc_clk);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
162
clk_set_rate(hdmi->ddc_clk, 100000);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
165
regmap_field_write(hdmi->field_ddc_en, 1);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
166
regmap_field_write(hdmi->field_ddc_reset, 1);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
167
if (regmap_field_read_poll_timeout(hdmi->field_ddc_reset,
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
169
clk_disable_unprepare(hdmi->ddc_clk);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
173
regmap_field_write(hdmi->field_ddc_sck_en, 1);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
174
regmap_field_write(hdmi->field_ddc_sda_en, 1);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
177
err = xfer_msg(hdmi, &msgs[i]);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
184
clk_disable_unprepare(hdmi->ddc_clk);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
198
static int sun4i_hdmi_init_regmap_fields(struct sun4i_hdmi *hdmi)
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
200
hdmi->field_ddc_en =
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
201
devm_regmap_field_alloc(hdmi->dev, hdmi->regmap,
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
202
hdmi->variant->field_ddc_en);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
203
if (IS_ERR(hdmi->field_ddc_en))
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
204
return PTR_ERR(hdmi->field_ddc_en);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
206
hdmi->field_ddc_start =
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
207
devm_regmap_field_alloc(hdmi->dev, hdmi->regmap,
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
208
hdmi->variant->field_ddc_start);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
209
if (IS_ERR(hdmi->field_ddc_start))
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
210
return PTR_ERR(hdmi->field_ddc_start);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
212
hdmi->field_ddc_reset =
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
213
devm_regmap_field_alloc(hdmi->dev, hdmi->regmap,
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
214
hdmi->variant->field_ddc_reset);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
215
if (IS_ERR(hdmi->field_ddc_reset))
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
216
return PTR_ERR(hdmi->field_ddc_reset);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
218
hdmi->field_ddc_addr_reg =
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
219
devm_regmap_field_alloc(hdmi->dev, hdmi->regmap,
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
220
hdmi->variant->field_ddc_addr_reg);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
221
if (IS_ERR(hdmi->field_ddc_addr_reg))
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
222
return PTR_ERR(hdmi->field_ddc_addr_reg);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
224
hdmi->field_ddc_slave_addr =
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
225
devm_regmap_field_alloc(hdmi->dev, hdmi->regmap,
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
226
hdmi->variant->field_ddc_slave_addr);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
227
if (IS_ERR(hdmi->field_ddc_slave_addr))
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
228
return PTR_ERR(hdmi->field_ddc_slave_addr);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
230
hdmi->field_ddc_int_mask =
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
231
devm_regmap_field_alloc(hdmi->dev, hdmi->regmap,
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
232
hdmi->variant->field_ddc_int_mask);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
233
if (IS_ERR(hdmi->field_ddc_int_mask))
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
234
return PTR_ERR(hdmi->field_ddc_int_mask);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
236
hdmi->field_ddc_int_status =
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
237
devm_regmap_field_alloc(hdmi->dev, hdmi->regmap,
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
238
hdmi->variant->field_ddc_int_status);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
239
if (IS_ERR(hdmi->field_ddc_int_status))
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
240
return PTR_ERR(hdmi->field_ddc_int_status);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
242
hdmi->field_ddc_fifo_clear =
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
243
devm_regmap_field_alloc(hdmi->dev, hdmi->regmap,
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
244
hdmi->variant->field_ddc_fifo_clear);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
245
if (IS_ERR(hdmi->field_ddc_fifo_clear))
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
246
return PTR_ERR(hdmi->field_ddc_fifo_clear);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
248
hdmi->field_ddc_fifo_rx_thres =
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
249
devm_regmap_field_alloc(hdmi->dev, hdmi->regmap,
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
25
static int fifo_transfer(struct sun4i_hdmi *hdmi, u8 *buf, int len, bool read)
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
250
hdmi->variant->field_ddc_fifo_rx_thres);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
251
if (IS_ERR(hdmi->field_ddc_fifo_rx_thres))
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
252
return PTR_ERR(hdmi->field_ddc_fifo_rx_thres);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
254
hdmi->field_ddc_fifo_tx_thres =
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
255
devm_regmap_field_alloc(hdmi->dev, hdmi->regmap,
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
256
hdmi->variant->field_ddc_fifo_tx_thres);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
257
if (IS_ERR(hdmi->field_ddc_fifo_tx_thres))
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
258
return PTR_ERR(hdmi->field_ddc_fifo_tx_thres);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
260
hdmi->field_ddc_byte_count =
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
261
devm_regmap_field_alloc(hdmi->dev, hdmi->regmap,
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
262
hdmi->variant->field_ddc_byte_count);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
263
if (IS_ERR(hdmi->field_ddc_byte_count))
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
264
return PTR_ERR(hdmi->field_ddc_byte_count);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
266
hdmi->field_ddc_cmd =
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
267
devm_regmap_field_alloc(hdmi->dev, hdmi->regmap,
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
268
hdmi->variant->field_ddc_cmd);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
269
if (IS_ERR(hdmi->field_ddc_cmd))
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
270
return PTR_ERR(hdmi->field_ddc_cmd);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
272
hdmi->field_ddc_sda_en =
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
273
devm_regmap_field_alloc(hdmi->dev, hdmi->regmap,
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
274
hdmi->variant->field_ddc_sda_en);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
275
if (IS_ERR(hdmi->field_ddc_sda_en))
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
276
return PTR_ERR(hdmi->field_ddc_sda_en);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
278
hdmi->field_ddc_sck_en =
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
279
devm_regmap_field_alloc(hdmi->dev, hdmi->regmap,
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
280
hdmi->variant->field_ddc_sck_en);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
281
if (IS_ERR(hdmi->field_ddc_sck_en))
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
282
return PTR_ERR(hdmi->field_ddc_sck_en);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
287
int sun4i_hdmi_i2c_create(struct device *dev, struct sun4i_hdmi *hdmi)
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
292
ret = sun4i_ddc_create(hdmi, hdmi->ddc_parent_clk);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
296
ret = sun4i_hdmi_init_regmap_fields(hdmi);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
307
i2c_set_adapdata(adap, hdmi);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
313
hdmi->i2c = adap;
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
41
(hdmi->variant->ddc_fifo_thres_incl ? 0 : 1);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
50
if (regmap_field_read_poll_timeout(hdmi->field_ddc_int_status, reg,
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
59
ioread8_rep(hdmi->base + hdmi->variant->ddc_fifo_reg, buf, len);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
61
iowrite8_rep(hdmi->base + hdmi->variant->ddc_fifo_reg, buf, len);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
64
regmap_field_force_write(hdmi->field_ddc_int_status,
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
70
static int xfer_msg(struct sun4i_hdmi *hdmi, struct i2c_msg *msg)
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
76
if (hdmi->variant->ddc_fifo_has_dir) {
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
77
reg = readl(hdmi->base + SUN4I_HDMI_DDC_CTRL_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
82
writel(reg, hdmi->base + SUN4I_HDMI_DDC_CTRL_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
86
regmap_field_write(hdmi->field_ddc_addr_reg, 0);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
89
regmap_field_write(hdmi->field_ddc_slave_addr, msg->addr);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
97
regmap_field_write(hdmi->field_ddc_fifo_tx_thres,
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
98
hdmi->variant->ddc_fifo_thres_incl ? 0 : 1);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
99
regmap_field_write(hdmi->field_ddc_fifo_rx_thres, RX_THRESHOLD);
drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
131
reg = readl(tmds->hdmi->base + SUN4I_HDMI_PAD_CTRL1_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
135
reg = readl(tmds->hdmi->base + SUN4I_HDMI_PLL_CTRL_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
154
reg = readl(tmds->hdmi->base + SUN4I_HDMI_PAD_CTRL1_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
158
writel(reg, tmds->hdmi->base + SUN4I_HDMI_PAD_CTRL1_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
16
struct sun4i_hdmi *hdmi;
drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
160
reg = readl(tmds->hdmi->base + SUN4I_HDMI_PLL_CTRL_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
163
tmds->hdmi->base + SUN4I_HDMI_PLL_CTRL_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
173
reg = readl(tmds->hdmi->base + SUN4I_HDMI_PLL_DBG0_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
186
reg = readl(tmds->hdmi->base + SUN4I_HDMI_PLL_DBG0_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
189
tmds->hdmi->base + SUN4I_HDMI_PLL_DBG0_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
203
int sun4i_tmds_create(struct sun4i_hdmi *hdmi)
drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
209
parents[0] = __clk_get_name(hdmi->pll0_clk);
drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
213
parents[1] = __clk_get_name(hdmi->pll1_clk);
drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
217
tmds = devm_kzalloc(hdmi->dev, sizeof(*tmds), GFP_KERNEL);
drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
227
tmds->hdmi = hdmi;
drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
229
tmds->div_offset = hdmi->variant->tmds_clk_div_offset;
drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
231
hdmi->tmds_clk = devm_clk_register(hdmi->dev, &tmds->hw);
drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
232
if (IS_ERR(hdmi->tmds_clk))
drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
233
return PTR_ERR(hdmi->tmds_clk);
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
104
struct sun8i_dw_hdmi *hdmi;
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
110
hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL);
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
111
if (!hdmi)
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
114
plat_data = &hdmi->plat_data;
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
115
hdmi->dev = &pdev->dev;
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
116
encoder = &hdmi->encoder;
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
118
hdmi->quirks = of_device_get_match_data(dev);
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
131
hdmi->rst_ctrl = devm_reset_control_get(dev, "ctrl");
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
132
if (IS_ERR(hdmi->rst_ctrl))
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
133
return dev_err_probe(dev, PTR_ERR(hdmi->rst_ctrl),
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
136
hdmi->clk_tmds = devm_clk_get(dev, "tmds");
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
137
if (IS_ERR(hdmi->clk_tmds))
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
138
return dev_err_probe(dev, PTR_ERR(hdmi->clk_tmds),
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
141
hdmi->regulator = devm_regulator_get(dev, "hvcc");
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
142
if (IS_ERR(hdmi->regulator))
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
143
return dev_err_probe(dev, PTR_ERR(hdmi->regulator),
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
146
ret = regulator_enable(hdmi->regulator);
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
152
ret = reset_control_deassert(hdmi->rst_ctrl);
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
158
ret = clk_prepare_enable(hdmi->clk_tmds);
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
171
ret = sun8i_hdmi_phy_get(hdmi, phy_node);
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
178
ret = sun8i_hdmi_phy_init(hdmi->phy);
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
185
plat_data->mode_valid = hdmi->quirks->mode_valid;
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
186
plat_data->use_drm_infoframe = hdmi->quirks->use_drm_infoframe;
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
187
sun8i_hdmi_phy_set_ops(hdmi->phy, plat_data);
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
189
platform_set_drvdata(pdev, hdmi);
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
191
hdmi->hdmi = dw_hdmi_bind(pdev, encoder, plat_data);
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
197
if (IS_ERR(hdmi->hdmi)) {
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
198
ret = PTR_ERR(hdmi->hdmi);
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
207
clk_disable_unprepare(hdmi->clk_tmds);
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
209
reset_control_assert(hdmi->rst_ctrl);
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
211
regulator_disable(hdmi->regulator);
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
219
struct sun8i_dw_hdmi *hdmi = dev_get_drvdata(dev);
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
22
struct sun8i_dw_hdmi *hdmi = encoder_to_sun8i_dw_hdmi(encoder);
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
221
dw_hdmi_unbind(hdmi->hdmi);
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
222
sun8i_hdmi_phy_deinit(hdmi->phy);
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
223
clk_disable_unprepare(hdmi->clk_tmds);
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
224
reset_control_assert(hdmi->rst_ctrl);
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
225
regulator_disable(hdmi->regulator);
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
24
clk_set_rate(hdmi->clk_tmds, mode->crtc_clock * 1000);
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
33
sun8i_dw_hdmi_mode_valid_a83t(struct dw_hdmi *hdmi, void *data,
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
44
sun8i_dw_hdmi_mode_valid_h6(struct dw_hdmi *hdmi, void *data,
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h
174
enum drm_mode_status (*mode_valid)(struct dw_hdmi *hdmi, void *data,
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h
183
struct dw_hdmi *hdmi;
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h
200
int sun8i_hdmi_phy_get(struct sun8i_dw_hdmi *hdmi, struct device_node *node);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
142
static int sun8i_a83t_hdmi_phy_config(struct dw_hdmi *hdmi, void *data,
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
156
dw_hdmi_phy_gen2_txpwron(hdmi, 0);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
157
dw_hdmi_phy_gen2_pddq(hdmi, 1);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
159
dw_hdmi_phy_gen2_reset(hdmi);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
161
dw_hdmi_phy_gen2_pddq(hdmi, 0);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
163
dw_hdmi_phy_i2c_set_addr(hdmi, I2C_ADDR);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
171
dw_hdmi_phy_i2c_write(hdmi, 0x01e0, 0x06);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
172
dw_hdmi_phy_i2c_write(hdmi, 0x0000, 0x15);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
173
dw_hdmi_phy_i2c_write(hdmi, 0x08da, 0x10);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
174
dw_hdmi_phy_i2c_write(hdmi, 0x0007, 0x19);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
175
dw_hdmi_phy_i2c_write(hdmi, 0x0318, 0x0e);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
176
dw_hdmi_phy_i2c_write(hdmi, 0x8009, 0x09);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
178
dw_hdmi_phy_i2c_write(hdmi, 0x0540, 0x06);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
179
dw_hdmi_phy_i2c_write(hdmi, 0x0005, 0x15);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
180
dw_hdmi_phy_i2c_write(hdmi, 0x0000, 0x10);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
181
dw_hdmi_phy_i2c_write(hdmi, 0x0007, 0x19);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
182
dw_hdmi_phy_i2c_write(hdmi, 0x02b5, 0x0e);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
183
dw_hdmi_phy_i2c_write(hdmi, 0x8009, 0x09);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
185
dw_hdmi_phy_i2c_write(hdmi, 0x04a0, 0x06);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
186
dw_hdmi_phy_i2c_write(hdmi, 0x000a, 0x15);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
187
dw_hdmi_phy_i2c_write(hdmi, 0x0000, 0x10);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
188
dw_hdmi_phy_i2c_write(hdmi, 0x0002, 0x19);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
189
dw_hdmi_phy_i2c_write(hdmi, 0x0021, 0x0e);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
190
dw_hdmi_phy_i2c_write(hdmi, 0x8029, 0x09);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
192
dw_hdmi_phy_i2c_write(hdmi, 0x0000, 0x06);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
193
dw_hdmi_phy_i2c_write(hdmi, 0x000f, 0x15);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
194
dw_hdmi_phy_i2c_write(hdmi, 0x0000, 0x10);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
195
dw_hdmi_phy_i2c_write(hdmi, 0x0002, 0x19);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
196
dw_hdmi_phy_i2c_write(hdmi, 0x0000, 0x0e);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
197
dw_hdmi_phy_i2c_write(hdmi, 0x802b, 0x09);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
200
dw_hdmi_phy_i2c_write(hdmi, 0x0000, 0x1e);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
201
dw_hdmi_phy_i2c_write(hdmi, 0x0000, 0x13);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
202
dw_hdmi_phy_i2c_write(hdmi, 0x0000, 0x17);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
204
dw_hdmi_phy_gen2_txpwron(hdmi, 1);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
209
static void sun8i_a83t_hdmi_phy_disable(struct dw_hdmi *hdmi, void *data)
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
213
dw_hdmi_phy_gen2_txpwron(hdmi, 0);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
214
dw_hdmi_phy_gen2_pddq(hdmi, 1);
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
228
static int sun8i_h3_hdmi_phy_config(struct dw_hdmi *hdmi, void *data,
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
383
static void sun8i_h3_hdmi_phy_disable(struct dw_hdmi *hdmi, void *data)
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
653
int sun8i_hdmi_phy_get(struct sun8i_dw_hdmi *hdmi, struct device_node *node)
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
667
hdmi->phy = phy;
drivers/gpu/drm/tegra/hdmi.c
1069
struct tegra_hdmi *hdmi = node->info_ent->data;
drivers/gpu/drm/tegra/hdmi.c
1070
struct drm_crtc *crtc = hdmi->output.encoder.crtc;
drivers/gpu/drm/tegra/hdmi.c
1086
offset, tegra_hdmi_readl(hdmi, offset));
drivers/gpu/drm/tegra/hdmi.c
1104
struct tegra_hdmi *hdmi = to_hdmi(output);
drivers/gpu/drm/tegra/hdmi.c
1106
hdmi->debugfs_files = kmemdup(debugfs_files, sizeof(debugfs_files),
drivers/gpu/drm/tegra/hdmi.c
1108
if (!hdmi->debugfs_files)
drivers/gpu/drm/tegra/hdmi.c
1112
hdmi->debugfs_files[i].data = hdmi;
drivers/gpu/drm/tegra/hdmi.c
1114
drm_debugfs_create_files(hdmi->debugfs_files, count, root, minor);
drivers/gpu/drm/tegra/hdmi.c
1124
struct tegra_hdmi *hdmi = to_hdmi(output);
drivers/gpu/drm/tegra/hdmi.c
1126
drm_debugfs_remove_files(hdmi->debugfs_files, count,
drivers/gpu/drm/tegra/hdmi.c
1128
kfree(hdmi->debugfs_files);
drivers/gpu/drm/tegra/hdmi.c
1129
hdmi->debugfs_files = NULL;
drivers/gpu/drm/tegra/hdmi.c
1148
struct tegra_hdmi *hdmi = to_hdmi(output);
drivers/gpu/drm/tegra/hdmi.c
115
static inline u32 tegra_hdmi_readl(struct tegra_hdmi *hdmi,
drivers/gpu/drm/tegra/hdmi.c
1154
parent = clk_get_parent(hdmi->clk_parent);
drivers/gpu/drm/tegra/hdmi.c
1173
struct tegra_hdmi *hdmi = to_hdmi(output);
drivers/gpu/drm/tegra/hdmi.c
1177
tegra_hdmi_audio_lock(hdmi);
drivers/gpu/drm/tegra/hdmi.c
118
u32 value = readl(hdmi->regs + (offset << 2));
drivers/gpu/drm/tegra/hdmi.c
1191
if (!hdmi->dvi) {
drivers/gpu/drm/tegra/hdmi.c
1192
if (hdmi->stereo)
drivers/gpu/drm/tegra/hdmi.c
1193
tegra_hdmi_disable_stereo_infoframe(hdmi);
drivers/gpu/drm/tegra/hdmi.c
1195
tegra_hdmi_disable_audio_infoframe(hdmi);
drivers/gpu/drm/tegra/hdmi.c
1196
tegra_hdmi_disable_avi_infoframe(hdmi);
drivers/gpu/drm/tegra/hdmi.c
1197
tegra_hdmi_disable_audio(hdmi);
drivers/gpu/drm/tegra/hdmi.c
120
trace_hdmi_readl(hdmi->dev, offset, value);
drivers/gpu/drm/tegra/hdmi.c
1200
tegra_hdmi_writel(hdmi, 0, HDMI_NV_PDISP_INT_ENABLE);
drivers/gpu/drm/tegra/hdmi.c
1201
tegra_hdmi_writel(hdmi, 0, HDMI_NV_PDISP_INT_MASK);
drivers/gpu/drm/tegra/hdmi.c
1203
hdmi->pixel_clock = 0;
drivers/gpu/drm/tegra/hdmi.c
1205
tegra_hdmi_audio_unlock(hdmi);
drivers/gpu/drm/tegra/hdmi.c
1207
err = host1x_client_suspend(&hdmi->client);
drivers/gpu/drm/tegra/hdmi.c
1209
dev_err(hdmi->dev, "failed to suspend: %d\n", err);
drivers/gpu/drm/tegra/hdmi.c
1218
struct tegra_hdmi *hdmi = to_hdmi(output);
drivers/gpu/drm/tegra/hdmi.c
1224
err = host1x_client_resume(&hdmi->client);
drivers/gpu/drm/tegra/hdmi.c
1226
dev_err(hdmi->dev, "failed to resume: %d\n", err);
drivers/gpu/drm/tegra/hdmi.c
1230
tegra_hdmi_audio_lock(hdmi);
drivers/gpu/drm/tegra/hdmi.c
1237
tegra_hdmi_writel(hdmi, INT_CODEC_SCRATCH0, HDMI_NV_PDISP_INT_ENABLE);
drivers/gpu/drm/tegra/hdmi.c
1238
tegra_hdmi_writel(hdmi, INT_CODEC_SCRATCH0, HDMI_NV_PDISP_INT_MASK);
drivers/gpu/drm/tegra/hdmi.c
1240
hdmi->pixel_clock = mode->clock * 1000;
drivers/gpu/drm/tegra/hdmi.c
1245
err = dev_pm_opp_set_rate(hdmi->dev, hdmi->pixel_clock);
drivers/gpu/drm/tegra/hdmi.c
1247
dev_err(hdmi->dev, "failed to set HDMI clock frequency: %d\n",
drivers/gpu/drm/tegra/hdmi.c
125
static inline void tegra_hdmi_writel(struct tegra_hdmi *hdmi, u32 value,
drivers/gpu/drm/tegra/hdmi.c
1251
DRM_DEBUG_KMS("HDMI clock rate: %lu Hz\n", clk_get_rate(hdmi->clk));
drivers/gpu/drm/tegra/hdmi.c
1254
value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_SOR_PLL0);
drivers/gpu/drm/tegra/hdmi.c
1256
tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_SOR_PLL0);
drivers/gpu/drm/tegra/hdmi.c
1260
value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_SOR_PLL0);
drivers/gpu/drm/tegra/hdmi.c
1262
tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_SOR_PLL0);
drivers/gpu/drm/tegra/hdmi.c
128
trace_hdmi_writel(hdmi->dev, offset, value);
drivers/gpu/drm/tegra/hdmi.c
1283
tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_HDMI_VSYNC_WINDOW);
drivers/gpu/drm/tegra/hdmi.c
129
writel(value, hdmi->regs + (offset << 2));
drivers/gpu/drm/tegra/hdmi.c
1292
tegra_hdmi_writel(hdmi,
drivers/gpu/drm/tegra/hdmi.c
1296
tegra_hdmi_writel(hdmi,
drivers/gpu/drm/tegra/hdmi.c
1300
div82 = clk_get_rate(hdmi->clk) / 1000000 * 4;
drivers/gpu/drm/tegra/hdmi.c
1302
tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_SOR_REFCLK);
drivers/gpu/drm/tegra/hdmi.c
1304
hdmi->dvi = !tegra_output_is_hdmi(output);
drivers/gpu/drm/tegra/hdmi.c
1305
if (!hdmi->dvi) {
drivers/gpu/drm/tegra/hdmi.c
1310
if (hdmi->format.sample_rate > 0) {
drivers/gpu/drm/tegra/hdmi.c
1311
err = tegra_hdmi_setup_audio(hdmi);
drivers/gpu/drm/tegra/hdmi.c
1313
hdmi->dvi = true;
drivers/gpu/drm/tegra/hdmi.c
1317
if (hdmi->config->has_hda)
drivers/gpu/drm/tegra/hdmi.c
1318
tegra_hdmi_write_eld(hdmi);
drivers/gpu/drm/tegra/hdmi.c
1325
if (!hdmi->dvi)
drivers/gpu/drm/tegra/hdmi.c
1328
tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_HDMI_CTRL);
drivers/gpu/drm/tegra/hdmi.c
1330
if (!hdmi->dvi) {
drivers/gpu/drm/tegra/hdmi.c
1331
tegra_hdmi_setup_avi_infoframe(hdmi, mode);
drivers/gpu/drm/tegra/hdmi.c
1332
tegra_hdmi_setup_audio_infoframe(hdmi);
drivers/gpu/drm/tegra/hdmi.c
1334
if (hdmi->stereo)
drivers/gpu/drm/tegra/hdmi.c
1335
tegra_hdmi_setup_stereo_infoframe(hdmi);
drivers/gpu/drm/tegra/hdmi.c
1339
for (i = 0; i < hdmi->config->num_tmds; i++) {
drivers/gpu/drm/tegra/hdmi.c
1340
if (hdmi->pixel_clock <= hdmi->config->tmds[i].pclk) {
drivers/gpu/drm/tegra/hdmi.c
1341
tegra_hdmi_setup_tmds(hdmi, &hdmi->config->tmds[i]);
drivers/gpu/drm/tegra/hdmi.c
1346
tegra_hdmi_writel(hdmi,
drivers/gpu/drm/tegra/hdmi.c
1360
tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_SOR_SEQ_INST(0));
drivers/gpu/drm/tegra/hdmi.c
1361
tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_SOR_SEQ_INST(8));
drivers/gpu/drm/tegra/hdmi.c
1363
value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_SOR_CSTM);
drivers/gpu/drm/tegra/hdmi.c
1370
tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_SOR_CSTM);
drivers/gpu/drm/tegra/hdmi.c
1373
tegra_hdmi_writel(hdmi,
drivers/gpu/drm/tegra/hdmi.c
1379
tegra_hdmi_writel(hdmi,
drivers/gpu/drm/tegra/hdmi.c
1388
value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_SOR_PWR);
drivers/gpu/drm/tegra/hdmi.c
1410
tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_SOR_STATE2);
drivers/gpu/drm/tegra/hdmi.c
1413
tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_SOR_STATE1);
drivers/gpu/drm/tegra/hdmi.c
1415
tegra_hdmi_writel(hdmi, 0, HDMI_NV_PDISP_SOR_STATE0);
drivers/gpu/drm/tegra/hdmi.c
1416
tegra_hdmi_writel(hdmi, SOR_STATE_UPDATE, HDMI_NV_PDISP_SOR_STATE0);
drivers/gpu/drm/tegra/hdmi.c
1417
tegra_hdmi_writel(hdmi, value | SOR_STATE_ATTACHED,
drivers/gpu/drm/tegra/hdmi.c
1419
tegra_hdmi_writel(hdmi, 0, HDMI_NV_PDISP_SOR_STATE0);
drivers/gpu/drm/tegra/hdmi.c
1427
if (!hdmi->dvi) {
drivers/gpu/drm/tegra/hdmi.c
1428
tegra_hdmi_enable_avi_infoframe(hdmi);
drivers/gpu/drm/tegra/hdmi.c
1429
tegra_hdmi_enable_audio_infoframe(hdmi);
drivers/gpu/drm/tegra/hdmi.c
1430
tegra_hdmi_enable_audio(hdmi);
drivers/gpu/drm/tegra/hdmi.c
1432
if (hdmi->stereo)
drivers/gpu/drm/tegra/hdmi.c
1433
tegra_hdmi_enable_stereo_infoframe(hdmi);
drivers/gpu/drm/tegra/hdmi.c
1438
tegra_hdmi_audio_unlock(hdmi);
drivers/gpu/drm/tegra/hdmi.c
1449
struct tegra_hdmi *hdmi = to_hdmi(output);
drivers/gpu/drm/tegra/hdmi.c
1452
err = tegra_dc_state_setup_clock(dc, crtc_state, hdmi->clk_parent,
drivers/gpu/drm/tegra/hdmi.c
1472
struct tegra_hdmi *hdmi = data;
drivers/gpu/drm/tegra/hdmi.c
1475
tegra_hdmi_audio_lock(hdmi);
drivers/gpu/drm/tegra/hdmi.c
1477
hdmi->format.sample_rate = hparms->sample_rate;
drivers/gpu/drm/tegra/hdmi.c
1478
hdmi->format.channels = hparms->channels;
drivers/gpu/drm/tegra/hdmi.c
1480
if (hdmi->pixel_clock && !hdmi->dvi)
drivers/gpu/drm/tegra/hdmi.c
1481
ret = tegra_hdmi_reconfigure_audio(hdmi);
drivers/gpu/drm/tegra/hdmi.c
1483
tegra_hdmi_audio_unlock(hdmi);
drivers/gpu/drm/tegra/hdmi.c
1490
struct tegra_hdmi *hdmi = data;
drivers/gpu/drm/tegra/hdmi.c
1493
ret = host1x_client_resume(&hdmi->client);
drivers/gpu/drm/tegra/hdmi.c
1495
dev_err(hdmi->dev, "failed to resume: %d\n", ret);
drivers/gpu/drm/tegra/hdmi.c
1502
struct tegra_hdmi *hdmi = data;
drivers/gpu/drm/tegra/hdmi.c
1505
tegra_hdmi_audio_lock(hdmi);
drivers/gpu/drm/tegra/hdmi.c
1507
hdmi->format.sample_rate = 0;
drivers/gpu/drm/tegra/hdmi.c
1508
hdmi->format.channels = 0;
drivers/gpu/drm/tegra/hdmi.c
1510
tegra_hdmi_audio_unlock(hdmi);
drivers/gpu/drm/tegra/hdmi.c
1512
ret = host1x_client_suspend(&hdmi->client);
drivers/gpu/drm/tegra/hdmi.c
1514
dev_err(hdmi->dev, "failed to suspend: %d\n", ret);
drivers/gpu/drm/tegra/hdmi.c
1523
static int tegra_hdmi_codec_register(struct tegra_hdmi *hdmi)
drivers/gpu/drm/tegra/hdmi.c
1527
if (hdmi->config->has_hda)
drivers/gpu/drm/tegra/hdmi.c
1531
codec_data.data = hdmi;
drivers/gpu/drm/tegra/hdmi.c
1534
hdmi->audio_pdev = platform_device_register_data(hdmi->dev,
drivers/gpu/drm/tegra/hdmi.c
1539
if (IS_ERR(hdmi->audio_pdev))
drivers/gpu/drm/tegra/hdmi.c
1540
return PTR_ERR(hdmi->audio_pdev);
drivers/gpu/drm/tegra/hdmi.c
1542
hdmi->format.channels = 2;
drivers/gpu/drm/tegra/hdmi.c
1547
static void tegra_hdmi_codec_unregister(struct tegra_hdmi *hdmi)
drivers/gpu/drm/tegra/hdmi.c
1549
if (hdmi->audio_pdev)
drivers/gpu/drm/tegra/hdmi.c
1550
platform_device_unregister(hdmi->audio_pdev);
drivers/gpu/drm/tegra/hdmi.c
1555
struct tegra_hdmi *hdmi = host1x_client_to_hdmi(client);
drivers/gpu/drm/tegra/hdmi.c
1560
hdmi->output.dev = client->dev;
drivers/gpu/drm/tegra/hdmi.c
1562
drm_encoder_init(drm, &hdmi->output.encoder, &tegra_hdmi_encoder_funcs,
drivers/gpu/drm/tegra/hdmi.c
1564
drm_encoder_helper_add(&hdmi->output.encoder,
drivers/gpu/drm/tegra/hdmi.c
1567
if (hdmi->output.bridge) {
drivers/gpu/drm/tegra/hdmi.c
1568
err = drm_bridge_attach(&hdmi->output.encoder, hdmi->output.bridge,
drivers/gpu/drm/tegra/hdmi.c
1576
connector = drm_bridge_connector_init(drm, &hdmi->output.encoder);
drivers/gpu/drm/tegra/hdmi.c
1584
drm_connector_init_with_ddc(drm, &hdmi->output.connector,
drivers/gpu/drm/tegra/hdmi.c
1587
hdmi->output.ddc);
drivers/gpu/drm/tegra/hdmi.c
1588
drm_connector_helper_add(&hdmi->output.connector,
drivers/gpu/drm/tegra/hdmi.c
1590
hdmi->output.connector.dpms = DRM_MODE_DPMS_OFF;
drivers/gpu/drm/tegra/hdmi.c
1592
drm_connector_attach_encoder(&hdmi->output.connector,
drivers/gpu/drm/tegra/hdmi.c
1593
&hdmi->output.encoder);
drivers/gpu/drm/tegra/hdmi.c
1594
drm_connector_register(&hdmi->output.connector);
drivers/gpu/drm/tegra/hdmi.c
1597
err = tegra_output_init(drm, &hdmi->output);
drivers/gpu/drm/tegra/hdmi.c
1603
hdmi->output.encoder.possible_crtcs = 0x3;
drivers/gpu/drm/tegra/hdmi.c
1605
err = regulator_enable(hdmi->hdmi);
drivers/gpu/drm/tegra/hdmi.c
1612
err = regulator_enable(hdmi->pll);
drivers/gpu/drm/tegra/hdmi.c
1614
dev_err(hdmi->dev, "failed to enable PLL regulator: %d\n", err);
drivers/gpu/drm/tegra/hdmi.c
1618
err = regulator_enable(hdmi->vdd);
drivers/gpu/drm/tegra/hdmi.c
1620
dev_err(hdmi->dev, "failed to enable VDD regulator: %d\n", err);
drivers/gpu/drm/tegra/hdmi.c
1624
err = tegra_hdmi_codec_register(hdmi);
drivers/gpu/drm/tegra/hdmi.c
1626
dev_err(hdmi->dev, "failed to register audio codec: %d\n", err);
drivers/gpu/drm/tegra/hdmi.c
1633
regulator_disable(hdmi->vdd);
drivers/gpu/drm/tegra/hdmi.c
1635
regulator_disable(hdmi->pll);
drivers/gpu/drm/tegra/hdmi.c
1637
regulator_disable(hdmi->hdmi);
drivers/gpu/drm/tegra/hdmi.c
1639
tegra_output_exit(&hdmi->output);
drivers/gpu/drm/tegra/hdmi.c
1646
struct tegra_hdmi *hdmi = host1x_client_to_hdmi(client);
drivers/gpu/drm/tegra/hdmi.c
1648
tegra_hdmi_codec_unregister(hdmi);
drivers/gpu/drm/tegra/hdmi.c
1650
tegra_output_exit(&hdmi->output);
drivers/gpu/drm/tegra/hdmi.c
1652
regulator_disable(hdmi->vdd);
drivers/gpu/drm/tegra/hdmi.c
1653
regulator_disable(hdmi->pll);
drivers/gpu/drm/tegra/hdmi.c
1654
regulator_disable(hdmi->hdmi);
drivers/gpu/drm/tegra/hdmi.c
1661
struct tegra_hdmi *hdmi = host1x_client_to_hdmi(client);
drivers/gpu/drm/tegra/hdmi.c
1665
err = reset_control_assert(hdmi->rst);
drivers/gpu/drm/tegra/hdmi.c
1673
clk_disable_unprepare(hdmi->clk);
drivers/gpu/drm/tegra/hdmi.c
1681
struct tegra_hdmi *hdmi = host1x_client_to_hdmi(client);
drivers/gpu/drm/tegra/hdmi.c
1691
err = clk_prepare_enable(hdmi->clk);
drivers/gpu/drm/tegra/hdmi.c
1699
err = reset_control_deassert(hdmi->rst);
drivers/gpu/drm/tegra/hdmi.c
1708
clk_disable_unprepare(hdmi->clk);
drivers/gpu/drm/tegra/hdmi.c
1772
struct tegra_hdmi *hdmi = data;
drivers/gpu/drm/tegra/hdmi.c
1775
value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_INT_STATUS);
drivers/gpu/drm/tegra/hdmi.c
1776
tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_INT_STATUS);
drivers/gpu/drm/tegra/hdmi.c
1782
value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_SOR_AUDIO_HDA_CODEC_SCRATCH0);
drivers/gpu/drm/tegra/hdmi.c
1787
tegra_hda_parse_format(format, &hdmi->format);
drivers/gpu/drm/tegra/hdmi.c
1788
tegra_hdmi_reconfigure_audio(hdmi);
drivers/gpu/drm/tegra/hdmi.c
1790
tegra_hdmi_disable_audio_infoframe(hdmi);
drivers/gpu/drm/tegra/hdmi.c
1791
tegra_hdmi_disable_audio(hdmi);
drivers/gpu/drm/tegra/hdmi.c
1800
struct tegra_hdmi *hdmi;
drivers/gpu/drm/tegra/hdmi.c
1803
hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL);
drivers/gpu/drm/tegra/hdmi.c
1804
if (!hdmi)
drivers/gpu/drm/tegra/hdmi.c
1807
hdmi->config = of_device_get_match_data(&pdev->dev);
drivers/gpu/drm/tegra/hdmi.c
1808
hdmi->dev = &pdev->dev;
drivers/gpu/drm/tegra/hdmi.c
1810
hdmi->audio_source = AUTO;
drivers/gpu/drm/tegra/hdmi.c
1811
hdmi->stereo = false;
drivers/gpu/drm/tegra/hdmi.c
1812
hdmi->dvi = false;
drivers/gpu/drm/tegra/hdmi.c
1814
mutex_init(&hdmi->audio_lock);
drivers/gpu/drm/tegra/hdmi.c
1816
hdmi->clk = devm_clk_get(&pdev->dev, NULL);
drivers/gpu/drm/tegra/hdmi.c
1817
if (IS_ERR(hdmi->clk)) {
drivers/gpu/drm/tegra/hdmi.c
1819
return PTR_ERR(hdmi->clk);
drivers/gpu/drm/tegra/hdmi.c
1822
hdmi->rst = devm_reset_control_get(&pdev->dev, "hdmi");
drivers/gpu/drm/tegra/hdmi.c
1823
if (IS_ERR(hdmi->rst)) {
drivers/gpu/drm/tegra/hdmi.c
1825
return PTR_ERR(hdmi->rst);
drivers/gpu/drm/tegra/hdmi.c
1828
hdmi->clk_parent = devm_clk_get(&pdev->dev, "parent");
drivers/gpu/drm/tegra/hdmi.c
1829
if (IS_ERR(hdmi->clk_parent))
drivers/gpu/drm/tegra/hdmi.c
1830
return PTR_ERR(hdmi->clk_parent);
drivers/gpu/drm/tegra/hdmi.c
1832
err = clk_set_parent(hdmi->clk, hdmi->clk_parent);
drivers/gpu/drm/tegra/hdmi.c
1838
hdmi->hdmi = devm_regulator_get(&pdev->dev, "hdmi");
drivers/gpu/drm/tegra/hdmi.c
1839
err = PTR_ERR_OR_ZERO(hdmi->hdmi);
drivers/gpu/drm/tegra/hdmi.c
1844
hdmi->pll = devm_regulator_get(&pdev->dev, "pll");
drivers/gpu/drm/tegra/hdmi.c
1845
err = PTR_ERR_OR_ZERO(hdmi->pll);
drivers/gpu/drm/tegra/hdmi.c
1850
hdmi->vdd = devm_regulator_get(&pdev->dev, "vdd");
drivers/gpu/drm/tegra/hdmi.c
1851
err = PTR_ERR_OR_ZERO(hdmi->vdd);
drivers/gpu/drm/tegra/hdmi.c
1856
hdmi->output.dev = &pdev->dev;
drivers/gpu/drm/tegra/hdmi.c
1858
err = tegra_output_probe(&hdmi->output);
drivers/gpu/drm/tegra/hdmi.c
1862
hdmi->regs = devm_platform_ioremap_resource(pdev, 0);
drivers/gpu/drm/tegra/hdmi.c
1863
if (IS_ERR(hdmi->regs)) {
drivers/gpu/drm/tegra/hdmi.c
1864
err = PTR_ERR(hdmi->regs);
drivers/gpu/drm/tegra/hdmi.c
1872
hdmi->irq = err;
drivers/gpu/drm/tegra/hdmi.c
1874
err = devm_request_irq(hdmi->dev, hdmi->irq, tegra_hdmi_irq, 0,
drivers/gpu/drm/tegra/hdmi.c
1875
dev_name(hdmi->dev), hdmi);
drivers/gpu/drm/tegra/hdmi.c
1878
hdmi->irq, err);
drivers/gpu/drm/tegra/hdmi.c
1882
platform_set_drvdata(pdev, hdmi);
drivers/gpu/drm/tegra/hdmi.c
1892
INIT_LIST_HEAD(&hdmi->client.list);
drivers/gpu/drm/tegra/hdmi.c
1893
hdmi->client.ops = &hdmi_client_ops;
drivers/gpu/drm/tegra/hdmi.c
1894
hdmi->client.dev = &pdev->dev;
drivers/gpu/drm/tegra/hdmi.c
1896
err = host1x_client_register(&hdmi->client);
drivers/gpu/drm/tegra/hdmi.c
1906
tegra_output_remove(&hdmi->output);
drivers/gpu/drm/tegra/hdmi.c
1912
struct tegra_hdmi *hdmi = platform_get_drvdata(pdev);
drivers/gpu/drm/tegra/hdmi.c
1914
host1x_client_unregister(&hdmi->client);
drivers/gpu/drm/tegra/hdmi.c
1916
tegra_output_remove(&hdmi->output);
drivers/gpu/drm/tegra/hdmi.c
379
static void tegra_hdmi_audio_lock(struct tegra_hdmi *hdmi)
drivers/gpu/drm/tegra/hdmi.c
381
mutex_lock(&hdmi->audio_lock);
drivers/gpu/drm/tegra/hdmi.c
382
disable_irq(hdmi->irq);
drivers/gpu/drm/tegra/hdmi.c
385
static void tegra_hdmi_audio_unlock(struct tegra_hdmi *hdmi)
drivers/gpu/drm/tegra/hdmi.c
387
enable_irq(hdmi->irq);
drivers/gpu/drm/tegra/hdmi.c
388
mutex_unlock(&hdmi->audio_lock);
drivers/gpu/drm/tegra/hdmi.c
440
static void tegra_hdmi_setup_audio_fs_tables(struct tegra_hdmi *hdmi)
drivers/gpu/drm/tegra/hdmi.c
463
tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_AUDIO_FS(i));
drivers/gpu/drm/tegra/hdmi.c
467
static void tegra_hdmi_write_aval(struct tegra_hdmi *hdmi, u32 value)
drivers/gpu/drm/tegra/hdmi.c
484
if (regs[i].sample_rate == hdmi->format.sample_rate) {
drivers/gpu/drm/tegra/hdmi.c
485
tegra_hdmi_writel(hdmi, value, regs[i].offset);
drivers/gpu/drm/tegra/hdmi.c
491
static int tegra_hdmi_setup_audio(struct tegra_hdmi *hdmi)
drivers/gpu/drm/tegra/hdmi.c
497
switch (hdmi->audio_source) {
drivers/gpu/drm/tegra/hdmi.c
499
if (hdmi->config->has_hda)
drivers/gpu/drm/tegra/hdmi.c
507
if (hdmi->config->has_hda)
drivers/gpu/drm/tegra/hdmi.c
514
if (hdmi->config->has_hda)
drivers/gpu/drm/tegra/hdmi.c
528
if (hdmi->config->has_hda) {
drivers/gpu/drm/tegra/hdmi.c
539
if (hdmi->format.channels == 2)
drivers/gpu/drm/tegra/hdmi.c
546
tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_SOR_AUDIO_CNTRL0);
drivers/gpu/drm/tegra/hdmi.c
556
if (!hdmi->config->has_hda)
drivers/gpu/drm/tegra/hdmi.c
559
tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_AUDIO_CNTRL0);
drivers/gpu/drm/tegra/hdmi.c
564
if (hdmi->config->has_hbr) {
drivers/gpu/drm/tegra/hdmi.c
565
value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_SOR_AUDIO_SPARE0);
drivers/gpu/drm/tegra/hdmi.c
567
tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_SOR_AUDIO_SPARE0);
drivers/gpu/drm/tegra/hdmi.c
570
err = tegra_hdmi_get_audio_config(hdmi->format.sample_rate,
drivers/gpu/drm/tegra/hdmi.c
571
hdmi->pixel_clock, &config);
drivers/gpu/drm/tegra/hdmi.c
573
dev_err(hdmi->dev,
drivers/gpu/drm/tegra/hdmi.c
575
hdmi->format.sample_rate, hdmi->pixel_clock);
drivers/gpu/drm/tegra/hdmi.c
579
dev_dbg(hdmi->dev, "audio: pixclk=%u, n=%u, cts=%u, aval=%u\n",
drivers/gpu/drm/tegra/hdmi.c
580
hdmi->pixel_clock, config.n, config.cts, config.aval);
drivers/gpu/drm/tegra/hdmi.c
582
tegra_hdmi_writel(hdmi, 0, HDMI_NV_PDISP_HDMI_ACR_CTRL);
drivers/gpu/drm/tegra/hdmi.c
586
tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_AUDIO_N);
drivers/gpu/drm/tegra/hdmi.c
588
tegra_hdmi_writel(hdmi, ACR_SUBPACK_N(config.n) | ACR_ENABLE,
drivers/gpu/drm/tegra/hdmi.c
591
tegra_hdmi_writel(hdmi, ACR_SUBPACK_CTS(config.cts),
drivers/gpu/drm/tegra/hdmi.c
595
tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_HDMI_SPARE);
drivers/gpu/drm/tegra/hdmi.c
597
value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_AUDIO_N);
drivers/gpu/drm/tegra/hdmi.c
599
tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_AUDIO_N);
drivers/gpu/drm/tegra/hdmi.c
601
if (hdmi->config->has_hda)
drivers/gpu/drm/tegra/hdmi.c
602
tegra_hdmi_write_aval(hdmi, config.aval);
drivers/gpu/drm/tegra/hdmi.c
604
tegra_hdmi_setup_audio_fs_tables(hdmi);
drivers/gpu/drm/tegra/hdmi.c
609
static void tegra_hdmi_disable_audio(struct tegra_hdmi *hdmi)
drivers/gpu/drm/tegra/hdmi.c
613
value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_HDMI_GENERIC_CTRL);
drivers/gpu/drm/tegra/hdmi.c
615
tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_HDMI_GENERIC_CTRL);
drivers/gpu/drm/tegra/hdmi.c
618
static void tegra_hdmi_enable_audio(struct tegra_hdmi *hdmi)
drivers/gpu/drm/tegra/hdmi.c
622
value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_HDMI_GENERIC_CTRL);
drivers/gpu/drm/tegra/hdmi.c
624
tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_HDMI_GENERIC_CTRL);
drivers/gpu/drm/tegra/hdmi.c
627
static void tegra_hdmi_write_eld(struct tegra_hdmi *hdmi)
drivers/gpu/drm/tegra/hdmi.c
629
size_t length = drm_eld_size(hdmi->output.connector.eld), i;
drivers/gpu/drm/tegra/hdmi.c
633
tegra_hdmi_writel(hdmi, i << 8 | hdmi->output.connector.eld[i],
drivers/gpu/drm/tegra/hdmi.c
643
tegra_hdmi_writel(hdmi, i << 8 | 0,
drivers/gpu/drm/tegra/hdmi.c
647
tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_SOR_AUDIO_HDA_PRESENSE);
drivers/gpu/drm/tegra/hdmi.c
661
static void tegra_hdmi_write_infopack(struct tegra_hdmi *hdmi, const void *data,
drivers/gpu/drm/tegra/hdmi.c
683
dev_err(hdmi->dev, "unsupported infoframe type: %02x\n",
drivers/gpu/drm/tegra/hdmi.c
69
struct regulator *hdmi;
drivers/gpu/drm/tegra/hdmi.c
691
tegra_hdmi_writel(hdmi, value, offset);
drivers/gpu/drm/tegra/hdmi.c
703
tegra_hdmi_writel(hdmi, value, offset++);
drivers/gpu/drm/tegra/hdmi.c
708
tegra_hdmi_writel(hdmi, value, offset++);
drivers/gpu/drm/tegra/hdmi.c
712
static void tegra_hdmi_setup_avi_infoframe(struct tegra_hdmi *hdmi,
drivers/gpu/drm/tegra/hdmi.c
720
&hdmi->output.connector, mode);
drivers/gpu/drm/tegra/hdmi.c
722
dev_err(hdmi->dev, "failed to setup AVI infoframe: %zd\n", err);
drivers/gpu/drm/tegra/hdmi.c
728
dev_err(hdmi->dev, "failed to pack AVI infoframe: %zd\n", err);
drivers/gpu/drm/tegra/hdmi.c
732
tegra_hdmi_write_infopack(hdmi, buffer, err);
drivers/gpu/drm/tegra/hdmi.c
735
static void tegra_hdmi_disable_avi_infoframe(struct tegra_hdmi *hdmi)
drivers/gpu/drm/tegra/hdmi.c
739
value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_HDMI_AVI_INFOFRAME_CTRL);
drivers/gpu/drm/tegra/hdmi.c
741
tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_HDMI_AVI_INFOFRAME_CTRL);
drivers/gpu/drm/tegra/hdmi.c
744
static void tegra_hdmi_enable_avi_infoframe(struct tegra_hdmi *hdmi)
drivers/gpu/drm/tegra/hdmi.c
748
value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_HDMI_AVI_INFOFRAME_CTRL);
drivers/gpu/drm/tegra/hdmi.c
750
tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_HDMI_AVI_INFOFRAME_CTRL);
drivers/gpu/drm/tegra/hdmi.c
753
static void tegra_hdmi_setup_audio_infoframe(struct tegra_hdmi *hdmi)
drivers/gpu/drm/tegra/hdmi.c
761
dev_err(hdmi->dev, "failed to setup audio infoframe: %zd\n",
drivers/gpu/drm/tegra/hdmi.c
766
frame.channels = hdmi->format.channels;
drivers/gpu/drm/tegra/hdmi.c
770
dev_err(hdmi->dev, "failed to pack audio infoframe: %zd\n",
drivers/gpu/drm/tegra/hdmi.c
781
tegra_hdmi_write_infopack(hdmi, buffer, min_t(size_t, 10, err));
drivers/gpu/drm/tegra/hdmi.c
784
static void tegra_hdmi_disable_audio_infoframe(struct tegra_hdmi *hdmi)
drivers/gpu/drm/tegra/hdmi.c
788
value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_HDMI_AUDIO_INFOFRAME_CTRL);
drivers/gpu/drm/tegra/hdmi.c
790
tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_HDMI_AUDIO_INFOFRAME_CTRL);
drivers/gpu/drm/tegra/hdmi.c
793
static void tegra_hdmi_enable_audio_infoframe(struct tegra_hdmi *hdmi)
drivers/gpu/drm/tegra/hdmi.c
797
value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_HDMI_AUDIO_INFOFRAME_CTRL);
drivers/gpu/drm/tegra/hdmi.c
799
tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_HDMI_AUDIO_INFOFRAME_CTRL);
drivers/gpu/drm/tegra/hdmi.c
802
static void tegra_hdmi_setup_stereo_infoframe(struct tegra_hdmi *hdmi)
drivers/gpu/drm/tegra/hdmi.c
813
dev_err(hdmi->dev, "failed to pack vendor infoframe: %zd\n",
drivers/gpu/drm/tegra/hdmi.c
818
tegra_hdmi_write_infopack(hdmi, buffer, err);
drivers/gpu/drm/tegra/hdmi.c
821
static void tegra_hdmi_disable_stereo_infoframe(struct tegra_hdmi *hdmi)
drivers/gpu/drm/tegra/hdmi.c
825
value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_HDMI_GENERIC_CTRL);
drivers/gpu/drm/tegra/hdmi.c
827
tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_HDMI_GENERIC_CTRL);
drivers/gpu/drm/tegra/hdmi.c
830
static void tegra_hdmi_enable_stereo_infoframe(struct tegra_hdmi *hdmi)
drivers/gpu/drm/tegra/hdmi.c
834
value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_HDMI_GENERIC_CTRL);
drivers/gpu/drm/tegra/hdmi.c
836
tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_HDMI_GENERIC_CTRL);
drivers/gpu/drm/tegra/hdmi.c
839
static void tegra_hdmi_setup_tmds(struct tegra_hdmi *hdmi,
drivers/gpu/drm/tegra/hdmi.c
844
tegra_hdmi_writel(hdmi, tmds->pll0, HDMI_NV_PDISP_SOR_PLL0);
drivers/gpu/drm/tegra/hdmi.c
845
tegra_hdmi_writel(hdmi, tmds->pll1, HDMI_NV_PDISP_SOR_PLL1);
drivers/gpu/drm/tegra/hdmi.c
846
tegra_hdmi_writel(hdmi, tmds->pe_current, HDMI_NV_PDISP_PE_CURRENT);
drivers/gpu/drm/tegra/hdmi.c
848
tegra_hdmi_writel(hdmi, tmds->drive_current,
drivers/gpu/drm/tegra/hdmi.c
851
value = tegra_hdmi_readl(hdmi, hdmi->config->fuse_override_offset);
drivers/gpu/drm/tegra/hdmi.c
852
value |= hdmi->config->fuse_override_value;
drivers/gpu/drm/tegra/hdmi.c
853
tegra_hdmi_writel(hdmi, value, hdmi->config->fuse_override_offset);
drivers/gpu/drm/tegra/hdmi.c
855
if (hdmi->config->has_sor_io_peak_current)
drivers/gpu/drm/tegra/hdmi.c
856
tegra_hdmi_writel(hdmi, tmds->peak_current,
drivers/gpu/drm/tegra/hdmi.c
860
static int tegra_hdmi_reconfigure_audio(struct tegra_hdmi *hdmi)
drivers/gpu/drm/tegra/hdmi.c
864
err = tegra_hdmi_setup_audio(hdmi);
drivers/gpu/drm/tegra/hdmi.c
866
tegra_hdmi_disable_audio_infoframe(hdmi);
drivers/gpu/drm/tegra/hdmi.c
867
tegra_hdmi_disable_audio(hdmi);
drivers/gpu/drm/tegra/hdmi.c
869
tegra_hdmi_setup_audio_infoframe(hdmi);
drivers/gpu/drm/tegra/hdmi.c
870
tegra_hdmi_enable_audio_infoframe(hdmi);
drivers/gpu/drm/tegra/hdmi.c
871
tegra_hdmi_enable_audio(hdmi);
drivers/gpu/drm/tegra/hdmi.c
886
struct tegra_hdmi *hdmi = to_hdmi(output);
drivers/gpu/drm/tegra/hdmi.c
893
tegra_hdmi_writel(hdmi, 0, HDMI_NV_PDISP_SOR_AUDIO_HDA_PRESENSE);
drivers/gpu/drm/tegra/sor.c
2197
struct drm_scdc *scdc = &sor->output.connector.display_info.hdmi.scdc;
drivers/gpu/drm/tests/drm_connector_test.c
44
.hdmi = {
drivers/gpu/drm/tests/drm_connector_test.c
768
priv->connector.hdmi.product,
drivers/gpu/drm/tests/drm_connector_test.c
770
sizeof(priv->connector.hdmi.product));
drivers/gpu/drm/tests/drm_connector_test.c
801
priv->connector.hdmi.product,
drivers/gpu/drm/tests/drm_connector_test.c
803
sizeof(priv->connector.hdmi.product));
drivers/gpu/drm/tests/drm_connector_test.c
854
priv->connector.hdmi.vendor,
drivers/gpu/drm/tests/drm_connector_test.c
856
sizeof(priv->connector.hdmi.vendor));
drivers/gpu/drm/tests/drm_connector_test.c
886
priv->connector.hdmi.vendor,
drivers/gpu/drm/tests/drm_connector_test.c
888
sizeof(priv->connector.hdmi.vendor));
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1017
old_conn_state->hdmi.output_bpc,
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1018
new_conn_state->hdmi.output_bpc);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1084
new_conn_state->hdmi.output_bpc,
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1085
old_conn_state->hdmi.output_bpc);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1097
old_conn_state->hdmi.output_bpc,
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1098
new_conn_state->hdmi.output_bpc);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1159
KUNIT_EXPECT_EQ(test, conn_state->hdmi.output_bpc, 8);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1160
KUNIT_EXPECT_EQ(test, conn_state->hdmi.output_format, DRM_OUTPUT_COLOR_FORMAT_RGB444);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
117
.hdmi = {
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1212
KUNIT_ASSERT_EQ(test, conn_state->hdmi.output_bpc, 8);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1213
KUNIT_ASSERT_EQ(test, conn_state->hdmi.output_format, DRM_OUTPUT_COLOR_FORMAT_RGB444);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1214
KUNIT_EXPECT_EQ(test, conn_state->hdmi.tmds_char_rate, preferred->clock * 1000);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1267
KUNIT_ASSERT_EQ(test, conn_state->hdmi.output_bpc, 10);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1268
KUNIT_ASSERT_EQ(test, conn_state->hdmi.output_format, DRM_OUTPUT_COLOR_FORMAT_RGB444);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1269
KUNIT_EXPECT_EQ(test, conn_state->hdmi.tmds_char_rate, preferred->clock * 1250);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1322
KUNIT_ASSERT_EQ(test, conn_state->hdmi.output_bpc, 12);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1323
KUNIT_ASSERT_EQ(test, conn_state->hdmi.output_format, DRM_OUTPUT_COLOR_FORMAT_RGB444);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1324
KUNIT_EXPECT_EQ(test, conn_state->hdmi.tmds_char_rate, preferred->clock * 1500);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
137
.hdmi = {
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1377
conn->hdmi.funcs = &reject_connector_hdmi_funcs;
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1459
KUNIT_EXPECT_EQ(test, conn_state->hdmi.output_bpc, 10);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1460
KUNIT_EXPECT_EQ(test, conn_state->hdmi.output_format, DRM_OUTPUT_COLOR_FORMAT_RGB444);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1461
KUNIT_EXPECT_EQ(test, conn_state->hdmi.tmds_char_rate, preferred->clock * 1250);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1533
KUNIT_EXPECT_EQ(test, conn_state->hdmi.output_bpc, 10);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1534
KUNIT_EXPECT_EQ(test, conn_state->hdmi.output_format, DRM_OUTPUT_COLOR_FORMAT_YCBCR420);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1535
KUNIT_EXPECT_EQ(test, conn_state->hdmi.tmds_char_rate, yuv420_only_mode->clock * 625);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1613
KUNIT_EXPECT_EQ(test, conn_state->hdmi.output_bpc, 10);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1614
KUNIT_EXPECT_EQ(test, conn_state->hdmi.output_format, DRM_OUTPUT_COLOR_FORMAT_RGB444);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1691
KUNIT_EXPECT_EQ(test, conn_state->hdmi.output_bpc, 8);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1692
KUNIT_EXPECT_EQ(test, conn_state->hdmi.output_format, DRM_OUTPUT_COLOR_FORMAT_RGB444);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1753
KUNIT_EXPECT_EQ(test, conn_state->hdmi.output_format, DRM_OUTPUT_COLOR_FORMAT_RGB444);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1849
KUNIT_EXPECT_EQ(test, conn_state->hdmi.output_bpc, 8);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1850
KUNIT_EXPECT_EQ(test, conn_state->hdmi.output_format, DRM_OUTPUT_COLOR_FORMAT_RGB444);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1922
KUNIT_EXPECT_LT(test, conn_state->hdmi.output_bpc, 12);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1923
KUNIT_EXPECT_EQ(test, conn_state->hdmi.output_format, DRM_OUTPUT_COLOR_FORMAT_RGB444);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1997
KUNIT_EXPECT_LT(test, conn_state->hdmi.output_bpc, 12);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
1998
KUNIT_EXPECT_EQ(test, conn_state->hdmi.output_format, DRM_OUTPUT_COLOR_FORMAT_RGB444);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
2063
KUNIT_EXPECT_EQ(test, conn_state->hdmi.output_bpc, 8);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
2064
KUNIT_EXPECT_EQ(test, conn_state->hdmi.output_format, DRM_OUTPUT_COLOR_FORMAT_RGB444);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
2131
KUNIT_EXPECT_EQ(test, conn_state->hdmi.output_bpc, 8);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
2132
KUNIT_EXPECT_EQ(test, conn_state->hdmi.output_format, DRM_OUTPUT_COLOR_FORMAT_RGB444);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
2264
KUNIT_EXPECT_EQ(test, conn_state->hdmi.broadcast_rgb, DRM_HDMI_BROADCAST_RGB_AUTO);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
2288
KUNIT_EXPECT_EQ(test, conn_state->hdmi.output_bpc, 0);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
2312
KUNIT_EXPECT_EQ(test, conn_state->hdmi.output_bpc, 0);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
2336
KUNIT_EXPECT_EQ(test, conn_state->hdmi.output_bpc, 0);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
2358
KUNIT_EXPECT_EQ(test, conn_state->hdmi.output_format, 0);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
2380
KUNIT_EXPECT_EQ(test, conn_state->hdmi.tmds_char_rate, 0);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
2622
.hdmi = {
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
2721
.hdmi = {
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
2834
KUNIT_ASSERT_EQ(test, new_conn_state->hdmi.output_bpc, 8);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
2835
KUNIT_ASSERT_EQ(test, new_conn_state->hdmi.infoframes.hdr_drm.set, false);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
2957
KUNIT_ASSERT_EQ(test, new_conn_state->hdmi.output_bpc, 10);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
2958
KUNIT_ASSERT_EQ(test, new_conn_state->hdmi.infoframes.hdr_drm.set, true);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
2969
.hdmi = {
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
337
new_conn_state->hdmi.broadcast_rgb = DRM_HDMI_BROADCAST_RGB_FULL;
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
340
old_conn_state->hdmi.broadcast_rgb,
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
341
new_conn_state->hdmi.broadcast_rgb);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
348
KUNIT_EXPECT_EQ(test, new_conn_state->hdmi.broadcast_rgb, DRM_HDMI_BROADCAST_RGB_FULL);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
412
new_conn_state->hdmi.broadcast_rgb = old_conn_state->hdmi.broadcast_rgb;
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
424
old_conn_state->hdmi.broadcast_rgb,
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
425
new_conn_state->hdmi.broadcast_rgb);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
487
conn_state->hdmi.broadcast_rgb,
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
496
KUNIT_EXPECT_TRUE(test, conn_state->hdmi.is_limited_range);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
554
conn_state->hdmi.broadcast_rgb,
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
563
KUNIT_EXPECT_FALSE(test, conn_state->hdmi.is_limited_range);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
620
conn_state->hdmi.broadcast_rgb = DRM_HDMI_BROADCAST_RGB_FULL;
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
629
conn_state->hdmi.broadcast_rgb,
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
632
KUNIT_EXPECT_FALSE(test, conn_state->hdmi.is_limited_range);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
689
conn_state->hdmi.broadcast_rgb = DRM_HDMI_BROADCAST_RGB_FULL;
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
698
conn_state->hdmi.broadcast_rgb,
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
701
KUNIT_EXPECT_FALSE(test, conn_state->hdmi.is_limited_range);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
758
conn_state->hdmi.broadcast_rgb = DRM_HDMI_BROADCAST_RGB_LIMITED;
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
767
conn_state->hdmi.broadcast_rgb,
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
770
KUNIT_EXPECT_TRUE(test, conn_state->hdmi.is_limited_range);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
827
conn_state->hdmi.broadcast_rgb = DRM_HDMI_BROADCAST_RGB_LIMITED;
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
836
conn_state->hdmi.broadcast_rgb,
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
839
KUNIT_EXPECT_TRUE(test, conn_state->hdmi.is_limited_range);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
906
conn_state->hdmi.broadcast_rgb = broadcast_rgb;
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
920
KUNIT_ASSERT_EQ(test, conn_state->hdmi.broadcast_rgb, broadcast_rgb);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
921
KUNIT_ASSERT_EQ(test, conn_state->hdmi.output_format, DRM_OUTPUT_COLOR_FORMAT_YCBCR420);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
923
KUNIT_EXPECT_TRUE(test, conn_state->hdmi.is_limited_range);
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
97
.hdmi = {
drivers/gpu/drm/vc4/vc4_hdmi.c
1201
unsigned int lim_range = state->hdmi.is_limited_range ? 1 : 0;
drivers/gpu/drm/vc4/vc4_hdmi.c
1216
switch (state->hdmi.output_format) {
drivers/gpu/drm/vc4/vc4_hdmi.c
127
if (!display->hdmi.scdc.supported ||
drivers/gpu/drm/vc4/vc4_hdmi.c
128
!display->hdmi.scdc.scrambling.supported)
drivers/gpu/drm/vc4/vc4_hdmi.c
1380
switch (state->hdmi.output_bpc) {
drivers/gpu/drm/vc4/vc4_hdmi.c
1397
if (state->hdmi.output_format == DRM_OUTPUT_COLOR_FORMAT_YCBCR422) {
drivers/gpu/drm/vc4/vc4_hdmi.c
1482
unsigned long long tmds_char_rate = conn_state->hdmi.tmds_char_rate;
drivers/gpu/drm/vc4/vc4_hdmi.c
1714
vc4_hdmi->output_bpc = conn_state->hdmi.output_bpc;
drivers/gpu/drm/vc4/vc4_hdmi.c
1715
vc4_hdmi->output_format = conn_state->hdmi.output_format;
drivers/gpu/drm/vc4/vc4_hdmi.c
1748
.hdmi = {
drivers/gpu/drm/vc4/vc4_hdmi.c
978
if (state->hdmi.is_limited_range) {
drivers/gpu/drm/vc4/vc4_hdmi_phy.c
410
unsigned long long pixel_freq = conn_state->hdmi.tmds_char_rate;
drivers/gpu/drm/vc4/vc4_hdmi_phy.c
960
unsigned long long pixel_freq = conn_state->hdmi.tmds_char_rate;
drivers/gpu/drm/vc4/vc4_hdmi_regs.h
632
void __iomem *__vc4_hdmi_get_field_base(struct vc4_hdmi *hdmi,
drivers/gpu/drm/vc4/vc4_hdmi_regs.h
637
return hdmi->hd_regs;
drivers/gpu/drm/vc4/vc4_hdmi_regs.h
640
return hdmi->hdmicore_regs;
drivers/gpu/drm/vc4/vc4_hdmi_regs.h
643
return hdmi->csc_regs;
drivers/gpu/drm/vc4/vc4_hdmi_regs.h
646
return hdmi->cec_regs;
drivers/gpu/drm/vc4/vc4_hdmi_regs.h
649
return hdmi->dvp_regs;
drivers/gpu/drm/vc4/vc4_hdmi_regs.h
652
return hdmi->phy_regs;
drivers/gpu/drm/vc4/vc4_hdmi_regs.h
655
return hdmi->ram_regs;
drivers/gpu/drm/vc4/vc4_hdmi_regs.h
658
return hdmi->rm_regs;
drivers/gpu/drm/vc4/vc4_hdmi_regs.h
667
static inline u32 vc4_hdmi_read(struct vc4_hdmi *hdmi,
drivers/gpu/drm/vc4/vc4_hdmi_regs.h
671
const struct vc4_hdmi_variant *variant = hdmi->variant;
drivers/gpu/drm/vc4/vc4_hdmi_regs.h
674
WARN_ON(pm_runtime_status_suspended(&hdmi->pdev->dev));
drivers/gpu/drm/vc4/vc4_hdmi_regs.h
679
dev_warn(&hdmi->pdev->dev,
drivers/gpu/drm/vc4/vc4_hdmi_regs.h
685
base = __vc4_hdmi_get_field_base(hdmi, field->reg);
drivers/gpu/drm/vc4/vc4_hdmi_regs.h
687
dev_warn(&hdmi->pdev->dev,
drivers/gpu/drm/vc4/vc4_hdmi_regs.h
696
static inline void vc4_hdmi_write(struct vc4_hdmi *hdmi,
drivers/gpu/drm/vc4/vc4_hdmi_regs.h
701
const struct vc4_hdmi_variant *variant = hdmi->variant;
drivers/gpu/drm/vc4/vc4_hdmi_regs.h
704
lockdep_assert_held(&hdmi->hw_lock);
drivers/gpu/drm/vc4/vc4_hdmi_regs.h
706
WARN_ON(pm_runtime_status_suspended(&hdmi->pdev->dev));
drivers/gpu/drm/vc4/vc4_hdmi_regs.h
711
dev_warn(&hdmi->pdev->dev,
drivers/gpu/drm/vc4/vc4_hdmi_regs.h
717
base = __vc4_hdmi_get_field_base(hdmi, field->reg);
drivers/gpu/drm/vc4/vc4_hdmi_regs.h
719
dev_warn(&hdmi->pdev->dev,
drivers/media/cec/i2c/tda9950.c
417
priv->hdmi = dev;
drivers/media/cec/i2c/tda9950.c
419
priv->hdmi = glue->parent;
drivers/media/cec/i2c/tda9950.c
460
priv->notify = cec_notifier_cec_adap_register(priv->hdmi, NULL,
drivers/media/cec/i2c/tda9950.c
465
ret = cec_register_adapter(priv->adap, priv->hdmi);
drivers/media/cec/i2c/tda9950.c
64
struct device *hdmi;
drivers/media/i2c/adv748x/adv748x-core.c
250
if (tx->src == &state->hdmi.sd) {
drivers/media/i2c/adv748x/adv748x-core.c
353
state->hdmi.tx = enable ? tx : NULL;
drivers/media/i2c/adv748x/adv748x-core.c
375
if (state->hdmi.tx) {
drivers/media/i2c/adv748x/adv748x-core.c
773
ret = adv748x_hdmi_init(&state->hdmi);
drivers/media/i2c/adv748x/adv748x-core.c
807
adv748x_hdmi_cleanup(&state->hdmi);
drivers/media/i2c/adv748x/adv748x-core.c
823
adv748x_hdmi_cleanup(&state->hdmi);
drivers/media/i2c/adv748x/adv748x-csi2.c
134
ret = adv748x_csi2_register_link(tx, sd->v4l2_dev, &state->hdmi.sd,
drivers/media/i2c/adv748x/adv748x-csi2.c
140
state->hdmi.tx = tx;
drivers/media/i2c/adv748x/adv748x-hdmi.c
102
fmt->width = hdmi->timings.bt.width;
drivers/media/i2c/adv748x/adv748x-hdmi.c
103
fmt->height = hdmi->timings.bt.height;
drivers/media/i2c/adv748x/adv748x-hdmi.c
220
struct adv748x_hdmi *hdmi = adv748x_sd_to_hdmi(sd);
drivers/media/i2c/adv748x/adv748x-hdmi.c
221
struct adv748x_state *state = adv748x_hdmi_to_state(hdmi);
drivers/media/i2c/adv748x/adv748x-hdmi.c
227
if (v4l2_match_dv_timings(&hdmi->timings, timings, 0, false))
drivers/media/i2c/adv748x/adv748x-hdmi.c
242
hdmi->timings = *timings;
drivers/media/i2c/adv748x/adv748x-hdmi.c
260
struct adv748x_hdmi *hdmi = adv748x_sd_to_hdmi(sd);
drivers/media/i2c/adv748x/adv748x-hdmi.c
261
struct adv748x_state *state = adv748x_hdmi_to_state(hdmi);
drivers/media/i2c/adv748x/adv748x-hdmi.c
265
*timings = hdmi->timings;
drivers/media/i2c/adv748x/adv748x-hdmi.c
275
struct adv748x_hdmi *hdmi = adv748x_sd_to_hdmi(sd);
drivers/media/i2c/adv748x/adv748x-hdmi.c
276
struct adv748x_state *state = adv748x_hdmi_to_state(hdmi);
drivers/media/i2c/adv748x/adv748x-hdmi.c
292
*timings = hdmi->timings;
drivers/media/i2c/adv748x/adv748x-hdmi.c
344
hdmi->timings = *timings;
drivers/media/i2c/adv748x/adv748x-hdmi.c
351
struct adv748x_hdmi *hdmi = adv748x_sd_to_hdmi(sd);
drivers/media/i2c/adv748x/adv748x-hdmi.c
352
struct adv748x_state *state = adv748x_hdmi_to_state(hdmi);
drivers/media/i2c/adv748x/adv748x-hdmi.c
365
struct adv748x_hdmi *hdmi = adv748x_sd_to_hdmi(sd);
drivers/media/i2c/adv748x/adv748x-hdmi.c
366
struct adv748x_state *state = adv748x_hdmi_to_state(hdmi);
drivers/media/i2c/adv748x/adv748x-hdmi.c
371
ret = adv748x_tx_power(hdmi->tx, enable);
drivers/media/i2c/adv748x/adv748x-hdmi.c
394
static int adv748x_hdmi_propagate_pixelrate(struct adv748x_hdmi *hdmi)
drivers/media/i2c/adv748x/adv748x-hdmi.c
399
tx = adv748x_get_remote_sd(&hdmi->pads[ADV748X_HDMI_SOURCE]);
drivers/media/i2c/adv748x/adv748x-hdmi.c
403
adv748x_hdmi_query_dv_timings(&hdmi->sd, 0, &timings);
drivers/media/i2c/adv748x/adv748x-hdmi.c
424
struct adv748x_hdmi *hdmi = adv748x_sd_to_hdmi(sd);
drivers/media/i2c/adv748x/adv748x-hdmi.c
435
adv748x_hdmi_fill_format(hdmi, &sdformat->format);
drivers/media/i2c/adv748x/adv748x-hdmi.c
436
adv748x_hdmi_propagate_pixelrate(hdmi);
drivers/media/i2c/adv748x/adv748x-hdmi.c
462
struct adv748x_hdmi *hdmi = adv748x_sd_to_hdmi(sd);
drivers/media/i2c/adv748x/adv748x-hdmi.c
466
if (!hdmi->edid.present)
drivers/media/i2c/adv748x/adv748x-hdmi.c
470
edid->blocks = hdmi->edid.blocks;
drivers/media/i2c/adv748x/adv748x-hdmi.c
474
if (edid->start_block >= hdmi->edid.blocks)
drivers/media/i2c/adv748x/adv748x-hdmi.c
477
if (edid->start_block + edid->blocks > hdmi->edid.blocks)
drivers/media/i2c/adv748x/adv748x-hdmi.c
478
edid->blocks = hdmi->edid.blocks - edid->start_block;
drivers/media/i2c/adv748x/adv748x-hdmi.c
480
memcpy(edid->edid, hdmi->edid.edid + edid->start_block * 128,
drivers/media/i2c/adv748x/adv748x-hdmi.c
486
static inline int adv748x_hdmi_edid_write_block(struct adv748x_hdmi *hdmi,
drivers/media/i2c/adv748x/adv748x-hdmi.c
489
struct adv748x_state *state = adv748x_hdmi_to_state(hdmi);
drivers/media/i2c/adv748x/adv748x-hdmi.c
512
struct adv748x_hdmi *hdmi = adv748x_sd_to_hdmi(sd);
drivers/media/i2c/adv748x/adv748x-hdmi.c
513
struct adv748x_state *state = adv748x_hdmi_to_state(hdmi);
drivers/media/i2c/adv748x/adv748x-hdmi.c
522
hdmi->edid.blocks = 0;
drivers/media/i2c/adv748x/adv748x-hdmi.c
523
hdmi->edid.present = 0;
drivers/media/i2c/adv748x/adv748x-hdmi.c
526
hdmi->aspect_ratio.numerator = 16;
drivers/media/i2c/adv748x/adv748x-hdmi.c
527
hdmi->aspect_ratio.denominator = 9;
drivers/media/i2c/adv748x/adv748x-hdmi.c
543
memcpy(hdmi->edid.edid, edid->edid, 128 * edid->blocks);
drivers/media/i2c/adv748x/adv748x-hdmi.c
544
hdmi->edid.blocks = edid->blocks;
drivers/media/i2c/adv748x/adv748x-hdmi.c
545
hdmi->edid.present = true;
drivers/media/i2c/adv748x/adv748x-hdmi.c
547
hdmi->aspect_ratio = v4l2_calc_aspect_ratio(edid->edid[0x15],
drivers/media/i2c/adv748x/adv748x-hdmi.c
550
err = adv748x_hdmi_edid_write_block(hdmi, 128 * edid->blocks,
drivers/media/i2c/adv748x/adv748x-hdmi.c
551
hdmi->edid.edid);
drivers/media/i2c/adv748x/adv748x-hdmi.c
632
struct adv748x_hdmi *hdmi = adv748x_ctrl_to_hdmi(ctrl);
drivers/media/i2c/adv748x/adv748x-hdmi.c
633
struct adv748x_state *state = adv748x_hdmi_to_state(hdmi);
drivers/media/i2c/adv748x/adv748x-hdmi.c
680
static int adv748x_hdmi_init_controls(struct adv748x_hdmi *hdmi)
drivers/media/i2c/adv748x/adv748x-hdmi.c
682
struct adv748x_state *state = adv748x_hdmi_to_state(hdmi);
drivers/media/i2c/adv748x/adv748x-hdmi.c
684
v4l2_ctrl_handler_init(&hdmi->ctrl_hdl, 5);
drivers/media/i2c/adv748x/adv748x-hdmi.c
687
hdmi->ctrl_hdl.lock = &state->mutex;
drivers/media/i2c/adv748x/adv748x-hdmi.c
689
v4l2_ctrl_new_std(&hdmi->ctrl_hdl, &adv748x_hdmi_ctrl_ops,
drivers/media/i2c/adv748x/adv748x-hdmi.c
692
v4l2_ctrl_new_std(&hdmi->ctrl_hdl, &adv748x_hdmi_ctrl_ops,
drivers/media/i2c/adv748x/adv748x-hdmi.c
695
v4l2_ctrl_new_std(&hdmi->ctrl_hdl, &adv748x_hdmi_ctrl_ops,
drivers/media/i2c/adv748x/adv748x-hdmi.c
698
v4l2_ctrl_new_std(&hdmi->ctrl_hdl, &adv748x_hdmi_ctrl_ops,
drivers/media/i2c/adv748x/adv748x-hdmi.c
707
v4l2_ctrl_new_std_menu_items(&hdmi->ctrl_hdl, &adv748x_hdmi_ctrl_ops,
drivers/media/i2c/adv748x/adv748x-hdmi.c
712
hdmi->sd.ctrl_handler = &hdmi->ctrl_hdl;
drivers/media/i2c/adv748x/adv748x-hdmi.c
713
if (hdmi->ctrl_hdl.error) {
drivers/media/i2c/adv748x/adv748x-hdmi.c
714
v4l2_ctrl_handler_free(&hdmi->ctrl_hdl);
drivers/media/i2c/adv748x/adv748x-hdmi.c
715
return hdmi->ctrl_hdl.error;
drivers/media/i2c/adv748x/adv748x-hdmi.c
718
return v4l2_ctrl_handler_setup(&hdmi->ctrl_hdl);
drivers/media/i2c/adv748x/adv748x-hdmi.c
721
int adv748x_hdmi_init(struct adv748x_hdmi *hdmi)
drivers/media/i2c/adv748x/adv748x-hdmi.c
723
struct adv748x_state *state = adv748x_hdmi_to_state(hdmi);
drivers/media/i2c/adv748x/adv748x-hdmi.c
727
adv748x_hdmi_s_dv_timings(&hdmi->sd, 0, &cea1280x720);
drivers/media/i2c/adv748x/adv748x-hdmi.c
730
hdmi->aspect_ratio.numerator = 16;
drivers/media/i2c/adv748x/adv748x-hdmi.c
731
hdmi->aspect_ratio.denominator = 9;
drivers/media/i2c/adv748x/adv748x-hdmi.c
733
adv748x_subdev_init(&hdmi->sd, state, &adv748x_ops_hdmi,
drivers/media/i2c/adv748x/adv748x-hdmi.c
736
hdmi->pads[ADV748X_HDMI_SINK].flags = MEDIA_PAD_FL_SINK;
drivers/media/i2c/adv748x/adv748x-hdmi.c
737
hdmi->pads[ADV748X_HDMI_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
drivers/media/i2c/adv748x/adv748x-hdmi.c
739
ret = media_entity_pads_init(&hdmi->sd.entity,
drivers/media/i2c/adv748x/adv748x-hdmi.c
740
ADV748X_HDMI_NR_PADS, hdmi->pads);
drivers/media/i2c/adv748x/adv748x-hdmi.c
744
ret = adv748x_hdmi_init_controls(hdmi);
drivers/media/i2c/adv748x/adv748x-hdmi.c
751
media_entity_cleanup(&hdmi->sd.entity);
drivers/media/i2c/adv748x/adv748x-hdmi.c
756
void adv748x_hdmi_cleanup(struct adv748x_hdmi *hdmi)
drivers/media/i2c/adv748x/adv748x-hdmi.c
758
v4l2_device_unregister_subdev(&hdmi->sd);
drivers/media/i2c/adv748x/adv748x-hdmi.c
759
media_entity_cleanup(&hdmi->sd.entity);
drivers/media/i2c/adv748x/adv748x-hdmi.c
760
v4l2_ctrl_handler_free(&hdmi->ctrl_hdl);
drivers/media/i2c/adv748x/adv748x-hdmi.c
90
static void adv748x_hdmi_fill_format(struct adv748x_hdmi *hdmi,
drivers/media/i2c/adv748x/adv748x-hdmi.c
96
fmt->field = hdmi->timings.bt.interlaced ?
drivers/media/i2c/adv748x/adv748x.h
193
struct adv748x_hdmi hdmi;
drivers/media/i2c/adv748x/adv748x.h
199
#define adv748x_hdmi_to_state(h) container_of(h, struct adv748x_state, hdmi)
drivers/media/i2c/adv748x/adv748x.h
440
int adv748x_hdmi_init(struct adv748x_hdmi *hdmi);
drivers/media/i2c/adv748x/adv748x.h
441
void adv748x_hdmi_cleanup(struct adv748x_hdmi *hdmi);
drivers/media/v4l2-core/v4l2-dv-timings.c
1228
DEBUGFS_FOPS(hdmi, V4L2_DEBUGFS_IF_HDMI);
drivers/media/v4l2-core/v4l2-dv-timings.c
895
const struct hdmi_vendor_infoframe *hdmi,
drivers/media/v4l2-core/v4l2-dv-timings.c
904
bool is_ce = avi->video_code || (hdmi && hdmi->vic);
drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
2079
ret = rk_hdptx_phy_verify_hdmi_config(hdptx, &opts->hdmi, &hdptx->hdmi_cfg);
drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
2131
return rk_hdptx_phy_verify_hdmi_config(hdptx, &opts->hdmi, NULL);
drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
2320
struct phy_configure_opts_hdmi hdmi = {
drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
2324
int ret = rk_hdptx_phy_verify_hdmi_config(hdptx, &hdmi, &hdptx->hdmi_cfg);
drivers/pinctrl/bcm/pinctrl-bcm281xx.c
445
BCM281XX_PIN_DESC(BCM281XX_PIN_HDMI_SCL, "hdmi_scl", hdmi),
drivers/pinctrl/bcm/pinctrl-bcm281xx.c
446
BCM281XX_PIN_DESC(BCM281XX_PIN_HDMI_SDA, "hdmi_sda", hdmi),
drivers/pinctrl/meson/pinctrl-meson8.c
1034
FUNCTION(hdmi),
drivers/pinctrl/meson/pinctrl-meson8b.c
884
FUNCTION(hdmi),
drivers/pinctrl/qcom/pinctrl-apq8064.c
488
APQ_PIN_FUNCTION(hdmi),
drivers/pinctrl/qcom/pinctrl-apq8064.c
573
PINGROUP(69, hdmi, NA, NA, NA, NA, NA, NA, NA, NA, NA),
drivers/pinctrl/qcom/pinctrl-apq8064.c
574
PINGROUP(70, hdmi, NA, NA, NA, NA, NA, NA, NA, NA, NA),
drivers/pinctrl/qcom/pinctrl-apq8064.c
575
PINGROUP(71, hdmi, NA, NA, NA, NA, NA, NA, NA, NA, NA),
drivers/pinctrl/qcom/pinctrl-apq8064.c
576
PINGROUP(72, hdmi, NA, NA, NA, NA, NA, NA, NA, NA, NA),
drivers/pinctrl/qcom/pinctrl-msm8660.c
750
MSM_PIN_FUNCTION(hdmi),
drivers/pinctrl/qcom/pinctrl-msm8660.c
942
PINGROUP(169, hdmi, _, _, _, _, _, _),
drivers/pinctrl/qcom/pinctrl-msm8660.c
943
PINGROUP(170, hdmi, _, _, _, _, _, _),
drivers/pinctrl/qcom/pinctrl-msm8660.c
944
PINGROUP(171, hdmi, _, _, _, _, _, _),
drivers/pinctrl/qcom/pinctrl-msm8660.c
945
PINGROUP(172, hdmi, _, _, _, _, _, _),
drivers/pinctrl/renesas/pfc-r8a7740.c
2612
SH_PFC_PIN_GROUP(hdmi),
drivers/pinctrl/renesas/pfc-r8a7740.c
3016
SH_PFC_FUNCTION(hdmi),
drivers/pinctrl/tegra/pinctrl-tegra186.c
1328
TEGRA_PIN_FUNCTION(hdmi),
drivers/pinctrl/tegra/pinctrl-tegra194.c
1246
TEGRA_PIN_FUNCTION(hdmi),
drivers/pinctrl/tegra/pinctrl-tegra20.c
1910
FUNCTION(hdmi),
drivers/pinctrl/tegra/pinctrl-tegra234.c
1323
TEGRA_PIN_FUNCTION(hdmi),
drivers/pinctrl/tegra/pinctrl-tegra30.c
2036
FUNCTION(hdmi),
drivers/platform/x86/dell/alienware-wmi-wmax.c
445
DEFINE_SIMPLE_SYSFS_GROUP_VISIBLE(hdmi);
drivers/platform/x86/dell/alienware-wmi-wmax.c
455
.is_visible = SYSFS_GROUP_VISIBLE(hdmi),
drivers/video/fbdev/omap2/omapfb/displays/connector-hdmi.c
111
in->ops.hdmi->disable(in);
drivers/video/fbdev/omap2/omapfb/displays/connector-hdmi.c
125
in->ops.hdmi->set_timings(in, timings);
drivers/video/fbdev/omap2/omapfb/displays/connector-hdmi.c
142
return in->ops.hdmi->check_timings(in, timings);
drivers/video/fbdev/omap2/omapfb/displays/connector-hdmi.c
151
return in->ops.hdmi->read_edid(in, edid, len);
drivers/video/fbdev/omap2/omapfb/displays/connector-hdmi.c
162
return in->ops.hdmi->detect(in);
drivers/video/fbdev/omap2/omapfb/displays/connector-hdmi.c
170
return in->ops.hdmi->set_hdmi_mode(in, hdmi_mode);
drivers/video/fbdev/omap2/omapfb/displays/connector-hdmi.c
179
return in->ops.hdmi->set_infoframe(in, avi);
drivers/video/fbdev/omap2/omapfb/displays/connector-hdmi.c
60
return in->ops.hdmi->connect(in, dssdev);
drivers/video/fbdev/omap2/omapfb/displays/connector-hdmi.c
73
in->ops.hdmi->disconnect(in, dssdev);
drivers/video/fbdev/omap2/omapfb/displays/connector-hdmi.c
90
in->ops.hdmi->set_timings(in, &ddata->timings);
drivers/video/fbdev/omap2/omapfb/displays/connector-hdmi.c
92
r = in->ops.hdmi->enable(in);
drivers/video/fbdev/omap2/omapfb/displays/encoder-tpd12s015.c
101
in->ops.hdmi->disable(in);
drivers/video/fbdev/omap2/omapfb/displays/encoder-tpd12s015.c
115
in->ops.hdmi->set_timings(in, timings);
drivers/video/fbdev/omap2/omapfb/displays/encoder-tpd12s015.c
133
r = in->ops.hdmi->check_timings(in, timings);
drivers/video/fbdev/omap2/omapfb/displays/encoder-tpd12s015.c
150
r = in->ops.hdmi->read_edid(in, edid, len);
drivers/video/fbdev/omap2/omapfb/displays/encoder-tpd12s015.c
170
return in->ops.hdmi->set_infoframe(in, avi);
drivers/video/fbdev/omap2/omapfb/displays/encoder-tpd12s015.c
179
return in->ops.hdmi->set_hdmi_mode(in, hdmi_mode);
drivers/video/fbdev/omap2/omapfb/displays/encoder-tpd12s015.c
265
dssdev->ops.hdmi = &tpd_hdmi_ops;
drivers/video/fbdev/omap2/omapfb/displays/encoder-tpd12s015.c
38
r = in->ops.hdmi->connect(in, dssdev);
drivers/video/fbdev/omap2/omapfb/displays/encoder-tpd12s015.c
70
in->ops.hdmi->disconnect(in, &ddata->dssdev);
drivers/video/fbdev/omap2/omapfb/displays/encoder-tpd12s015.c
82
in->ops.hdmi->set_timings(in, &ddata->timings);
drivers/video/fbdev/omap2/omapfb/displays/encoder-tpd12s015.c
84
r = in->ops.hdmi->enable(in);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
105
hdmi.vdda_reg = reg;
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
114
r = regulator_enable(hdmi.vdda_reg);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
125
hdmi.core_enabled = true;
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
130
regulator_disable(hdmi.vdda_reg);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
137
hdmi.core_enabled = false;
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
140
regulator_disable(hdmi.vdda_reg);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
147
struct omap_overlay_manager *mgr = hdmi.output.manager;
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
148
struct hdmi_wp_data *wp = &hdmi.wp;
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
159
p = &hdmi.cfg.timings;
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
163
hdmi_pll_compute(&hdmi.pll, p->pixelclock, &hdmi_cinfo);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
165
r = dss_pll_enable(&hdmi.pll.pll);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
171
r = dss_pll_set_config(&hdmi.pll.pll, &hdmi_cinfo);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
177
r = hdmi_phy_configure(&hdmi.phy, hdmi_cinfo.clkdco,
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
188
hdmi4_configure(&hdmi.core, &hdmi.wp, &hdmi.cfg);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
196
r = hdmi_wp_video_start(&hdmi.wp);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
210
hdmi_wp_video_stop(&hdmi.wp);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
212
hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
216
dss_pll_disable(&hdmi.pll.pll);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
224
struct omap_overlay_manager *mgr = hdmi.output.manager;
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
226
hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
230
hdmi_wp_video_stop(&hdmi.wp);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
232
hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
234
dss_pll_disable(&hdmi.pll.pll);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
242
struct omap_dss_device *out = &hdmi.output;
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
253
mutex_lock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
255
hdmi.cfg.timings = *timings;
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
259
mutex_unlock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
265
*timings = hdmi.cfg.timings;
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
270
mutex_lock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
273
mutex_unlock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
277
hdmi_wp_dump(&hdmi.wp, s);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
278
hdmi_pll_dump(&hdmi.pll, s);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
279
hdmi_phy_dump(&hdmi.phy, s);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
280
hdmi4_core_dump(&hdmi.core, s);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
283
mutex_unlock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
290
mutex_lock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
295
r = hdmi4_read_edid(&hdmi.core, buf, len);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
298
mutex_unlock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
317
struct omap_dss_device *out = &hdmi.output;
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
323
mutex_lock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
337
if (hdmi.audio_configured) {
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
338
r = hdmi4_audio_config(&hdmi.core, &hdmi.wp, &hdmi.audio_config,
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
339
hdmi.cfg.timings.pixelclock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
34
static struct omap_hdmi hdmi;
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
342
hdmi.audio_abort_cb(&hdmi.pdev->dev);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
343
hdmi.audio_configured = false;
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
347
spin_lock_irqsave(&hdmi.audio_playing_lock, flags);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
348
if (hdmi.audio_configured && hdmi.audio_playing)
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
349
hdmi_start_audio_stream(&hdmi);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
350
hdmi.display_enabled = true;
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
351
spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
353
mutex_unlock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
357
mutex_unlock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
367
mutex_lock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
369
spin_lock_irqsave(&hdmi.audio_playing_lock, flags);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
370
hdmi_stop_audio_stream(&hdmi);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
371
hdmi.display_enabled = false;
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
372
spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
376
mutex_unlock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
385
mutex_lock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
393
mutex_unlock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
397
mutex_unlock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
405
mutex_lock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
409
mutex_unlock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
42
r = pm_runtime_resume_and_get(&hdmi.pdev->dev);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
458
bool need_enable = !hdmi.core_enabled;
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
478
hdmi.cfg.infoframe = *avi;
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
485
hdmi.cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI;
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
507
struct omap_dss_device *out = &hdmi.output;
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
514
out->ops.hdmi = &hdmi_ops;
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
522
struct omap_dss_device *out = &hdmi.output;
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
537
r = hdmi_parse_lanes_of(pdev, ep, &hdmi.phy);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
55
r = pm_runtime_put_sync(&hdmi.pdev->dev);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
655
.audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi.wp),
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
659
hdmi.audio_pdev = platform_device_register_data(
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
663
return PTR_ERR_OR_ZERO(hdmi.audio_pdev);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
673
hdmi.pdev = pdev;
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
674
platform_set_drvdata(pdev, &hdmi);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
676
mutex_init(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
677
spin_lock_init(&hdmi.audio_playing_lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
685
r = hdmi_wp_init(pdev, &hdmi.wp);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
689
r = hdmi_pll_init(pdev, &hdmi.pll, &hdmi.wp);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
693
r = hdmi_phy_init(pdev, &hdmi.phy);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
697
r = hdmi4_core_init(pdev, &hdmi.core);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
710
IRQF_ONESHOT, "OMAP HDMI", &hdmi.wp);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
732
hdmi_pll_uninit(&hdmi.pll);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
740
if (hdmi.audio_pdev)
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
741
platform_device_unregister(hdmi.audio_pdev);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
745
hdmi_pll_uninit(&hdmi.pll);
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
94
if (hdmi.vdda_reg != NULL)
drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
97
reg = devm_regulator_get(&hdmi.pdev->dev, "vdda");
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
113
if (hdmi.vdda_reg != NULL)
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
116
reg = devm_regulator_get(&hdmi.pdev->dev, "vdda");
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
122
hdmi.vdda_reg = reg;
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
131
r = regulator_enable(hdmi.vdda_reg);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
142
hdmi.core_enabled = true;
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
147
regulator_disable(hdmi.vdda_reg);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
154
hdmi.core_enabled = false;
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
157
regulator_disable(hdmi.vdda_reg);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
164
struct omap_overlay_manager *mgr = hdmi.output.manager;
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
171
p = &hdmi.cfg.timings;
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
175
hdmi_pll_compute(&hdmi.pll, p->pixelclock, &hdmi_cinfo);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
178
hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
179
hdmi_wp_set_irqstatus(&hdmi.wp,
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
180
hdmi_wp_get_irqstatus(&hdmi.wp));
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
182
r = dss_pll_enable(&hdmi.pll.pll);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
188
r = dss_pll_set_config(&hdmi.pll.pll, &hdmi_cinfo);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
194
r = hdmi_phy_configure(&hdmi.phy, hdmi_cinfo.clkdco,
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
201
r = hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_LDOON);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
205
hdmi5_configure(&hdmi.core, &hdmi.wp, &hdmi.cfg);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
213
r = hdmi_wp_video_start(&hdmi.wp);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
221
hdmi_wp_set_irqenable(&hdmi.wp,
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
227
hdmi_wp_video_stop(&hdmi.wp);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
229
hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
233
dss_pll_disable(&hdmi.pll.pll);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
241
struct omap_overlay_manager *mgr = hdmi.output.manager;
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
243
hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
247
hdmi_wp_video_stop(&hdmi.wp);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
249
hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
251
dss_pll_disable(&hdmi.pll.pll);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
259
struct omap_dss_device *out = &hdmi.output;
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
274
mutex_lock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
276
hdmi.cfg.timings = *timings;
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
280
mutex_unlock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
286
*timings = hdmi.cfg.timings;
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
291
mutex_lock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
294
mutex_unlock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
298
hdmi_wp_dump(&hdmi.wp, s);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
299
hdmi_pll_dump(&hdmi.pll, s);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
300
hdmi_phy_dump(&hdmi.phy, s);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
301
hdmi5_core_dump(&hdmi.core, s);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
304
mutex_unlock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
312
mutex_lock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
317
idlemode = REG_GET(hdmi.wp.base, HDMI_WP_SYSCONFIG, 3, 2);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
319
REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
321
r = hdmi5_read_edid(&hdmi.core, buf, len);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
323
REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, idlemode, 3, 2);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
326
mutex_unlock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
333
REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
347
struct omap_dss_device *out = &hdmi.output;
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
353
mutex_lock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
367
if (hdmi.audio_configured) {
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
368
r = hdmi5_audio_config(&hdmi.core, &hdmi.wp, &hdmi.audio_config,
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
369
hdmi.cfg.timings.pixelclock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
372
hdmi.audio_abort_cb(&hdmi.pdev->dev);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
373
hdmi.audio_configured = false;
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
377
spin_lock_irqsave(&hdmi.audio_playing_lock, flags);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
378
if (hdmi.audio_configured && hdmi.audio_playing)
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
379
hdmi_start_audio_stream(&hdmi);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
38
static struct omap_hdmi hdmi;
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
380
hdmi.display_enabled = true;
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
381
spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
383
mutex_unlock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
387
mutex_unlock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
397
mutex_lock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
399
spin_lock_irqsave(&hdmi.audio_playing_lock, flags);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
400
hdmi_stop_audio_stream(&hdmi);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
401
hdmi.display_enabled = false;
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
402
spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
406
mutex_unlock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
415
mutex_lock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
423
mutex_unlock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
427
mutex_unlock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
435
mutex_lock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
439
mutex_unlock(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
46
r = pm_runtime_resume_and_get(&hdmi.pdev->dev);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
491
need_enable = hdmi.core_enabled == false;
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
510
hdmi.cfg.infoframe = *avi;
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
517
hdmi.cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI;
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
539
struct omap_dss_device *out = &hdmi.output;
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
546
out->ops.hdmi = &hdmi_ops;
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
554
struct omap_dss_device *out = &hdmi.output;
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
569
r = hdmi_parse_lanes_of(pdev, ep, &hdmi.phy);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
59
r = pm_runtime_put_sync(&hdmi.pdev->dev);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
688
.audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi.wp),
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
692
hdmi.audio_pdev = platform_device_register_data(
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
696
if (IS_ERR(hdmi.audio_pdev))
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
697
return PTR_ERR(hdmi.audio_pdev);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
700
hdmi.wp_idlemode =
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
701
REG_GET(hdmi.wp.base, HDMI_WP_SYSCONFIG, 3, 2);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
714
hdmi.pdev = pdev;
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
715
platform_set_drvdata(pdev, &hdmi);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
717
mutex_init(&hdmi.lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
718
spin_lock_init(&hdmi.audio_playing_lock);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
726
r = hdmi_wp_init(pdev, &hdmi.wp);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
730
r = hdmi_pll_init(pdev, &hdmi.pll, &hdmi.wp);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
734
r = hdmi_phy_init(pdev, &hdmi.phy);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
738
r = hdmi5_core_init(pdev, &hdmi.core);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
751
IRQF_ONESHOT, "OMAP HDMI", &hdmi.wp);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
773
hdmi_pll_uninit(&hdmi.pll);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
781
if (hdmi.audio_pdev)
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
782
platform_device_unregister(hdmi.audio_pdev);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
786
hdmi_pll_uninit(&hdmi.pll);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
88
v = hdmi_read_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
91
hdmi_write_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, v);
drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
98
REG_FLD_MOD(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, 0, 15, 15);
drivers/video/hdmi.c
1494
const struct hdmi_vendor_infoframe *hvf = &frame->hdmi;
drivers/video/hdmi.c
1726
struct hdmi_vendor_infoframe *hvf = &frame->hdmi;
drivers/video/hdmi.c
857
return hdmi_vendor_infoframe_check(&frame->hdmi);
drivers/video/hdmi.c
877
return hdmi_vendor_infoframe_pack_only(&frame->hdmi, buffer, size);
include/drm/bridge/dw_hdmi.h
116
int (*init)(struct dw_hdmi *hdmi, void *data,
include/drm/bridge/dw_hdmi.h
119
void (*disable)(struct dw_hdmi *hdmi, void *data);
include/drm/bridge/dw_hdmi.h
120
enum drm_connector_status (*read_hpd)(struct dw_hdmi *hdmi, void *data);
include/drm/bridge/dw_hdmi.h
121
void (*update_hpd)(struct dw_hdmi *hdmi, void *data,
include/drm/bridge/dw_hdmi.h
123
void (*setup_hpd)(struct dw_hdmi *hdmi, void *data);
include/drm/bridge/dw_hdmi.h
148
enum drm_mode_status (*mode_valid)(struct dw_hdmi *hdmi, void *data,
include/drm/bridge/dw_hdmi.h
159
void (*enable_audio)(struct dw_hdmi *hdmi, int channel,
include/drm/bridge/dw_hdmi.h
161
void (*disable_audio)(struct dw_hdmi *hdmi);
include/drm/bridge/dw_hdmi.h
173
int (*configure_phy)(struct dw_hdmi *hdmi, void *data,
include/drm/bridge/dw_hdmi.h
181
void dw_hdmi_remove(struct dw_hdmi *hdmi);
include/drm/bridge/dw_hdmi.h
182
void dw_hdmi_unbind(struct dw_hdmi *hdmi);
include/drm/bridge/dw_hdmi.h
187
void dw_hdmi_resume(struct dw_hdmi *hdmi);
include/drm/bridge/dw_hdmi.h
189
void dw_hdmi_setup_rx_sense(struct dw_hdmi *hdmi, bool hpd, bool rx_sense);
include/drm/bridge/dw_hdmi.h
191
int dw_hdmi_set_plugged_cb(struct dw_hdmi *hdmi, hdmi_codec_plugged_cb fn,
include/drm/bridge/dw_hdmi.h
193
void dw_hdmi_set_sample_non_pcm(struct dw_hdmi *hdmi, unsigned int non_pcm);
include/drm/bridge/dw_hdmi.h
194
void dw_hdmi_set_sample_iec958(struct dw_hdmi *hdmi, unsigned int iec958);
include/drm/bridge/dw_hdmi.h
195
void dw_hdmi_set_sample_width(struct dw_hdmi *hdmi, unsigned int width);
include/drm/bridge/dw_hdmi.h
196
void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate);
include/drm/bridge/dw_hdmi.h
197
void dw_hdmi_set_channel_count(struct dw_hdmi *hdmi, unsigned int cnt);
include/drm/bridge/dw_hdmi.h
198
void dw_hdmi_set_channel_status(struct dw_hdmi *hdmi, u8 *channel_status);
include/drm/bridge/dw_hdmi.h
199
void dw_hdmi_set_channel_allocation(struct dw_hdmi *hdmi, unsigned int ca);
include/drm/bridge/dw_hdmi.h
200
void dw_hdmi_audio_enable(struct dw_hdmi *hdmi);
include/drm/bridge/dw_hdmi.h
201
void dw_hdmi_audio_disable(struct dw_hdmi *hdmi);
include/drm/bridge/dw_hdmi.h
202
void dw_hdmi_set_high_tmds_clock_ratio(struct dw_hdmi *hdmi,
include/drm/bridge/dw_hdmi.h
206
void dw_hdmi_phy_i2c_set_addr(struct dw_hdmi *hdmi, u8 address);
include/drm/bridge/dw_hdmi.h
207
void dw_hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data,
include/drm/bridge/dw_hdmi.h
210
void dw_hdmi_phy_gen1_reset(struct dw_hdmi *hdmi);
include/drm/bridge/dw_hdmi.h
212
void dw_hdmi_phy_gen2_pddq(struct dw_hdmi *hdmi, u8 enable);
include/drm/bridge/dw_hdmi.h
213
void dw_hdmi_phy_gen2_txpwron(struct dw_hdmi *hdmi, u8 enable);
include/drm/bridge/dw_hdmi.h
214
void dw_hdmi_phy_gen2_reset(struct dw_hdmi *hdmi);
include/drm/bridge/dw_hdmi.h
216
enum drm_connector_status dw_hdmi_phy_read_hpd(struct dw_hdmi *hdmi,
include/drm/bridge/dw_hdmi.h
218
void dw_hdmi_phy_update_hpd(struct dw_hdmi *hdmi, void *data,
include/drm/bridge/dw_hdmi.h
220
void dw_hdmi_phy_setup_hpd(struct dw_hdmi *hdmi, void *data);
include/drm/bridge/dw_hdmi.h
222
bool dw_hdmi_bus_fmt_is_420(struct dw_hdmi *hdmi);
include/drm/bridge/dw_hdmi.h
224
const struct dw_hdmi_plat_data *dw_hdmi_to_plat_data(struct dw_hdmi *hdmi);
include/drm/bridge/dw_hdmi_qp.h
16
int (*init)(struct dw_hdmi_qp *hdmi, void *data);
include/drm/bridge/dw_hdmi_qp.h
17
void (*disable)(struct dw_hdmi_qp *hdmi, void *data);
include/drm/bridge/dw_hdmi_qp.h
18
enum drm_connector_status (*read_hpd)(struct dw_hdmi_qp *hdmi, void *data);
include/drm/bridge/dw_hdmi_qp.h
19
void (*setup_hpd)(struct dw_hdmi_qp *hdmi, void *data);
include/drm/bridge/dw_hdmi_qp.h
37
void dw_hdmi_qp_suspend(struct device *dev, struct dw_hdmi_qp *hdmi);
include/drm/bridge/dw_hdmi_qp.h
38
void dw_hdmi_qp_resume(struct device *dev, struct dw_hdmi_qp *hdmi);
include/drm/drm_connector.h
1037
struct drm_connector_hdmi_infoframe hdmi;
include/drm/drm_connector.h
1211
struct drm_connector_hdmi_state hdmi;
include/drm/drm_connector.h
1375
struct drm_connector_infoframe_funcs hdmi;
include/drm/drm_connector.h
2402
struct drm_connector_hdmi hdmi;
include/drm/drm_connector.h
855
struct drm_hdmi_info hdmi;
include/linux/hdmi.h
425
struct hdmi_vendor_infoframe hdmi;
include/linux/phy/phy.h
81
struct phy_configure_opts_hdmi hdmi;
include/media/v4l2-dv-timings.h
252
const struct hdmi_vendor_infoframe *hdmi,
include/video/omapfb_dss.h
655
const struct omapdss_hdmi_ops *hdmi;
sound/hda/codecs/hdmi/hdmi.c
483
struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
sound/hda/codecs/hdmi/hdmi_local.h
212
struct hdmi_audio_infoframe hdmi;
sound/hda/common/auto_parser.c
721
bool hdmi;
sound/hda/common/auto_parser.c
740
hdmi = is_hdmi_cfg(def_conf);
sound/hda/common/auto_parser.c
741
name = hdmi ? "HDMI" : "SPDIF";
sound/hda/common/auto_parser.c
749
if (hdmi == is_hdmi_cfg(c))
sound/pci/oxygen/xonar.h
48
void xonar_hdmi_resume(struct oxygen *chip, struct xonar_hdmi *hdmi);
sound/pci/oxygen/xonar.h
51
void xonar_set_hdmi_params(struct oxygen *chip, struct xonar_hdmi *hdmi,
sound/pci/oxygen/xonar_hdmi.c
100
hdmi->params[3] = 0;
sound/pci/oxygen/xonar_hdmi.c
102
hdmi->params[3] = 0xc0;
sound/pci/oxygen/xonar_hdmi.c
103
hdmi->params[4] = 1; /* ? */
sound/pci/oxygen/xonar_hdmi.c
104
hdmi_write_command(chip, 0x54, 5, hdmi->params);
sound/pci/oxygen/xonar_hdmi.c
37
struct xonar_hdmi *hdmi)
sound/pci/oxygen/xonar_hdmi.c
46
hdmi_write_command(chip, 0x54, 5, hdmi->params);
sound/pci/oxygen/xonar_hdmi.c
49
void xonar_hdmi_init(struct oxygen *chip, struct xonar_hdmi *hdmi)
sound/pci/oxygen/xonar_hdmi.c
51
hdmi->params[1] = IEC958_AES3_CON_FS_48000;
sound/pci/oxygen/xonar_hdmi.c
52
hdmi->params[4] = 1;
sound/pci/oxygen/xonar_hdmi.c
53
xonar_hdmi_init_commands(chip, hdmi);
sound/pci/oxygen/xonar_hdmi.c
63
void xonar_hdmi_resume(struct oxygen *chip, struct xonar_hdmi *hdmi)
sound/pci/oxygen/xonar_hdmi.c
65
xonar_hdmi_init_commands(chip, hdmi);
sound/pci/oxygen/xonar_hdmi.c
80
void xonar_set_hdmi_params(struct oxygen *chip, struct xonar_hdmi *hdmi,
sound/pci/oxygen/xonar_hdmi.c
83
hdmi->params[0] = 0; /* 1 = non-audio */
sound/pci/oxygen/xonar_hdmi.c
86
hdmi->params[1] = IEC958_AES3_CON_FS_44100;
sound/pci/oxygen/xonar_hdmi.c
89
hdmi->params[1] = IEC958_AES3_CON_FS_48000;
sound/pci/oxygen/xonar_hdmi.c
92
hdmi->params[1] = IEC958_AES3_CON_FS_96000;
sound/pci/oxygen/xonar_hdmi.c
95
hdmi->params[1] = IEC958_AES3_CON_FS_192000;
sound/pci/oxygen/xonar_hdmi.c
98
hdmi->params[2] = params_channels(params) / 2 - 1;
sound/pci/oxygen/xonar_pcm179x.c
228
struct xonar_hdmi hdmi;
sound/pci/oxygen/xonar_pcm179x.c
393
xonar_hdmi_init(chip, &data->hdmi);
sound/pci/oxygen/xonar_pcm179x.c
583
xonar_hdmi_resume(chip, &data->hdmi);
sound/pci/oxygen/xonar_pcm179x.c
722
xonar_set_hdmi_params(chip, &data->hdmi, params);
sound/pci/oxygen/xonar_wm87x6.c
299
xonar_hdmi_init(chip, &data->hdmi);
sound/pci/oxygen/xonar_wm87x6.c
342
xonar_hdmi_resume(chip, &data->hdmi);
sound/pci/oxygen/xonar_wm87x6.c
388
xonar_set_hdmi_params(chip, &data->hdmi, params);
sound/pci/oxygen/xonar_wm87x6.c
87
struct xonar_hdmi hdmi;
sound/soc/codecs/hdac_hdmi.c
1016
list_for_each_entry(cvt, &hdmi->cvt_list, head) {
sound/soc/codecs/hdac_hdmi.c
1039
struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev);
sound/soc/codecs/hdac_hdmi.c
1042
int mux_index = hdmi->num_cvt + hdmi->num_ports;
sound/soc/codecs/hdac_hdmi.c
1045
for (i = 0; i < hdmi->num_ports; i++) {
sound/soc/codecs/hdac_hdmi.c
1048
for (j = 0; j < hdmi->num_cvt; j++) {
sound/soc/codecs/hdac_hdmi.c
1084
struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev);
sound/soc/codecs/hdac_hdmi.c
1085
struct snd_soc_dai_driver *dai_drv = hdmi->dai_drv;
sound/soc/codecs/hdac_hdmi.c
1091
if (list_empty(&hdmi->cvt_list) || list_empty(&hdmi->pin_list))
sound/soc/codecs/hdac_hdmi.c
1095
((2 * hdmi->num_ports) + hdmi->num_cvt)),
sound/soc/codecs/hdac_hdmi.c
1102
list_for_each_entry(cvt, &hdmi->cvt_list, head) {
sound/soc/codecs/hdac_hdmi.c
1114
list_for_each_entry(pin, &hdmi->pin_list, head) {
sound/soc/codecs/hdac_hdmi.c
1132
list_for_each_entry(pin, &hdmi->pin_list, head) {
sound/soc/codecs/hdac_hdmi.c
1144
num_routes += hdmi->num_cvt;
sound/soc/codecs/hdac_hdmi.c
1158
list_for_each_entry(pin, &hdmi->pin_list, head) {
sound/soc/codecs/hdac_hdmi.c
1160
int sink_index = i + hdmi->num_cvt;
sound/soc/codecs/hdac_hdmi.c
1162
hdmi->num_pin;
sound/soc/codecs/hdac_hdmi.c
1174
((2 * hdmi->num_ports) + hdmi->num_cvt));
sound/soc/codecs/hdac_hdmi.c
1185
struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev);
sound/soc/codecs/hdac_hdmi.c
1190
if (list_empty(&hdmi->cvt_list))
sound/soc/codecs/hdac_hdmi.c
1193
list_for_each_entry(cvt, &hdmi->cvt_list, head) {
sound/soc/codecs/hdac_hdmi.c
1194
dai_map = &hdmi->dai_map[dai_id];
sound/soc/codecs/hdac_hdmi.c
1212
struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev);
sound/soc/codecs/hdac_hdmi.c
1226
list_add_tail(&cvt->head, &hdmi->cvt_list);
sound/soc/codecs/hdac_hdmi.c
1227
hdmi->num_cvt++;
sound/soc/codecs/hdac_hdmi.c
1264
struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev);
sound/soc/codecs/hdac_hdmi.c
1270
if (!hdmi)
sound/soc/codecs/hdac_hdmi.c
1277
mutex_lock(&hdmi->pin_mutex);
sound/soc/codecs/hdac_hdmi.c
1323
mutex_unlock(&hdmi->pin_mutex);
sound/soc/codecs/hdac_hdmi.c
1337
mutex_unlock(&hdmi->pin_mutex);
sound/soc/codecs/hdac_hdmi.c
1340
snd_ctl_notify(hdmi->card,
sound/soc/codecs/hdac_hdmi.c
1375
struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev);
sound/soc/codecs/hdac_hdmi.c
1390
list_add_tail(&pin->head, &hdmi->pin_list);
sound/soc/codecs/hdac_hdmi.c
1391
hdmi->num_pin++;
sound/soc/codecs/hdac_hdmi.c
1392
hdmi->num_ports += pin->num_ports;
sound/soc/codecs/hdac_hdmi.c
1407
struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev);
sound/soc/codecs/hdac_hdmi.c
1408
unsigned int vendor_nid = hdmi->drv_data->vendor_nid;
sound/soc/codecs/hdac_hdmi.c
1425
struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev);
sound/soc/codecs/hdac_hdmi.c
1426
unsigned int vendor_nid = hdmi->drv_data->vendor_nid;
sound/soc/codecs/hdac_hdmi.c
143
hdac_hdmi_get_pcm_from_cvt(struct hdac_hdmi_priv *hdmi,
sound/soc/codecs/hdac_hdmi.c
1455
struct hdac_hdmi_priv *hdmi, int num_dais)
sound/soc/codecs/hdac_hdmi.c
1472
list_for_each_entry(cvt, &hdmi->cvt_list, head) {
sound/soc/codecs/hdac_hdmi.c
148
list_for_each_entry(pcm, &hdmi->pcm_list, head) {
sound/soc/codecs/hdac_hdmi.c
1513
hdmi->dai_drv = hdmi_dais;
sound/soc/codecs/hdac_hdmi.c
1527
struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev);
sound/soc/codecs/hdac_hdmi.c
1565
if (!hdmi->num_pin || !hdmi->num_cvt) {
sound/soc/codecs/hdac_hdmi.c
1571
ret = hdac_hdmi_create_dais(hdev, dais, hdmi, hdmi->num_cvt);
sound/soc/codecs/hdac_hdmi.c
1578
*num_dais = hdmi->num_cvt;
sound/soc/codecs/hdac_hdmi.c
1594
struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev);
sound/soc/codecs/hdac_hdmi.c
1597
struct snd_soc_component *component = hdmi->component;
sound/soc/codecs/hdac_hdmi.c
1619
list_for_each_entry(pin, &hdmi->pin_list, head) {
sound/soc/codecs/hdac_hdmi.c
1650
struct hdac_hdmi_priv *hdmi, bool detect_pin_caps)
sound/soc/codecs/hdac_hdmi.c
1655
list_for_each_entry(pin, &hdmi->pin_list, head) {
sound/soc/codecs/hdac_hdmi.c
1675
struct hdac_hdmi_priv *hdmi = snd_soc_component_get_drvdata(component);
sound/soc/codecs/hdac_hdmi.c
1676
struct hdac_device *hdev = hdmi->hdev;
sound/soc/codecs/hdac_hdmi.c
1681
hdmi->component = component;
sound/soc/codecs/hdac_hdmi.c
1706
hdac_hdmi_present_sense_all_pins(hdev, hdmi, true);
sound/soc/codecs/hdac_hdmi.c
1708
hdmi->card = component->card->snd_card;
sound/soc/codecs/hdac_hdmi.c
1734
struct hdac_hdmi_priv *hdmi = snd_soc_component_get_drvdata(component);
sound/soc/codecs/hdac_hdmi.c
1735
struct hdac_device *hdev = hdmi->hdev;
sound/soc/codecs/hdac_hdmi.c
1749
struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev);
sound/soc/codecs/hdac_hdmi.c
1765
hdac_hdmi_present_sense_all_pins(hdev, hdmi, false);
sound/soc/codecs/hdac_hdmi.c
1779
struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev);
sound/soc/codecs/hdac_hdmi.c
1780
struct hdac_hdmi_pcm *pcm = get_hdmi_pcm_from_id(hdmi, pcm_idx);
sound/soc/codecs/hdac_hdmi.c
1788
struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev);
sound/soc/codecs/hdac_hdmi.c
1789
struct hdac_hdmi_pcm *pcm = get_hdmi_pcm_from_id(hdmi, pcm_idx);
sound/soc/codecs/hdac_hdmi.c
1809
struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev);
sound/soc/codecs/hdac_hdmi.c
1810
struct hdac_hdmi_pcm *pcm = get_hdmi_pcm_from_id(hdmi, pcm_idx);
sound/soc/codecs/hdac_hdmi.c
1823
struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev);
sound/soc/codecs/hdac_hdmi.c
1824
struct hdac_hdmi_pcm *pcm = get_hdmi_pcm_from_id(hdmi, pcm_idx);
sound/soc/codecs/hdac_hdmi.c
1920
struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev);
sound/soc/codecs/hdac_hdmi.c
1924
list_for_each_entry(pin, &hdmi->pin_list, head)
sound/soc/codecs/hdac_hdmi.c
281
static struct hdac_hdmi_pcm *get_hdmi_pcm_from_id(struct hdac_hdmi_priv *hdmi,
sound/soc/codecs/hdac_hdmi.c
286
list_for_each_entry(pcm, &hdmi->pcm_list, head) {
sound/soc/codecs/hdac_hdmi.c
362
struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev);
sound/soc/codecs/hdac_hdmi.c
375
hdmi->chmap.ops.set_channel_count(hdev, cvt->nid, channels);
sound/soc/codecs/hdac_hdmi.c
377
snd_hdac_setup_channel_mapping(&hdmi->chmap, pin->nid, false, ca,
sound/soc/codecs/hdac_hdmi.c
441
struct hdac_hdmi_priv *hdmi = snd_soc_dai_get_drvdata(dai);
sound/soc/codecs/hdac_hdmi.c
442
struct hdac_device *hdev = hdmi->hdev;
sound/soc/codecs/hdac_hdmi.c
454
dai_map = &hdmi->dai_map[dai->id];
sound/soc/codecs/hdac_hdmi.c
456
pcm = hdac_hdmi_get_pcm_from_cvt(hdmi, dai_map->cvt);
sound/soc/codecs/hdac_hdmi.c
467
struct hdac_hdmi_priv *hdmi = snd_soc_dai_get_drvdata(dai);
sound/soc/codecs/hdac_hdmi.c
473
dai_map = &hdmi->dai_map[dai->id];
sound/soc/codecs/hdac_hdmi.c
479
pcm = hdac_hdmi_get_pcm_from_cvt(hdmi, dai_map->cvt);
sound/soc/codecs/hdac_hdmi.c
527
struct hdac_hdmi_priv *hdmi,
sound/soc/codecs/hdac_hdmi.c
534
list_for_each_entry(pcm, &hdmi->pcm_list, head) {
sound/soc/codecs/hdac_hdmi.c
566
struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev);
sound/soc/codecs/hdac_hdmi.c
571
list_for_each_entry(cvt, &hdmi->cvt_list, head) {
sound/soc/codecs/hdac_hdmi.c
572
port = hdac_hdmi_get_port_from_cvt(hdev, hdmi, cvt);
sound/soc/codecs/hdac_hdmi.c
591
struct hdac_hdmi_priv *hdmi = snd_soc_dai_get_drvdata(dai);
sound/soc/codecs/hdac_hdmi.c
592
struct hdac_device *hdev = hdmi->hdev;
sound/soc/codecs/hdac_hdmi.c
598
dai_map = &hdmi->dai_map[dai->id];
sound/soc/codecs/hdac_hdmi.c
601
port = hdac_hdmi_get_port_from_cvt(hdev, hdmi, cvt);
sound/soc/codecs/hdac_hdmi.c
634
struct hdac_hdmi_priv *hdmi = snd_soc_dai_get_drvdata(dai);
sound/soc/codecs/hdac_hdmi.c
638
dai_map = &hdmi->dai_map[dai->id];
sound/soc/codecs/hdac_hdmi.c
640
pcm = hdac_hdmi_get_pcm_from_cvt(hdmi, dai_map->cvt);
sound/soc/codecs/hdac_hdmi.c
658
struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev);
sound/soc/codecs/hdac_hdmi.c
667
if (chans > hdmi->chmap.channels_max)
sound/soc/codecs/hdac_hdmi.c
668
hdmi->chmap.channels_max = chans;
sound/soc/codecs/hdac_hdmi.c
721
struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev);
sound/soc/codecs/hdac_hdmi.c
725
list_for_each_entry(pcm, &hdmi->pcm_list, head) {
sound/soc/codecs/hdac_hdmi.c
820
struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev);
sound/soc/codecs/hdac_hdmi.c
826
pcm = hdac_hdmi_get_pcm_from_cvt(hdmi, cvt);
sound/soc/codecs/hdac_hdmi.c
912
struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev);
sound/soc/codecs/hdac_hdmi.c
925
mutex_lock(&hdmi->pin_mutex);
sound/soc/codecs/hdac_hdmi.c
926
list_for_each_entry(pcm, &hdmi->pcm_list, head) {
sound/soc/codecs/hdac_hdmi.c
943
list_for_each_entry(pcm, &hdmi->pcm_list, head) {
sound/soc/codecs/hdac_hdmi.c
948
mutex_unlock(&hdmi->pin_mutex);
sound/soc/codecs/hdac_hdmi.c
953
mutex_unlock(&hdmi->pin_mutex);
sound/soc/codecs/hdac_hdmi.c
972
struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev);
sound/soc/codecs/hdac_hdmi.c
982
int num_items = hdmi->num_cvt + 1;
sound/soc/intel/boards/skl_hda_dsp_generic.c
129
ctx->hdmi.idisp_codec = true;
sound/soc/intel/boards/skl_hda_dsp_generic.c
94
if (strstr(link->stream_name, "HDMI") && !ctx->hdmi.idisp_codec)
sound/soc/intel/boards/sof_board_helpers.c
18
ctx->hdmi.hdmi_comp = dai->component;
sound/soc/intel/boards/sof_board_helpers.c
30
if (!ctx->hdmi.idisp_codec)
sound/soc/intel/boards/sof_board_helpers.c
33
if (!ctx->hdmi.hdmi_comp)
sound/soc/intel/boards/sof_board_helpers.c
36
return hda_dsp_hdmi_build_controls(card, ctx->hdmi.hdmi_comp);
sound/soc/intel/boards/sof_board_helpers.c
633
ctx->hdmi.idisp_codec);
sound/soc/intel/boards/sof_board_helpers.h
135
struct sof_hdmi_private hdmi;
sound/soc/intel/boards/sof_cs42l42.c
233
ctx->hdmi.idisp_codec = true;
sound/soc/intel/boards/sof_da7219.c
312
ctx->hdmi.idisp_codec = true;
sound/soc/intel/boards/sof_nau8825.c
252
ctx->hdmi.idisp_codec = true;
sound/soc/intel/boards/sof_rt5682.c
681
ctx->hdmi.idisp_codec = true;
sound/soc/intel/boards/sof_sdw.c
1151
if (intel_ctx->hdmi.idisp_codec) {
sound/soc/intel/boards/sof_sdw.c
1310
intel_ctx->hdmi.idisp_codec = true;
sound/soc/intel/boards/sof_sdw.c
1337
intel_ctx->hdmi.idisp_codec ? hdmi_num : 0, bt_num);
sound/soc/intel/boards/sof_sdw.c
1427
if (intel_ctx->hdmi.idisp_codec)
sound/soc/intel/boards/sof_sdw.c
1440
if (strstr(link->stream_name, "HDMI") && !intel_ctx->hdmi.idisp_codec)
sound/soc/intel/boards/sof_sdw_common.h
56
struct sof_hdmi_private hdmi;
sound/soc/intel/boards/sof_sdw_hdmi.c
26
intel_ctx->hdmi.hdmi_comp = dai->component;
sound/soc/intel/boards/sof_sdw_hdmi.c
36
if (!intel_ctx->hdmi.idisp_codec)
sound/soc/intel/boards/sof_sdw_hdmi.c
39
if (!intel_ctx->hdmi.hdmi_comp)
sound/soc/intel/boards/sof_sdw_hdmi.c
42
return hda_dsp_hdmi_build_controls(card, intel_ctx->hdmi.hdmi_comp);
sound/soc/intel/boards/sof_ssp_amp.c
133
ctx->hdmi.idisp_codec = true;
sound/soc/qcom/qdsp6/q6afe-dai.c
406
&dai_data->port_config[dai->id].hdmi);
sound/soc/qcom/qdsp6/q6afe-dai.c
73
struct q6afe_hdmi_cfg *hdmi = &dai_data->port_config[dai->id].hdmi;
sound/soc/qcom/qdsp6/q6afe-dai.c
76
hdmi->sample_rate = params_rate(params);
sound/soc/qcom/qdsp6/q6afe-dai.c
79
hdmi->bit_width = 16;
sound/soc/qcom/qdsp6/q6afe-dai.c
82
hdmi->bit_width = 24;
sound/soc/qcom/qdsp6/q6afe-dai.c
90
hdmi->channel_allocation = (u16) ret;
sound/soc/qcom/qdsp6/q6afe.h
239
struct q6afe_hdmi_cfg hdmi;
sound/soc/rockchip/rockchip_max98090.c
212
SND_SOC_DAILINK_DEFS(hdmi,
sound/soc/rockchip/rockchip_max98090.c
264
SND_SOC_DAILINK_REG(hdmi),
sound/soc/rockchip/rockchip_max98090.c
287
SND_SOC_DAILINK_REG(hdmi),
sound/soc/samsung/tm2_wm5110.c
443
SND_SOC_DAILINK_DEFS(hdmi,
sound/soc/samsung/tm2_wm5110.c
477
SND_SOC_DAILINK_REG(hdmi),