drivers/gpu/drm/arm/hdlcd_crtc.c

110

hdlcd_write(hdlcd, HDLCD_REG_PIXEL_FORMAT, (btpp - 1) << 3);

drivers/gpu/drm/arm/hdlcd_crtc.c

122

hdlcd_write(hdlcd, HDLCD_REG_RED_SELECT, format->red.offset |

drivers/gpu/drm/arm/hdlcd_crtc.c

127

hdlcd_write(hdlcd, HDLCD_REG_GREEN_SELECT, format->green.offset |

drivers/gpu/drm/arm/hdlcd_crtc.c

129

hdlcd_write(hdlcd, HDLCD_REG_BLUE_SELECT, format->blue.offset |

drivers/gpu/drm/arm/hdlcd_crtc.c

157

hdlcd_write(hdlcd, HDLCD_REG_BUS_OPTIONS,

drivers/gpu/drm/arm/hdlcd_crtc.c

160

hdlcd_write(hdlcd, HDLCD_REG_V_DATA, m->crtc_vdisplay - 1);

drivers/gpu/drm/arm/hdlcd_crtc.c

161

hdlcd_write(hdlcd, HDLCD_REG_V_BACK_PORCH, vm.vback_porch - 1);

drivers/gpu/drm/arm/hdlcd_crtc.c

162

hdlcd_write(hdlcd, HDLCD_REG_V_FRONT_PORCH, vm.vfront_porch - 1);

drivers/gpu/drm/arm/hdlcd_crtc.c

163

hdlcd_write(hdlcd, HDLCD_REG_V_SYNC, vm.vsync_len - 1);

drivers/gpu/drm/arm/hdlcd_crtc.c

164

hdlcd_write(hdlcd, HDLCD_REG_H_DATA, m->crtc_hdisplay - 1);

drivers/gpu/drm/arm/hdlcd_crtc.c

165

hdlcd_write(hdlcd, HDLCD_REG_H_BACK_PORCH, vm.hback_porch - 1);

drivers/gpu/drm/arm/hdlcd_crtc.c

166

hdlcd_write(hdlcd, HDLCD_REG_H_FRONT_PORCH, vm.hfront_porch - 1);

drivers/gpu/drm/arm/hdlcd_crtc.c

167

hdlcd_write(hdlcd, HDLCD_REG_H_SYNC, vm.hsync_len - 1);

drivers/gpu/drm/arm/hdlcd_crtc.c

168

hdlcd_write(hdlcd, HDLCD_REG_POLARITIES, polarities);

drivers/gpu/drm/arm/hdlcd_crtc.c

184

hdlcd_write(hdlcd, HDLCD_REG_COMMAND, 1);

drivers/gpu/drm/arm/hdlcd_crtc.c

194

hdlcd_write(hdlcd, HDLCD_REG_COMMAND, 0);

drivers/gpu/drm/arm/hdlcd_crtc.c

286

hdlcd_write(hdlcd, HDLCD_REG_FB_LINE_LENGTH, fb->pitches[0]);

drivers/gpu/drm/arm/hdlcd_crtc.c

287

hdlcd_write(hdlcd, HDLCD_REG_FB_LINE_PITCH, fb->pitches[0]);

drivers/gpu/drm/arm/hdlcd_crtc.c

288

hdlcd_write(hdlcd, HDLCD_REG_FB_LINE_COUNT, dest_h - 1);

drivers/gpu/drm/arm/hdlcd_crtc.c

289

hdlcd_write(hdlcd, HDLCD_REG_FB_BASE, scanout_start);

drivers/gpu/drm/arm/hdlcd_crtc.c

44

hdlcd_write(hdlcd, HDLCD_REG_COMMAND, 0);

drivers/gpu/drm/arm/hdlcd_crtc.c

53

hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, mask | HDLCD_INTERRUPT_VSYNC);

drivers/gpu/drm/arm/hdlcd_crtc.c

63

hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, mask & ~HDLCD_INTERRUPT_VSYNC);

drivers/gpu/drm/arm/hdlcd_drv.c

289

hdlcd_write(hdlcd, HDLCD_REG_COMMAND, 0);

drivers/gpu/drm/arm/hdlcd_drv.c

68

hdlcd_write(hdlcd, HDLCD_REG_INT_CLEAR, irq_status);

drivers/gpu/drm/arm/hdlcd_drv.c

78

hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, 0);

drivers/gpu/drm/arm/hdlcd_drv.c

79

hdlcd_write(hdlcd, HDLCD_REG_INT_CLEAR, ~0);

drivers/gpu/drm/arm/hdlcd_drv.c

87

hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, HDLCD_DEBUG_INT_MASK);

drivers/gpu/drm/arm/hdlcd_drv.c

96

hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, 0);