hclge_write_dev
hclge_write_dev(&hdev->hw, HCLGE_PF_OTHER_INT_REG, reg_val);
hclge_write_dev(&hdev->hw, HCLGE_MISC_RESET_STS_REG, regclr);
hclge_write_dev(&hdev->hw, HCLGE_VECTOR0_CMDQ_SRC_REG, regclr);
hclge_write_dev(&hdev->hw, HCLGE_PF_OTHER_INT_REG, reg_val);
hclge_write_dev(&hdev->hw, HCLGE_PF_OTHER_INT_REG, reg_val);
hclge_write_dev(&hdev->hw, HCLGE_PF_OTHER_INT_REG, val);
hclge_write_dev(&hdev->hw, HCLGE_GLOBAL_RESET_REG, val);
hclge_write_dev(&hdev->hw, HCLGE_MISC_RESET_STS_REG,
hclge_write_dev(&hdev->hw, HCLGE_COMM_NIC_CSQ_DEPTH_REG, reg_val);
hclge_write_dev(&hdev->hw, HCLGE_PF_OTHER_INT_REG,
hclge_write_dev(&hdev->hw, HCLGE_RXD_ADV_LAYOUT_EN_REG, 1);
hclge_write_dev(&hdev->hw, HCLGE_RXD_ADV_LAYOUT_EN_REG, 0);
hclge_write_dev(&hdev->hw, HCLGE_COMM_NIC_CRQ_HEAD_REG,