ADC3XXX_REG
#define ADC3XXX_BCLK_N_DIV ADC3XXX_REG(0, 30)
#define ADC3XXX_INTERFACE_CTRL_3 ADC3XXX_REG(0, 31)
#define ADC3XXX_INTERFACE_CTRL_4 ADC3XXX_REG(0, 32)
#define ADC3XXX_INTERFACE_CTRL_5 ADC3XXX_REG(0, 33)
#define ADC3XXX_I2S_SYNC ADC3XXX_REG(0, 34)
#define ADC3XXX_ADC_FLAG ADC3XXX_REG(0, 36)
#define ADC3XXX_CH_OFFSET_2 ADC3XXX_REG(0, 37)
#define ADC3XXX_I2S_TDM_CTRL ADC3XXX_REG(0, 38)
#define ADC3XXX_INTR_FLAG_1 ADC3XXX_REG(0, 42)
#define ADC3XXX_INTR_FLAG_2 ADC3XXX_REG(0, 43)
#define ADC3XXX_INTR_FLAG_ADC1 ADC3XXX_REG(0, 45)
#define ADC3XXX_INTR_FLAG_ADC2 ADC3XXX_REG(0, 47)
#define ADC3XXX_INT1_CTRL ADC3XXX_REG(0, 48)
#define ADC3XXX_INT2_CTRL ADC3XXX_REG(0, 49)
#define ADC3XXX_GPIO2_CTRL ADC3XXX_REG(0, 51)
#define ADC3XXX_GPIO1_CTRL ADC3XXX_REG(0, 52)
#define ADC3XXX_DOUT_CTRL ADC3XXX_REG(0, 53)
#define ADC3XXX_SYNC_CTRL_1 ADC3XXX_REG(0, 57)
#define ADC3XXX_SYNC_CTRL_2 ADC3XXX_REG(0, 58)
#define ADC3XXX_CIC_GAIN_CTRL ADC3XXX_REG(0, 59)
#define ADC3XXX_PRB_SELECT ADC3XXX_REG(0, 61)
#define ADC3XXX_INST_MODE_CTRL ADC3XXX_REG(0, 62)
#define ADC3XXX_MIC_POLARITY_CTRL ADC3XXX_REG(0, 80)
#define ADC3XXX_ADC_DIGITAL ADC3XXX_REG(0, 81)
#define ADC3XXX_ADC_FGA ADC3XXX_REG(0, 82)
#define ADC3XXX_LADC_VOL ADC3XXX_REG(0, 83)
#define ADC3XXX_RADC_VOL ADC3XXX_REG(0, 84)
#define ADC3XXX_ADC_PHASE_COMP ADC3XXX_REG(0, 85)
#define ADC3XXX_LEFT_CHN_AGC_1 ADC3XXX_REG(0, 86)
#define ADC3XXX_LEFT_CHN_AGC_2 ADC3XXX_REG(0, 87)
#define ADC3XXX_LEFT_CHN_AGC_3 ADC3XXX_REG(0, 88)
#define ADC3XXX_LEFT_CHN_AGC_4 ADC3XXX_REG(0, 89)
#define ADC3XXX_LEFT_CHN_AGC_5 ADC3XXX_REG(0, 90)
#define ADC3XXX_LEFT_CHN_AGC_6 ADC3XXX_REG(0, 91)
#define ADC3XXX_LEFT_CHN_AGC_7 ADC3XXX_REG(0, 92)
#define ADC3XXX_LEFT_AGC_GAIN ADC3XXX_REG(0, 93)
#define ADC3XXX_RIGHT_CHN_AGC_1 ADC3XXX_REG(0, 94)
#define ADC3XXX_RIGHT_CHN_AGC_2 ADC3XXX_REG(0, 95)
#define ADC3XXX_RIGHT_CHN_AGC_3 ADC3XXX_REG(0, 96)
#define ADC3XXX_RIGHT_CHN_AGC_4 ADC3XXX_REG(0, 97)
#define ADC3XXX_RIGHT_CHN_AGC_5 ADC3XXX_REG(0, 98)
#define ADC3XXX_RIGHT_CHN_AGC_6 ADC3XXX_REG(0, 99)
#define ADC3XXX_RIGHT_CHN_AGC_7 ADC3XXX_REG(0, 100)
#define ADC3XXX_RIGHT_AGC_GAIN ADC3XXX_REG(0, 101)
#define ADC3XXX_DITHER_CTRL ADC3XXX_REG(1, 26)
#define ADC3XXX_MICBIAS_CTRL ADC3XXX_REG(1, 51)
#define ADC3XXX_LEFT_PGA_SEL_1 ADC3XXX_REG(1, 52)
#define ADC3XXX_LEFT_PGA_SEL_2 ADC3XXX_REG(1, 54)
#define ADC3XXX_RIGHT_PGA_SEL_1 ADC3XXX_REG(1, 55)
#define ADC3XXX_RIGHT_PGA_SEL_2 ADC3XXX_REG(1, 57)
#define ADC3XXX_LEFT_APGA_CTRL ADC3XXX_REG(1, 59)
#define ADC3XXX_RIGHT_APGA_CTRL ADC3XXX_REG(1, 60)
#define ADC3XXX_LOW_CURRENT_MODES ADC3XXX_REG(1, 61)
#define ADC3XXX_ANALOG_PGA_FLAGS ADC3XXX_REG(1, 62)
#define ADC3XXX_LEFT_ADC_IIR_COEFF_N0_MSB ADC3XXX_REG(4, 8)
#define ADC3XXX_LEFT_ADC_IIR_COEFF_N0_LSB ADC3XXX_REG(4, 9)
#define ADC3XXX_LEFT_ADC_IIR_COEFF_N1_MSB ADC3XXX_REG(4, 10)
#define ADC3XXX_LEFT_ADC_IIR_COEFF_N1_LSB ADC3XXX_REG(4, 11)
#define ADC3XXX_LEFT_ADC_IIR_COEFF_D1_MSB ADC3XXX_REG(4, 12)
#define ADC3XXX_LEFT_ADC_IIR_COEFF_D1_LSB ADC3XXX_REG(4, 13)
#define ADC3XXX_RIGHT_ADC_IIR_COEFF_N0_MSB ADC3XXX_REG(4, 72)
#define ADC3XXX_RIGHT_ADC_IIR_COEFF_N0_LSB ADC3XXX_REG(4, 73)
#define ADC3XXX_RIGHT_ADC_IIR_COEFF_N1_MSB ADC3XXX_REG(4, 74)
#define ADC3XXX_RIGHT_ADC_IIR_COEFF_N1_LSB ADC3XXX_REG(4, 75)
#define ADC3XXX_RIGHT_ADC_IIR_COEFF_D1_MSB ADC3XXX_REG(4, 76)
#define ADC3XXX_RIGHT_ADC_IIR_COEFF_D1_LSB ADC3XXX_REG(4, 77)
#define ADC3XXX_PAGE_SELECT ADC3XXX_REG(0, 0)
#define ADC3XXX_RESET ADC3XXX_REG(0, 1)
#define ADC3XXX_CLKGEN_MUX ADC3XXX_REG(0, 4)
#define ADC3XXX_PLL_PROG_PR ADC3XXX_REG(0, 5)
#define ADC3XXX_PLL_PROG_J ADC3XXX_REG(0, 6)
#define ADC3XXX_PLL_PROG_D_MSB ADC3XXX_REG(0, 7)
#define ADC3XXX_PLL_PROG_D_LSB ADC3XXX_REG(0, 8)
#define ADC3XXX_ADC_NADC ADC3XXX_REG(0, 18)
#define ADC3XXX_ADC_MADC ADC3XXX_REG(0, 19)
#define ADC3XXX_ADC_AOSR ADC3XXX_REG(0, 20)
#define ADC3XXX_ADC_IADC ADC3XXX_REG(0, 21)
#define ADC3XXX_CLKOUT_MUX ADC3XXX_REG(0, 25)
#define ADC3XXX_CLKOUT_M_DIV ADC3XXX_REG(0, 26)
#define ADC3XXX_INTERFACE_CTRL_1 ADC3XXX_REG(0, 27)
#define ADC3XXX_CH_OFFSET_1 ADC3XXX_REG(0, 28)
#define ADC3XXX_INTERFACE_CTRL_2 ADC3XXX_REG(0, 29)