hisi_clk_register_gate
ret = hisi_clk_register_gate(hi3519_gate_clks,
ret = hisi_clk_register_gate(hi3559av100_gate_clks,
ret = hisi_clk_register_gate(hi3559av100_shub_gate_clks,
hisi_clk_register_gate(hi3660_pmu_gate_clks,
hisi_clk_register_gate(hi3660_pctrl_gate_clks,
hisi_clk_register_gate(hi3660_sctrl_gate_clks,
hisi_clk_register_gate(hi3660_crgctrl_gate_clks,
hisi_clk_register_gate(hi3670_crgctrl_gate_clks,
hisi_clk_register_gate(hi3670_pctrl_gate_clks,
hisi_clk_register_gate(hi3670_pmu_gate_clks,
hisi_clk_register_gate(hi3670_sctrl_gate_clks,
hisi_clk_register_gate(hi3670_iomcu_gate_sep_clks,
hisi_clk_register_gate(hi3670_media1_gate_clks,
hisi_clk_register_gate(hi6220_gate_clks_power,
hisi_clk_register_gate(hix5hd2_gate_clks,
EXPORT_SYMBOL_GPL(hisi_clk_register_gate);
int hisi_clk_register_gate(const struct hisi_gate_clock *,
ret = hisi_clk_register_gate(hi3516cv300_gate_clks,
ret = hisi_clk_register_gate(hi3798cv200_gate_clks,
ret = hisi_clk_register_gate(hi3798cv200_sysctrl_gate_clks,