hinfc_write
hinfc_write(host, host->dma_buffer, HINFC504_DMA_ADDR_DATA);
hinfc_write(host, host->dma_oob, HINFC504_DMA_ADDR_OOB);
hinfc_write(host, ((mtd->oobsize & HINFC504_DMA_LEN_OOB_MASK)
hinfc_write(host, HINFC504_DMA_PARA_DATA_RW_EN
hinfc_write(host, HINFC504_DMA_PARA_OOB_RW_EN
hinfc_write(host, HINFC504_DMA_PARA_DATA_RW_EN
hinfc_write(host, val, HINFC504_DMA_CTRL);
hinfc_write(host, host->addr_value[0], HINFC504_ADDRL);
hinfc_write(host, host->addr_value[1], HINFC504_ADDRH);
hinfc_write(host, NAND_CMD_PAGEPROG << 8 | NAND_CMD_SEQIN,
hinfc_write(host, host->addr_value[0], HINFC504_ADDRL);
hinfc_write(host, host->addr_value[1], HINFC504_ADDRH);
hinfc_write(host, NAND_CMD_READSTART << 8 | NAND_CMD_READ0,
hinfc_write(host, 0, HINFC504_LOG_READ_ADDR);
hinfc_write(host, mtd->writesize + mtd->oobsize,
hinfc_write(host, host->addr_value[0], HINFC504_ADDRL);
hinfc_write(host, (NAND_CMD_ERASE2 << 8) | NAND_CMD_ERASE1,
hinfc_write(host, HINFC504_OP_WAIT_READY_EN
hinfc_write(host, HINFC504_NANDINFO_LEN, HINFC504_DATA_NUM);
hinfc_write(host, NAND_CMD_READID, HINFC504_CMD);
hinfc_write(host, 0, HINFC504_ADDRL);
hinfc_write(host, HINFC504_OP_CMD1_EN | HINFC504_OP_ADDR_EN
hinfc_write(host, HINFC504_NANDINFO_LEN, HINFC504_DATA_NUM);
hinfc_write(host, NAND_CMD_STATUS, HINFC504_CMD);
hinfc_write(host, HINFC504_OP_CMD1_EN
hinfc_write(host, NAND_CMD_RESET, HINFC504_CMD);
hinfc_write(host, HINFC504_OP_CMD1_EN
hinfc_write(host,
hinfc_write(host, flag, HINFC504_CON);
hinfc_write(host, HINFC504_INTCLR_DMA, HINFC504_INTCLR);
hinfc_write(host, HINFC504_INTCLR_CE, HINFC504_INTCLR);
hinfc_write(host, HINFC504_INTCLR_UE, HINFC504_INTCLR);
hinfc_write(host, flag, HINFC504_CON);
hinfc_write(host, SET_HINFC504_PWIDTH(HINFC504_W_LATCH,
hinfc_write(host, HINFC504_INTEN_DMA, HINFC504_INTEN);
hinfc_write(host, flag, HINFC504_CON);
hinfc_write(host, flag | HINFC504_INTEN_UE | HINFC504_INTEN_CE,
hinfc_write(host, flag, HINFC504_CON);
hinfc_write(host, SET_HINFC504_PWIDTH(HINFC504_W_LATCH,