drivers/gpu/drm/hisilicon/hibmc/dp/dp_aux.c

129

struct hibmc_dp_dev *dp = dp_priv->dp_dev;

drivers/gpu/drm/hisilicon/hibmc/dp/dp_aux.c

21

static inline void hibmc_dp_aux_reset(struct hibmc_dp_dev *dp)

drivers/gpu/drm/hisilicon/hibmc/dp/dp_aux.c

28

static void hibmc_dp_aux_read_data(struct hibmc_dp_dev *dp, u8 *buf, u8 size)

drivers/gpu/drm/hisilicon/hibmc/dp/dp_aux.c

46

static void hibmc_dp_aux_write_data(struct hibmc_dp_dev *dp, u8 *buf, u8 size)

drivers/gpu/drm/hisilicon/hibmc/dp/dp_aux.c

81

static int hibmc_dp_aux_parse_xfer(struct hibmc_dp_dev *dp, struct drm_dp_aux_msg *msg)

drivers/gpu/drm/hisilicon/hibmc/dp/dp_comm.h

68

int hibmc_dp_link_training(struct hibmc_dp_dev *dp);

drivers/gpu/drm/hisilicon/hibmc/dp/dp_comm.h

69

int hibmc_dp_serdes_init(struct hibmc_dp_dev *dp);

drivers/gpu/drm/hisilicon/hibmc/dp/dp_comm.h

70

int hibmc_dp_serdes_rate_switch(u8 rate, struct hibmc_dp_dev *dp);

drivers/gpu/drm/hisilicon/hibmc/dp/dp_comm.h

71

int hibmc_dp_serdes_set_tx_cfg(struct hibmc_dp_dev *dp, u8 train_set[HIBMC_DP_LANE_NUM_MAX]);

drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c

12

static void hibmc_dp_set_tu(struct hibmc_dp_dev *dp, struct drm_display_mode *mode)

drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c

157

struct hibmc_dp_dev *dp_dev;

drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c

160

dp_dev = devm_kzalloc(drm_dev->dev, sizeof(struct hibmc_dp_dev), GFP_KERNEL);

drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c

200

struct hibmc_dp_dev *dp_dev = dp->dp_dev;

drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c

207

struct hibmc_dp_dev *dp_dev = dp->dp_dev;

drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c

215

struct hibmc_dp_dev *dp_dev = dp->dp_dev;

drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c

230

struct hibmc_dp_dev *dp_dev = dp->dp_dev;

drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c

249

struct hibmc_dp_dev *dp_dev = dp->dp_dev;

drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c

297

struct hibmc_dp_dev *dp_dev = dp->dp_dev;

drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c

48

static void hibmc_dp_set_sst(struct hibmc_dp_dev *dp, struct drm_display_mode *mode)

drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c

81

static void hibmc_dp_link_cfg(struct hibmc_dp_dev *dp, struct drm_display_mode *mode)

drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.h

15

struct hibmc_dp_dev;

drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.h

50

struct hibmc_dp_dev *dp_dev;

drivers/gpu/drm/hisilicon/hibmc/dp/dp_link.c

108

static int hibmc_dp_link_training_cr_pre(struct hibmc_dp_dev *dp)

drivers/gpu/drm/hisilicon/hibmc/dp/dp_link.c

12

static inline int hibmc_dp_get_serdes_rate_cfg(struct hibmc_dp_dev *dp)

drivers/gpu/drm/hisilicon/hibmc/dp/dp_link.c

138

static bool hibmc_dp_link_get_adjust_train(struct hibmc_dp_dev *dp,

drivers/gpu/drm/hisilicon/hibmc/dp/dp_link.c

156

static int hibmc_dp_link_reduce_rate(struct hibmc_dp_dev *dp)

drivers/gpu/drm/hisilicon/hibmc/dp/dp_link.c

181

static inline int hibmc_dp_link_reduce_lane(struct hibmc_dp_dev *dp)

drivers/gpu/drm/hisilicon/hibmc/dp/dp_link.c

198

static int hibmc_dp_link_training_cr(struct hibmc_dp_dev *dp)

drivers/gpu/drm/hisilicon/hibmc/dp/dp_link.c

255

static int hibmc_dp_link_training_channel_eq(struct hibmc_dp_dev *dp)

drivers/gpu/drm/hisilicon/hibmc/dp/dp_link.c

28

static int hibmc_dp_link_training_configure(struct hibmc_dp_dev *dp)

drivers/gpu/drm/hisilicon/hibmc/dp/dp_link.c

310

static int hibmc_dp_link_downgrade_training_cr(struct hibmc_dp_dev *dp)

drivers/gpu/drm/hisilicon/hibmc/dp/dp_link.c

318

static int hibmc_dp_link_downgrade_training_eq(struct hibmc_dp_dev *dp)

drivers/gpu/drm/hisilicon/hibmc/dp/dp_link.c

328

static void hibmc_dp_update_caps(struct hibmc_dp_dev *dp)

drivers/gpu/drm/hisilicon/hibmc/dp/dp_link.c

339

int hibmc_dp_link_training(struct hibmc_dp_dev *dp)

drivers/gpu/drm/hisilicon/hibmc/dp/dp_link.c

63

static int hibmc_dp_link_set_pattern(struct hibmc_dp_dev *dp, int pattern)

drivers/gpu/drm/hisilicon/hibmc/dp/dp_serdes.c

11

int hibmc_dp_serdes_set_tx_cfg(struct hibmc_dp_dev *dp, u8 train_set[HIBMC_DP_LANE_NUM_MAX])

drivers/gpu/drm/hisilicon/hibmc/dp/dp_serdes.c

42

int hibmc_dp_serdes_rate_switch(u8 rate, struct hibmc_dp_dev *dp)

drivers/gpu/drm/hisilicon/hibmc/dp/dp_serdes.c

61

int hibmc_dp_serdes_init(struct hibmc_dp_dev *dp)

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_dp.c

36

static bool hibmc_dp_get_dpcd(struct hibmc_dp_dev *dp_dev)

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_dp.c

61

struct hibmc_dp_dev *dp_dev = dp->dp_dev;