drivers/clk/ux500/reset-prcc.c

44

return CLKRST3_INDEX;

drivers/clk/ux500/u8500_of_clk.c

403

clk = clk_reg_prcc_pclk("p3_pclk0", "per3clk", bases[CLKRST3_INDEX],

drivers/clk/ux500/u8500_of_clk.c

407

clk = clk_reg_prcc_pclk("p3_pclk1", "per3clk", bases[CLKRST3_INDEX],

drivers/clk/ux500/u8500_of_clk.c

411

clk = clk_reg_prcc_pclk("p3_pclk2", "per3clk", bases[CLKRST3_INDEX],

drivers/clk/ux500/u8500_of_clk.c

415

clk = clk_reg_prcc_pclk("p3_pclk3", "per3clk", bases[CLKRST3_INDEX],

drivers/clk/ux500/u8500_of_clk.c

419

clk = clk_reg_prcc_pclk("p3_pclk4", "per3clk", bases[CLKRST3_INDEX],

drivers/clk/ux500/u8500_of_clk.c

423

clk = clk_reg_prcc_pclk("p3_pclk5", "per3clk", bases[CLKRST3_INDEX],

drivers/clk/ux500/u8500_of_clk.c

427

clk = clk_reg_prcc_pclk("p3_pclk6", "per3clk", bases[CLKRST3_INDEX],

drivers/clk/ux500/u8500_of_clk.c

431

clk = clk_reg_prcc_pclk("p3_pclk7", "per3clk", bases[CLKRST3_INDEX],

drivers/clk/ux500/u8500_of_clk.c

435

clk = clk_reg_prcc_pclk("p3_pclk8", "per3clk", bases[CLKRST3_INDEX],

drivers/clk/ux500/u8500_of_clk.c

562

bases[CLKRST3_INDEX], BIT(1), CLK_SET_RATE_GATE);

drivers/clk/ux500/u8500_of_clk.c

566

bases[CLKRST3_INDEX], BIT(2), CLK_SET_RATE_GATE);

drivers/clk/ux500/u8500_of_clk.c

570

bases[CLKRST3_INDEX], BIT(3), CLK_SET_RATE_GATE);

drivers/clk/ux500/u8500_of_clk.c

574

bases[CLKRST3_INDEX], BIT(4), CLK_SET_RATE_GATE);

drivers/clk/ux500/u8500_of_clk.c

578

bases[CLKRST3_INDEX], BIT(5), CLK_SET_RATE_GATE);

drivers/clk/ux500/u8500_of_clk.c

582

bases[CLKRST3_INDEX], BIT(6), CLK_SET_RATE_GATE);

drivers/clk/ux500/u8500_of_clk.c

586

bases[CLKRST3_INDEX], BIT(7), CLK_SET_RATE_GATE);