hdsp_write
hdsp_write (hdsp, HDSP_resetPointer, 0);
hdsp_write (hdsp, HDSP_freqReg, hdsp->dds_value);
hdsp_write(s, HDSP_controlRegister, s->control_register);
hdsp_write(s, HDSP_controlRegister, s->control_register);
hdsp_write(s, HDSP_controlRegister, s->control_register);
hdsp_write(hdsp, HDSP_freqReg, hdsp->dds_value);
hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
hdsp_write(hdsp, HDSP_midiDataOut1, val);
hdsp_write(hdsp, HDSP_midiDataOut0, val);
hdsp_write(hmidi->hdsp, HDSP_controlRegister, hmidi->hdsp->control_register);
hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register |= val);
hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
hdsp_write(hdsp, HDSP_inputEnable + (4 * (hdsp->max_channels + channel)), enable);
hdsp_write(hdsp, HDSP_inputBufferAddress, hdsp->capture_dma_buf.addr);
hdsp_write(hdsp, HDSP_outputBufferAddress, hdsp->playback_dma_buf.addr);
hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
hdsp_write(hdsp, HDSP_interruptConfirmation, 0);
hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register |= hdsp->creg_spdif_stream);
hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
hdsp_write (hdsp, HDSP_inputEnable + (4 * i), 1);
hdsp_write (hdsp, HDSP_outputEnable + (4 * i), 1);
hdsp_write (hdsp, HDSP_controlRegister, hdsp->control_register);
hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_PROGRAM);
hdsp_write (hdsp, HDSP_fifoData, 0);
hdsp_write(hdsp, HDSP_control2Reg, HDSP_S200);
hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_LOAD);
hdsp_write(hdsp, HDSP_fifoData, cache[i]);
hdsp_write(hdsp, HDSP_control2Reg, HDSP_S200);
hdsp_write(hdsp, HDSP_control2Reg, HDSP_S200);
hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
hdsp_write(hdsp, HDSP_control2Reg, HDSP_S_LOAD);
hdsp_write(hdsp, HDSP_fifoData, 0);
hdsp_write(hdsp, HDSP_control2Reg, HDSP_S300);
hdsp_write(hdsp, HDSP_control2Reg, HDSP_S_LOAD);
hdsp_write(hdsp, HDSP_control2Reg, HDSP_S200 | HDSP_PROGRAM);
hdsp_write (hdsp, HDSP_fifoData, 0);
hdsp_write(hdsp, HDSP_control2Reg, HDSP_S_LOAD);
hdsp_write(hdsp, HDSP_fifoData, 0);
hdsp_write(hdsp, HDSP_control2Reg, HDSP_S300);
hdsp_write(hdsp, HDSP_control2Reg, HDSP_S_LOAD);
hdsp_write(hdsp, HDSP_fifoData, 0);
hdsp_write(hdsp, HDSP_control2Reg, HDSP_S300);
hdsp_write(hdsp, HDSP_control2Reg, HDSP_S_LOAD);
hdsp_write(hdsp, HDSP_fifoData, 0);
hdsp_write (hdsp, 4096 + (ad*4),
hdsp_write (hdsp, HDSP_fifoData, ad);