hdmi_write
hdmi_write(audio, inputclkfs, HDMI_AUD_INPUTCLKFS);
hdmi_write(audio, conf0, HDMI_AUD_CONF0);
hdmi_write(audio, conf1, HDMI_AUD_CONF1);
hdmi_write(audio, HDMI_AUD_CONF0_SW_RESET, HDMI_AUD_CONF0);
hdmi_write(audio, (u8)~HDMI_MC_SWRSTZ_I2SSWRST_REQ, HDMI_MC_SWRSTZ);
hdmi_write(hdmi, REG_HDMI_CTRL, ctrl);
hdmi_write(hdmi, REG_HDMI_CTRL, ctrl);
hdmi_write(hdmi, REG_HDMI_ACR_PKT_CTRL, acr_pkt_ctrl);
hdmi_write(hdmi, REG_HDMI_VBI_PKT_CTRL, vbi_pkt_ctrl);
hdmi_write(hdmi, REG_HDMI_AUDIO_PKT_CTRL1, aud_pkt_ctrl);
hdmi_write(hdmi, REG_HDMI_AUD_INT,
hdmi_write(hdmi, REG_HDMI_AUDIO_CFG, audio_config);
hdmi_write(hdmi, REG_HDMI_ACR_0(select - 1),
hdmi_write(hdmi, REG_HDMI_ACR_1(select - 1),
hdmi_write(hdmi, REG_HDMI_AUDIO_PKT_CTRL2,
hdmi_write(hdmi, REG_HDMI_GC, 0);
hdmi_write(hdmi, REG_HDMI_GEN_PKT_CTRL, val);
hdmi_write(hdmi, REG_HDMI_GEN_PKT_CTRL, val);
hdmi_write(hdmi, REG_HDMI_AVI_INFO(i), buf[i]);
hdmi_write(hdmi, REG_HDMI_INFOFRAME_CTRL0, val);
hdmi_write(hdmi, REG_HDMI_INFOFRAME_CTRL1, val);
hdmi_write(hdmi, REG_HDMI_AUDIO_INFO0,
hdmi_write(hdmi, REG_HDMI_AUDIO_INFO1,
hdmi_write(hdmi, REG_HDMI_INFOFRAME_CTRL0, val);
hdmi_write(hdmi, REG_HDMI_GENERIC1_HDR,
hdmi_write(hdmi, REG_HDMI_GENERIC1(i), buf[i]);
hdmi_write(hdmi, REG_HDMI_GEN_PKT_CTRL, val);
hdmi_write(hdmi, REG_HDMI_GENERIC0_HDR,
hdmi_write(hdmi, REG_HDMI_GENERIC0(i), buf[i]);
hdmi_write(hdmi, REG_HDMI_GEN_PKT_CTRL, val);
hdmi_write(hdmi, REG_HDMI_TOTAL,
hdmi_write(hdmi, REG_HDMI_ACTIVE_HSYNC,
hdmi_write(hdmi, REG_HDMI_ACTIVE_VSYNC,
hdmi_write(hdmi, REG_HDMI_VSYNC_TOTAL_F2,
hdmi_write(hdmi, REG_HDMI_VSYNC_ACTIVE_F2,
hdmi_write(hdmi, REG_HDMI_VSYNC_TOTAL_F2,
hdmi_write(hdmi, REG_HDMI_VSYNC_ACTIVE_F2,
hdmi_write(hdmi, REG_HDMI_FRAME_CTRL, frame_ctrl);
hdmi_write(hdmi, REG_HDMI_CTRL, hdmi_ctrl | HDMI_CTRL_ENABLE);
hdmi_write(hdmi, REG_HDMI_CTRL, hdmi_ctrl);
hdmi_write(hdmi, REG_HDMI_INFOFRAME_CTRL0, val);
hdmi_write(hdmi, REG_HDMI_INFOFRAME_CTRL1, val);
hdmi_write(hdmi, REG_HDMI_INFOFRAME_CTRL0, val);
hdmi_write(hdmi, REG_HDMI_INFOFRAME_CTRL1, val);
hdmi_write(hdmi, REG_HDMI_CTRL, reg_val);
hdmi_write(hdmi, REG_HDMI_HPD_CTRL, reg_val);
hdmi_write(hdmi, REG_HDMI_HDCP_INT_CTRL, 0);
hdmi_write(hdmi, REG_HDMI_HDCP_RESET,
hdmi_write(hdmi, REG_HDMI_HDCP_CTRL, 0);
hdmi_write(hdmi, REG_HDMI_CTRL, reg_val);
hdmi_write(hdmi, REG_HDMI_HPD_CTRL, reg_val);
hdmi_write(hdmi, preg[i], pdata[i]);
hdmi_write(hdmi, REG_HDMI_HDCP_INT_CTRL, reg_val);
hdmi_write(hdmi, REG_HDMI_HDCP_DDC_CTRL_0,
hdmi_write(hdmi, REG_HDMI_HDCP_DDC_CTRL_1, reg_val);
hdmi_write(hdmi, REG_HDMI_HDCP_DDC_CTRL_0, 0);
hdmi_write(hdmi, REG_HDMI_DDC_CTRL, reg_val);
hdmi_write(hdmi, REG_HDMI_DDC_CTRL, reg_val);
hdmi_write(hdmi, REG_HDMI_DDC_CTRL, reg_val);
hdmi_write(hdmi, REG_HDMI_DDC_CTRL, reg_val);
hdmi_write(hdmi, REG_HDMI_HPD_CTRL, reg_val);
hdmi_write(hdmi, REG_HDMI_HDCP_INT_CTRL, 0);
hdmi_write(hdmi, REG_HDMI_HDCP_RESET,
hdmi_write(hdmi, REG_HDMI_HDCP_CTRL, 0);
hdmi_write(hdmi, REG_HDMI_HPD_CTRL, reg_val);
hdmi_write(hdmi, REG_HDMI_CTRL, reg_val);
hdmi_write(hdmi, REG_HDMI_DDC_ARBITRATION, reg_val);
hdmi_write(hdmi, REG_HDMI_HDCP_SW_LOWER_AKSV, hdcp_ctrl->aksv_lsb);
hdmi_write(hdmi, REG_HDMI_HDCP_SW_UPPER_AKSV, hdcp_ctrl->aksv_msb);
hdmi_write(hdmi, REG_HDMI_HDCP_ENTROPY_CTRL0, 0xB1FFB0FF);
hdmi_write(hdmi, REG_HDMI_HDCP_ENTROPY_CTRL1, 0xF00DFACE);
hdmi_write(hdmi, REG_HDMI_HDCP_DEBUG_CTRL, reg_val);
hdmi_write(hdmi, REG_HDMI_HDCP_CTRL, HDMI_HDCP_CTRL_ENABLE);
hdmi_write(hdmi, REG_HDMI_CTRL, reg_val);
hdmi_write(hdmi, REG_HDMI_DDC_ARBITRATION, reg_val);
hdmi_write(hdmi, REG_HDMI_CTRL, reg_val);
hdmi_write(hdmi, REG_HDMI_HDCP_RCVPORT_DATA4, 0);
hdmi_write(hdmi, REG_HDMI_HDCP_INT_CTRL,
hdmi_write(hdmi, REG_HDMI_HDCP_RCVPORT_DATA2_0,
hdmi_write(hdmi, REG_HDMI_HDCP_CTRL,
hdmi_write(hdmi, REG_HDMI_HPD_CTRL,
hdmi_write(hdmi, REG_HDMI_HPD_CTRL,
hdmi_write(hdmi, REG_HDMI_HPD_INT_CTRL, 0);
hdmi_write(hdmi, REG_HDMI_HPD_INT_CTRL,
hdmi_write(hdmi, REG_HDMI_HPD_INT_CTRL, hpd_int_ctrl);
hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
hdmi_write(hdmi, REG_HDMI_USEC_REFTIMER, 0x0001001b);
hdmi_write(hdmi, REG_HDMI_HPD_INT_CTRL,
hdmi_write(hdmi, REG_HDMI_DDC_DATA, ddc_data);
hdmi_write(hdmi, REG_HDMI_DDC_DATA, ddc_data);
hdmi_write(hdmi, REG_HDMI_I2C_TRANSACTION(i), i2c_trans);
hdmi_write(hdmi, REG_HDMI_DDC_CTRL,
hdmi_write(hdmi, REG_HDMI_DDC_DATA, ddc_data);
hdmi_write(hdmi, REG_HDMI_DDC_CTRL,
hdmi_write(hdmi, REG_HDMI_DDC_CTRL,
hdmi_write(hdmi, REG_HDMI_DDC_SPEED,
hdmi_write(hdmi, REG_HDMI_DDC_SETUP,
hdmi_write(hdmi, REG_HDMI_DDC_REF,
hdmi_write(hdmi, REG_HDMI_DDC_INT_CTRL,
hdmi_write(hdmi, REG_HDMI_DDC_INT_CTRL,
hdmi_write(hdmi, audio_cfg, HDMI_AUDIO_CFG);
hdmi_write(hdmi, HDMI_SAMPLE_FLAT_ALL, HDMI_SAMPLE_FLAT_MASK);
hdmi_write(hdmi, HDMI_SAMPLE_FLAT_NO, HDMI_SAMPLE_FLAT_MASK);
hdmi_write(hdmi, HDMI_DEFAULT_INT, HDMI_INT_EN);
hdmi_write(hdmi, hdmi->irq_status, HDMI_INT_CLR);
hdmi_write(hdmi, xmin, HDMI_ACTIVE_VID_XMIN);
hdmi_write(hdmi, xmax, HDMI_ACTIVE_VID_XMAX);
hdmi_write(hdmi, ymin, HDMI_ACTIVE_VID_YMIN);
hdmi_write(hdmi, ymax, HDMI_ACTIVE_VID_YMAX);
hdmi_write(hdmi, conf, HDMI_CFG);
hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
hdmi_write(hdmi, 0x0, head_offset);
hdmi_write(hdmi, 0x0, pack_offset + i);
hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
hdmi_write(hdmi, val, HDMI_CFG);
hdmi_write(hdmi, val, HDMI_CFG);
hdmi_write(hdmi, val, HDMI_CFG);
hdmi_write(hdmi, 0xffffffff, HDMI_INT_CLR);
hdmi_write(hdmi, 0x0000, HDMI_DFLT_CHL0_DAT);
hdmi_write(hdmi, 0x0000, HDMI_DFLT_CHL1_DAT);
hdmi_write(hdmi, 0x0060, HDMI_DFLT_CHL2_DAT);
hdmi_write(hdmi, n, HDMI_AUDN);
hdmi_write(hdmi, audio_cfg, HDMI_AUDIO_CFG);
hdmi_write(hdmi, HDMI_WORKING_INT, HDMI_INT_EN);
void hdmi_write(struct sti_hdmi *hdmi, u32 val, int offset);
hdmi_write(hdmi, (pllctrl | PLL_CFG_EN), HDMI_SRZ_PLL_CFG);
hdmi_write(hdmi, val, HDMI_SRZ_CFG);
hdmi_write(hdmi, val, HDMI_SRZ_ICNTL);
hdmi_write(hdmi, val, HDMI_SRZ_CALCODE_EXT);
hdmi_write(hdmi, val, HDMI_SRZ_CFG);
hdmi_write(hdmi, 0x0, HDMI_SRZ_ICNTL);
hdmi_write(hdmi, 0x0, HDMI_SRZ_CALCODE_EXT);
hdmi_write(hdmi, val, HDMI_SRZ_CFG);
hdmi_write(hdmi, 0, HDMI_SRZ_PLL_CFG);
hdmi_write(sd, 0x01, enable ? 0x00 : 0x78);
hdmi_write(sd, 0x83, enable ? 0xfe : 0xff);
hdmi_write(sd, 0x00, state->selected_input & 0x03);
hdmi_write(sd, 0x48,
return hdmi_write(sd, reg, (hdmi_read(sd, reg) & ~mask) | val);
hdmi_write(sd, 0x01, 0x00); /* Enable HDMI clock terminators */
hdmi_write(sd, 0x01, 0x78); /* Disable HDMI clock terminators */
hdmi_write(sd, 0x00, 0x02); /* select port A */
hdmi_write(sd, 0x00, 0x03); /* select port B */
hdmi_write(sd, 0xc0, 0x00);
hdmi_write(sd, 0x0d, 0x34); /* ADI recommended write */
hdmi_write(sd, 0x3d, 0x10); /* ADI recommended write */
hdmi_write(sd, 0x44, 0x85); /* TMDS PLL optimization */
hdmi_write(sd, 0x46, 0x1f); /* ADI recommended write */
hdmi_write(sd, 0x57, 0xb6); /* TMDS PLL optimization */
hdmi_write(sd, 0x58, 0x03); /* TMDS PLL optimization */
hdmi_write(sd, 0x60, 0x88); /* TMDS PLL optimization */
hdmi_write(sd, 0x61, 0x88); /* TMDS PLL optimization */
hdmi_write(sd, 0x6c, 0x18); /* Disable ISRC clearing bit,
hdmi_write(sd, 0x75, 0x10); /* DDC drive strength */
hdmi_write(sd, 0x85, 0x1f); /* equaliser */
hdmi_write(sd, 0x87, 0x70); /* ADI recommended write */
hdmi_write(sd, 0x89, 0x04); /* equaliser */
hdmi_write(sd, 0x8a, 0x1e); /* equaliser */
hdmi_write(sd, 0x93, 0x04); /* equaliser */
hdmi_write(sd, 0x94, 0x1e); /* equaliser */
hdmi_write(sd, 0x99, 0xa1); /* ADI recommended write */
hdmi_write(sd, 0x9b, 0x09); /* ADI recommended write */
hdmi_write(sd, 0x9d, 0x02); /* equaliser */
hdmi_write(sd, 0x48,
hdmi_write(sd, 0x69, 0x5c);
hdmi_write(sd, 0x69, 0xa3);
return hdmi_write(sd, reg, (hdmi_read(sd, reg) & mask) | val);
hdmi_write(sd, reg->reg & 0xff, val);