hdmi_wp_set_phy_pwr
int hdmi_wp_set_phy_pwr(struct hdmi_wp_data *wp, enum hdmi_phy_pwr val);
r = hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_OFF);
hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_OFF);
hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
r = hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_LDOON);
hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_OFF);
hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_OFF);
hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
int hdmi_wp_set_phy_pwr(struct hdmi_wp_data *wp, enum hdmi_phy_pwr val);
r = hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
r = hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_LDOON);
hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);