drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

3911

le32_to_cpu(ta_hdr->hdcp.fw_version);

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

3913

le32_to_cpu(ta_hdr->hdcp.size_bytes);

drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h

155

struct psp_fw_legacy_bin_desc hdcp;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c

220

psp_set_srm(hdcp_work->hdcp.config.psp.handle, hdcp_work->srm,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c

247

mod_hdcp_update_display(&hdcp_w->hdcp, conn_index, &link_adjust, &display_adjust, &hdcp_w->output);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c

275

mod_hdcp_remove_display(&hdcp_w->hdcp, aconnector->base.index, &hdcp_w->output);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c

290

mod_hdcp_reset_connection(&hdcp_w->hdcp, &hdcp_w->output);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c

324

mod_hdcp_process_event(&hdcp_work->hdcp, MOD_HDCP_EVENT_CALLBACK,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c

425

mod_hdcp_query_display(&hdcp_work->hdcp, aconnector->base.index,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c

462

mod_hdcp_process_event(&hdcp_work->hdcp,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c

477

mod_hdcp_process_event(&hdcp_work->hdcp, MOD_HDCP_EVENT_CPIRQ, &hdcp_work->output);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c

501

struct mod_hdcp hdcp = hdcp_work->hdcp;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c

502

struct psp_context *psp = hdcp.config.psp.handle;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c

597

mod_hdcp_add_display(&hdcp_w->hdcp, link, display, &hdcp_w->output);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c

665

if (!psp_set_srm(work->hdcp.config.psp.handle, work->srm_temp, pos + count, &srm_version)) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c

691

srm = psp_get_srm(work->hdcp.config.psp.handle, &srm_version, &srm_size);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c

776

struct mod_hdcp_config *config = &hdcp_work[i].hdcp.config;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.h

50

struct mod_hdcp hdcp;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

105

} else if (is_in_cp_not_desired_state(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

110

} else if (is_in_hdcp1_states(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

111

status = mod_hdcp_hdcp1_execution(hdcp, event_ctx, &input->hdcp1);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

112

} else if (is_in_hdcp1_dp_states(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

113

status = mod_hdcp_hdcp1_dp_execution(hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

115

} else if (is_in_hdcp2_states(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

116

status = mod_hdcp_hdcp2_execution(hdcp, event_ctx, &input->hdcp2);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

117

} else if (is_in_hdcp2_dp_states(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

118

status = mod_hdcp_hdcp2_dp_execution(hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

128

static enum mod_hdcp_status transition(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

138

if (is_in_initialized_state(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

139

if (is_dp_hdcp(hdcp))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

140

if (is_cp_desired_hdcp2(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

142

set_state_id(hdcp, output, D2_A0_DETERMINE_RX_HDCP_CAPABLE);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

143

} else if (is_cp_desired_hdcp1(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

145

set_state_id(hdcp, output, D1_A0_DETERMINE_RX_HDCP_CAPABLE);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

148

set_state_id(hdcp, output, HDCP_CP_NOT_DESIRED);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

149

set_auth_complete(hdcp, output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

151

else if (is_hdmi_dvi_sl_hdcp(hdcp))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

152

if (is_cp_desired_hdcp2(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

154

set_state_id(hdcp, output, H2_A0_KNOWN_HDCP2_CAPABLE_RX);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

155

} else if (is_cp_desired_hdcp1(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

157

set_state_id(hdcp, output, H1_A0_WAIT_FOR_ACTIVE_RX);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

160

set_state_id(hdcp, output, HDCP_CP_NOT_DESIRED);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

161

set_auth_complete(hdcp, output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

165

set_state_id(hdcp, output, HDCP_CP_NOT_DESIRED);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

166

set_auth_complete(hdcp, output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

168

} else if (is_in_cp_not_desired_state(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

169

increment_stay_counter(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

170

} else if (is_in_hdcp1_states(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

171

status = mod_hdcp_hdcp1_transition(hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

173

} else if (is_in_hdcp1_dp_states(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

174

status = mod_hdcp_hdcp1_dp_transition(hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

176

} else if (is_in_hdcp2_states(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

177

status = mod_hdcp_hdcp2_transition(hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

179

} else if (is_in_hdcp2_dp_states(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

180

status = mod_hdcp_hdcp2_dp_transition(hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

189

static enum mod_hdcp_status reset_authentication(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

194

if (is_hdcp1(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

195

if (hdcp->auth.trans_input.hdcp1.create_session != UNKNOWN) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

199

mod_hdcp_hdcp1_destroy_session(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

203

HDCP_TOP_RESET_AUTH_TRACE(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

204

memset(&hdcp->auth, 0, sizeof(struct mod_hdcp_authentication));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

205

memset(&hdcp->state, 0, sizeof(struct mod_hdcp_state));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

206

set_state_id(hdcp, output, HDCP_INITIALIZED);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

207

} else if (is_hdcp2(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

208

if (hdcp->auth.trans_input.hdcp2.create_session == PASS) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

209

status = mod_hdcp_hdcp2_destroy_session(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

217

HDCP_TOP_RESET_AUTH_TRACE(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

218

memset(&hdcp->auth, 0, sizeof(struct mod_hdcp_authentication));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

219

memset(&hdcp->state, 0, sizeof(struct mod_hdcp_state));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

220

set_state_id(hdcp, output, HDCP_INITIALIZED);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

221

} else if (is_in_cp_not_desired_state(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

222

HDCP_TOP_RESET_AUTH_TRACE(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

223

memset(&hdcp->auth, 0, sizeof(struct mod_hdcp_authentication));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

224

memset(&hdcp->state, 0, sizeof(struct mod_hdcp_state));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

225

set_state_id(hdcp, output, HDCP_INITIALIZED);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

235

static enum mod_hdcp_status reset_connection(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

242

status = reset_authentication(hdcp, output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

246

if (current_state(hdcp) != HDCP_UNINITIALIZED) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

247

HDCP_TOP_RESET_CONN_TRACE(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

248

set_state_id(hdcp, output, HDCP_UNINITIALIZED);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

250

memset(&hdcp->connection, 0, sizeof(hdcp->connection));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

255

static enum mod_hdcp_status update_display_adjustments(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

261

if (is_in_authenticated_states(hdcp) &&

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

262

is_dp_mst_hdcp(hdcp) &&

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

266

if (is_hdcp1(hdcp))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

267

status = mod_hdcp_hdcp1_enable_dp_stream_encryption(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

268

else if (is_hdcp2(hdcp))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

269

status = mod_hdcp_hdcp2_enable_dp_stream_encryption(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

28

static void push_error_status(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

290

enum mod_hdcp_status mod_hdcp_setup(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

297

hdcp->config = *config;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

298

HDCP_TOP_INTERFACE_TRACE(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

299

status = reset_connection(hdcp, &output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

301

push_error_status(hdcp, status);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

305

enum mod_hdcp_status mod_hdcp_teardown(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

31

struct mod_hdcp_trace *trace = &hdcp->connection.trace;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

310

HDCP_TOP_INTERFACE_TRACE(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

312

status = reset_connection(hdcp, &output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

314

memset(hdcp, 0, sizeof(struct mod_hdcp));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

316

push_error_status(hdcp, status);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

32

const uint8_t retry_limit = hdcp->connection.link.adjust.retry_limit;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

320

enum mod_hdcp_status mod_hdcp_add_display(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

327

HDCP_TOP_INTERFACE_TRACE_WITH_INDEX(hdcp, display->index);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

337

if (get_active_display_at_index(hdcp, display->index)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

343

display_container = get_empty_display_container(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

350

status = reset_authentication(hdcp, output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

355

reset_retry_counts(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

358

memset(&hdcp->connection.trace, 0, sizeof(hdcp->connection.trace));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

36

trace->errors[trace->error_count].state_id = hdcp->state.id;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

361

hdcp->connection.link = *link;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

363

status = mod_hdcp_add_display_to_topology(hdcp, display_container);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

369

if (current_state(hdcp) != HDCP_INITIALIZED)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

370

set_state_id(hdcp, output, HDCP_INITIALIZED);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

371

callback_in_ms(hdcp->connection.link.adjust.auth_delay * 1000, output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

374

push_error_status(hdcp, status);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

379

enum mod_hdcp_status mod_hdcp_remove_display(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

38

HDCP_ERROR_TRACE(hdcp, status);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

385

HDCP_TOP_INTERFACE_TRACE_WITH_INDEX(hdcp, index);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

389

display = get_active_display_at_index(hdcp, index);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

396

status = reset_authentication(hdcp, output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

401

reset_retry_counts(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

404

memset(&hdcp->connection.trace, 0, sizeof(hdcp->connection.trace));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

407

status = mod_hdcp_remove_display_from_topology(hdcp, index);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

41

if (is_hdcp1(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

413

if (current_state(hdcp) != HDCP_UNINITIALIZED)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

414

callback_in_ms(hdcp->connection.link.adjust.auth_delay * 1000,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

418

push_error_status(hdcp, status);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

42

hdcp->connection.hdcp1_retry_count++;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

422

enum mod_hdcp_status mod_hdcp_update_display(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

43

if (hdcp->connection.hdcp1_retry_count == retry_limit)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

431

HDCP_TOP_INTERFACE_TRACE_WITH_INDEX(hdcp, index);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

435

display = get_active_display_at_index(hdcp, index);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

44

hdcp->connection.link.adjust.hdcp1.disable = 1;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

442

if (memcmp(link_adjust, &hdcp->connection.link.adjust,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

45

} else if (is_hdcp2(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

450

if (memcmp(link_adjust, &hdcp->connection.link.adjust,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

454

status = update_display_adjustments(hdcp, display, display_adjust);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

46

hdcp->connection.hdcp2_retry_count++;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

460

status = reset_authentication(hdcp, output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

465

reset_retry_counts(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

468

memset(&hdcp->connection.trace, 0, sizeof(hdcp->connection.trace));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

47

if (hdcp->connection.hdcp2_retry_count == retry_limit)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

471

hdcp->connection.link.adjust = *link_adjust;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

475

if (current_state(hdcp) != HDCP_UNINITIALIZED)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

48

hdcp->connection.link.adjust.hdcp2.disable = 1;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

481

push_error_status(hdcp, status);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

485

enum mod_hdcp_status mod_hdcp_query_display(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

492

display = get_active_display_at_index(hdcp, index);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

499

query->link = &hdcp->connection.link;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

501

query->trace = &hdcp->connection.trace;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

505

if (is_hdcp1(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

507

} else if (is_hdcp2(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

52

static uint8_t is_cp_desired_hdcp1(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

523

enum mod_hdcp_status mod_hdcp_reset_connection(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

528

HDCP_TOP_INTERFACE_TRACE(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

529

status = reset_connection(hdcp, output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

531

push_error_status(hdcp, status);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

536

enum mod_hdcp_status mod_hdcp_process_event(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

542

HDCP_EVENT_TRACE(hdcp, event);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

548

exec_status = execution(hdcp, &event_ctx, &hdcp->auth.trans_input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

550

hdcp, &event_ctx, &hdcp->auth.trans_input, output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

555

push_error_status(hdcp, status);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

558

push_error_status(hdcp, status);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

563

mod_hdcp_log_ddc_trace(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

564

reset_status = reset_authentication(hdcp, output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

566

push_error_status(hdcp, reset_status);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

571

status = mod_hdcp_clear_cp_irq_status(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

573

push_error_status(hdcp, status);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

60

if (hdcp->displays[i].state != MOD_HDCP_DISPLAY_INACTIVE &&

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

61

hdcp->displays[i].adjust.disable != MOD_HDCP_DISPLAY_DISABLE_AUTHENTICATION) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

68

!hdcp->connection.link.adjust.hdcp1.disable &&

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

69

!hdcp->connection.is_hdcp1_revoked;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

72

static uint8_t is_cp_desired_hdcp2(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

80

if (hdcp->displays[i].state != MOD_HDCP_DISPLAY_INACTIVE &&

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

81

hdcp->displays[i].adjust.disable != MOD_HDCP_DISPLAY_DISABLE_AUTHENTICATION) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

88

!hdcp->connection.link.adjust.hdcp2.disable &&

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

89

!hdcp->connection.is_hdcp2_revoked;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

92

static enum mod_hdcp_status execution(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c

98

if (is_in_initialized_state(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

393

static inline uint8_t is_dp_hdcp(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

395

return (hdcp->connection.link.mode == MOD_HDCP_MODE_DP);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

398

static inline uint8_t is_dp_mst_hdcp(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

400

return (hdcp->connection.link.mode == MOD_HDCP_MODE_DP &&

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

401

hdcp->connection.link.dp.mst_enabled);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

404

static inline uint8_t is_hdmi_dvi_sl_hdcp(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

406

return (hdcp->connection.link.mode == MOD_HDCP_MODE_DEFAULT);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

410

static inline uint8_t current_state(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

412

return hdcp->state.id;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

418

memset(&hdcp->state, 0, sizeof(hdcp->state));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

419

hdcp->state.id = id;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

426

static inline uint8_t is_in_hdcp1_states(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

428

return (current_state(hdcp) > HDCP1_STATE_START &&

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

429

current_state(hdcp) <= HDCP1_STATE_END);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

432

static inline uint8_t is_in_hdcp1_dp_states(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

434

return (current_state(hdcp) > HDCP1_DP_STATE_START &&

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

435

current_state(hdcp) <= HDCP1_DP_STATE_END);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

438

static inline uint8_t is_in_hdcp2_states(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

440

return (current_state(hdcp) > HDCP2_STATE_START &&

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

441

current_state(hdcp) <= HDCP2_STATE_END);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

444

static inline uint8_t is_in_hdcp2_dp_states(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

446

return (current_state(hdcp) > HDCP2_DP_STATE_START &&

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

447

current_state(hdcp) <= HDCP2_DP_STATE_END);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

450

static inline uint8_t is_in_authenticated_states(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

452

return (current_state(hdcp) == D1_A4_AUTHENTICATED ||

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

453

current_state(hdcp) == H1_A45_AUTHENTICATED ||

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

454

current_state(hdcp) == D2_A5_AUTHENTICATED ||

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

455

current_state(hdcp) == H2_A5_AUTHENTICATED);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

458

static inline uint8_t is_hdcp1(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

460

return (is_in_hdcp1_states(hdcp) || is_in_hdcp1_dp_states(hdcp));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

463

static inline uint8_t is_hdcp2(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

465

return (is_in_hdcp2_states(hdcp) || is_in_hdcp2_dp_states(hdcp));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

468

static inline uint8_t is_in_cp_not_desired_state(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

470

return current_state(hdcp) == HDCP_CP_NOT_DESIRED;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

473

static inline uint8_t is_in_initialized_state(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

475

return current_state(hdcp) == HDCP_INITIALIZED;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

479

static inline void increment_stay_counter(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

481

hdcp->state.stay_count++;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

526

static inline uint8_t get_active_display_count(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

532

if (is_display_active(&hdcp->displays[i]))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

538

struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

544

if (is_display_active(&hdcp->displays[i])) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

545

display = &hdcp->displays[i];

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

552

struct mod_hdcp *hdcp, uint8_t index)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

558

if (hdcp->displays[i].index == index &&

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

559

is_display_active(&hdcp->displays[i])) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

560

display = &hdcp->displays[i];

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

567

struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

573

if (!is_display_active(&hdcp->displays[i])) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

574

display = &hdcp->displays[i];

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

580

static inline void reset_retry_counts(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

582

hdcp->connection.hdcp1_retry_count = 0;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h

583

hdcp->connection.hdcp2_retry_count = 0;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

102

static inline enum mod_hdcp_status check_no_max_cascade(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

106

if (is_dp_hdcp(hdcp))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

107

status = DRM_HDCP_MAX_CASCADE_EXCEEDED(hdcp->auth.msg.hdcp1.binfo_dp >> 8)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

111

status = DRM_HDCP_MAX_CASCADE_EXCEEDED(hdcp->auth.msg.hdcp1.bstatus >> 8)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

117

static inline enum mod_hdcp_status check_no_max_devs(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

121

if (is_dp_hdcp(hdcp))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

122

status = DRM_HDCP_MAX_DEVICE_EXCEEDED(hdcp->auth.msg.hdcp1.binfo_dp) ?

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

126

status = DRM_HDCP_MAX_DEVICE_EXCEEDED(hdcp->auth.msg.hdcp1.bstatus) ?

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

132

static inline uint8_t get_device_count(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

134

return is_dp_hdcp(hdcp) ?

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

135

DRM_HDCP_NUM_DOWNSTREAM(hdcp->auth.msg.hdcp1.binfo_dp) :

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

136

DRM_HDCP_NUM_DOWNSTREAM(hdcp->auth.msg.hdcp1.bstatus);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

139

static inline enum mod_hdcp_status check_device_count(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

142

if (get_device_count(hdcp) == 0)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

145

hdcp->connection.trace.hdcp1.downstream_device_count = get_device_count(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

152

return ((1 + get_device_count(hdcp)) < get_active_display_count(hdcp)) ?

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

157

static enum mod_hdcp_status wait_for_active_rx(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

170

hdcp, "bksv_read"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

174

hdcp, "bcaps_read"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

180

static enum mod_hdcp_status exchange_ksvs(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

193

hdcp, "create_session"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

197

hdcp, "an_write"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

201

hdcp, "aksv_write"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

205

hdcp, "bksv_read"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

209

hdcp, "bksv_validation"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

211

if (hdcp->auth.msg.hdcp1.ainfo) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

214

hdcp, "ainfo_write"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

222

struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

235

hdcp, "r0p_read"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

239

hdcp, "rx_validation"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

241

if (hdcp->connection.is_repeater) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

242

if (!hdcp->connection.link.adjust.hdcp1.postpone_encryption)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

246

hdcp, "encryption"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

251

hdcp, "encryption"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

253

if (is_dp_mst_hdcp(hdcp))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

257

hdcp, "stream_encryption_dp"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

264

static enum mod_hdcp_status authenticated(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

277

hdcp, "link_maintenance");

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

28

static inline enum mod_hdcp_status validate_bksv(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

282

static enum mod_hdcp_status wait_for_ready(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

295

if (is_dp_hdcp(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

298

hdcp, "bstatus_read"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

302

hdcp, "link_integrity_check"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

306

hdcp, "reauth_request_check"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

311

hdcp, "bcaps_read"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

316

hdcp, "ready_check"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

322

static enum mod_hdcp_status read_ksv_list(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

334

if (is_dp_hdcp(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

337

hdcp, "binfo_read_dp"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

342

hdcp, "bstatus_read"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

347

hdcp, "max_cascade_check"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

35

memcpy(bksv, hdcp->auth.msg.hdcp1.bksv, sizeof(hdcp->auth.msg.hdcp1.bksv));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

351

hdcp, "max_devs_check"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

355

hdcp, "device_count_check"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

357

device_count = get_device_count(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

358

hdcp->auth.msg.hdcp1.ksvlist_size = device_count*5;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

361

hdcp, "ksvlist_read"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

365

hdcp, "vp_read"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

369

hdcp, "ksvlist_vp_validation"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

374

hdcp, "encryption"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

376

if (is_dp_mst_hdcp(hdcp))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

380

hdcp, "stream_encryption_dp"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

386

static enum mod_hdcp_status determine_rx_hdcp_capable_dp(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

399

hdcp, "bcaps_read"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

403

hdcp, "hdcp_capable_dp"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

409

static enum mod_hdcp_status wait_for_r0_prime_dp(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

423

hdcp, "bstatus_read"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

427

hdcp, "r0p_available_dp"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

433

static enum mod_hdcp_status authenticated_dp(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

44

hdcp->connection.trace.hdcp1.attempt_count++;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

446

hdcp, "bstatus_read");

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

450

hdcp, "link_integrity_check");

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

454

hdcp, "reauth_request_check");

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

462

enum mod_hdcp_status *status, struct mod_hdcp *hdcp, char *str)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

464

*status = func(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

466

HDCP_INPUT_PASS_TRACE(hdcp, str);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

469

HDCP_INPUT_FAIL_TRACE(hdcp, str);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

475

enum mod_hdcp_status mod_hdcp_hdcp1_execution(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

481

switch (current_state(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

483

status = wait_for_active_rx(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

486

status = exchange_ksvs(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

489

status = computations_validate_rx_test_for_repeater(hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

493

status = authenticated(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

496

status = wait_for_ready(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

499

status = read_ksv_list(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

509

enum mod_hdcp_status mod_hdcp_hdcp1_dp_execution(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

515

switch (current_state(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

517

status = determine_rx_hdcp_capable_dp(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

52

static inline enum mod_hdcp_status check_ksv_ready(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

520

status = exchange_ksvs(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

523

status = wait_for_r0_prime_dp(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

527

hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

530

status = authenticated_dp(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

533

status = wait_for_ready(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

536

status = read_ksv_list(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

54

if (is_dp_hdcp(hdcp))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

55

return (hdcp->auth.msg.hdcp1.bstatus & DP_BSTATUS_READY) ?

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

58

return (hdcp->auth.msg.hdcp1.bcaps & DRM_HDCP_DDC_BCAPS_KSV_FIFO_READY) ?

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

63

static inline enum mod_hdcp_status check_hdcp_capable_dp(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

65

return (hdcp->auth.msg.hdcp1.bcaps & DP_BCAPS_HDCP_CAPABLE) ?

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

70

static inline enum mod_hdcp_status check_r0p_available_dp(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

74

if (is_dp_hdcp(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

75

status = (hdcp->auth.msg.hdcp1.bstatus &

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

86

struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

88

return (hdcp->auth.msg.hdcp1.bstatus &

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

95

struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c

97

return (hdcp->auth.msg.hdcp1.bstatus & DP_BSTATUS_REAUTH_REQ) ?

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

103

increment_stay_counter(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

116

increment_stay_counter(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

121

set_state_id(hdcp, output, H1_A9_READ_KSV_LIST);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

139

set_state_id(hdcp, output, H1_A45_AUTHENTICATED);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

140

set_auth_complete(hdcp, output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

151

enum mod_hdcp_status mod_hdcp_hdcp1_dp_transition(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

157

struct mod_hdcp_connection *conn = &hdcp->connection;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

158

struct mod_hdcp_link_adjustment *adjust = &hdcp->connection.link.adjust;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

160

switch (current_state(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

172

set_state_id(hdcp, output, D1_A1_EXCHANGE_KSVS);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

189

set_watchdog_in_ms(hdcp, 100, output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

190

set_state_id(hdcp, output, D1_A23_WAIT_FOR_R0_PRIME);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

200

increment_stay_counter(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

204

set_state_id(hdcp, output, D1_A2_COMPUTATIONS_A3_VALIDATE_RX_A5_TEST_FOR_REPEATER);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

211

if (hdcp->state.stay_count < 2 &&

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

212

!hdcp->connection.is_hdcp1_revoked) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

215

increment_stay_counter(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

230

(!conn->is_repeater && is_dp_mst_hdcp(hdcp) && input->stream_encryption_dp != PASS)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

238

set_watchdog_in_ms(hdcp, 5000, output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

239

set_state_id(hdcp, output, D1_A6_WAIT_FOR_READY);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

241

set_state_id(hdcp, output, D1_A4_AUTHENTICATED);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

242

set_auth_complete(hdcp, output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

266

increment_stay_counter(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

271

set_state_id(hdcp, output, D1_A7_READ_KSV_LIST);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

28

enum mod_hdcp_status mod_hdcp_hdcp1_transition(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

295

if (hdcp->state.stay_count < 2 &&

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

296

!hdcp->connection.is_hdcp1_revoked) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

299

increment_stay_counter(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

309

(is_dp_mst_hdcp(hdcp) && input->stream_encryption_dp != PASS)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

313

set_state_id(hdcp, output, D1_A4_AUTHENTICATED);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

314

set_auth_complete(hdcp, output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

34

struct mod_hdcp_connection *conn = &hdcp->connection;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

35

struct mod_hdcp_link_adjustment *adjust = &hdcp->connection.link.adjust;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

37

switch (current_state(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

42

increment_stay_counter(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

46

set_state_id(hdcp, output, H1_A1_EXCHANGE_KSVS);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

64

set_state_id(hdcp, output,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

87

set_watchdog_in_ms(hdcp, 5000, output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

88

set_state_id(hdcp, output, H1_A8_WAIT_FOR_READY);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

91

set_state_id(hdcp, output, H1_A45_AUTHENTICATED);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c

92

set_auth_complete(hdcp, output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

101

status = mod_hdcp_read_rxstatus(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

103

const uint16_t size = get_hdmi_rxstatus_msg_size(hdcp->auth.msg.hdcp2.rxstatus);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

104

status = (size == sizeof(hdcp->auth.msg.hdcp2.ake_cert)) ?

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

112

static enum mod_hdcp_status check_h_prime_available(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

116

status = mod_hdcp_read_rxstatus(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

120

if (is_dp_hdcp(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

121

status = HDCP_2_2_DP_RXSTATUS_H_PRIME(hdcp->auth.msg.hdcp2.rxstatus_dp) ?

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

125

const uint16_t size = get_hdmi_rxstatus_msg_size(hdcp->auth.msg.hdcp2.rxstatus);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

126

status = (size == sizeof(hdcp->auth.msg.hdcp2.ake_h_prime)) ?

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

134

static enum mod_hdcp_status check_pairing_info_available(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

138

status = mod_hdcp_read_rxstatus(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

142

if (is_dp_hdcp(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

143

status = HDCP_2_2_DP_RXSTATUS_PAIRING(hdcp->auth.msg.hdcp2.rxstatus_dp) ?

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

147

const uint16_t size = get_hdmi_rxstatus_msg_size(hdcp->auth.msg.hdcp2.rxstatus);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

148

status = (size == sizeof(hdcp->auth.msg.hdcp2.ake_pairing_info)) ?

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

156

static enum mod_hdcp_status poll_l_prime_available(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

163

if (is_dp_hdcp(hdcp))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

169

status = mod_hdcp_read_rxstatus(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

173

const uint16_t size = get_hdmi_rxstatus_msg_size(hdcp->auth.msg.hdcp2.rxstatus);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

174

status = (size == sizeof(hdcp->auth.msg.hdcp2.lc_l_prime)) ?

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

183

static enum mod_hdcp_status check_stream_ready_available(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

187

if (is_dp_hdcp(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

190

status = mod_hdcp_read_rxstatus(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

193

const uint16_t size = get_hdmi_rxstatus_msg_size(hdcp->auth.msg.hdcp2.rxstatus);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

194

status = (size == sizeof(hdcp->auth.msg.hdcp2.repeater_auth_stream_ready)) ?

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

202

static inline uint8_t get_device_count(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

204

return HDCP_2_2_DEV_COUNT_LO(hdcp->auth.msg.hdcp2.rx_id_list[2]) +

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

205

(HDCP_2_2_DEV_COUNT_HI(hdcp->auth.msg.hdcp2.rx_id_list[1]) << 4);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

208

static enum mod_hdcp_status check_device_count(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

210

struct mod_hdcp_trace *trace = &hdcp->connection.trace;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

213

if (get_device_count(hdcp) == 0)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

216

trace->hdcp2.downstream_device_count = get_device_count(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

218

HDCP_2_2_HDCP1_DEVICE_CONNECTED(hdcp->auth.msg.hdcp2.rx_id_list[2]);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

220

HDCP_2_2_HDCP_2_0_REP_CONNECTED(hdcp->auth.msg.hdcp2.rx_id_list[2]);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

225

return ((1 + get_device_count(hdcp)) < get_active_display_count(hdcp)) ?

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

230

static uint8_t process_rxstatus(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

237

hdcp, "rxstatus_read"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

241

hdcp, "reauth_request_check"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

243

if (is_dp_hdcp(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

246

hdcp, "link_integrity_check_dp"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

249

if (hdcp->connection.is_repeater)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

250

if (check_receiver_id_list_ready(hdcp) ==

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

252

HDCP_INPUT_PASS_TRACE(hdcp, "rx_id_list_ready");

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

254

if (is_dp_hdcp(hdcp))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

255

hdcp->auth.msg.hdcp2.rx_id_list_size =

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

256

sizeof(hdcp->auth.msg.hdcp2.rx_id_list);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

258

hdcp->auth.msg.hdcp2.rx_id_list_size =

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

259

get_hdmi_rxstatus_msg_size(hdcp->auth.msg.hdcp2.rxstatus);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

265

static enum mod_hdcp_status known_hdcp2_capable_rx(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

278

hdcp, "hdcp2version_read"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

282

hdcp, "hdcp2_capable"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

288

static enum mod_hdcp_status send_ake_init(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

301

hdcp, "create_session"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

305

hdcp, "ake_init_prepare"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

309

hdcp, "ake_init_write"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

315

static enum mod_hdcp_status validate_ake_cert(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

328

if (is_hdmi_dvi_sl_hdcp(hdcp))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

331

hdcp, "ake_cert_available"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

335

hdcp, "ake_cert_read"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

339

hdcp, "ake_cert_validation"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

345

static enum mod_hdcp_status send_no_stored_km(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

35

static inline enum mod_hdcp_status check_receiver_id_list_ready(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

358

hdcp, "no_stored_km_write"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

364

static enum mod_hdcp_status read_h_prime(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

379

hdcp, "h_prime_available"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

384

hdcp, "h_prime_read"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

39

if (is_dp_hdcp(hdcp))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

391

struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

40

is_ready = HDCP_2_2_DP_RXSTATUS_READY(hdcp->auth.msg.hdcp2.rxstatus_dp) ? 1 : 0;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

406

hdcp, "pairing_available"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

410

hdcp, "pairing_info_read"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

414

hdcp, "h_prime_validation"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

42

is_ready = (HDCP_2_2_HDMI_RXSTATUS_READY(hdcp->auth.msg.hdcp2.rxstatus[1]) &&

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

420

static enum mod_hdcp_status send_stored_km(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

43

get_hdmi_rxstatus_msg_size(hdcp->auth.msg.hdcp2.rxstatus) != 0) ? 1 : 0;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

433

hdcp, "stored_km_write"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

439

static enum mod_hdcp_status validate_h_prime(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

454

hdcp, "h_prime_available"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

458

hdcp, "h_prime_read"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

462

hdcp, "h_prime_validation"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

468

static enum mod_hdcp_status locality_check(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

48

static inline enum mod_hdcp_status check_hdcp2_capable(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

481

hdcp, "lc_init_prepare"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

484

if (hdcp->connection.link.adjust.hdcp2.use_fw_locality_check) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

487

hdcp, "l_prime_combo_read"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

492

hdcp, "lc_init_write"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

494

if (is_dp_hdcp(hdcp))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

499

hdcp, "l_prime_available_poll"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

503

hdcp, "l_prime_read"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

509

hdcp, "l_prime_validation"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

51

struct mod_hdcp_trace *trace = &hdcp->connection.trace;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

515

static enum mod_hdcp_status exchange_ks_and_test_for_repeater(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

528

hdcp, "eks_prepare"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

53

if (is_dp_hdcp(hdcp))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

532

hdcp, "eks_write"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

538

static enum mod_hdcp_status enable_encryption(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

54

status = (hdcp->auth.msg.hdcp2.rxcaps_dp[0] == HDCP_2_2_RX_CAPS_VERSION_VAL) &&

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

55

HDCP_2_2_DP_HDCP_CAPABLE(hdcp->auth.msg.hdcp2.rxcaps_dp[2]) ?

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

550

process_rxstatus(hdcp, event_ctx, input, &status);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

554

if (is_hdmi_dvi_sl_hdcp(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

555

if (!process_rxstatus(hdcp, event_ctx, input, &status))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

562

hdcp, "enable_encryption"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

564

if (is_dp_mst_hdcp(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

568

hdcp, "stream_encryption_dp"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

575

static enum mod_hdcp_status authenticated(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

587

process_rxstatus(hdcp, event_ctx, input, &status);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

59

status = (hdcp->auth.msg.hdcp2.hdcp2version_hdmi

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

592

static enum mod_hdcp_status wait_for_rx_id_list(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

605

if (!process_rxstatus(hdcp, event_ctx, input, &status))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

615

static enum mod_hdcp_status verify_rx_id_list_and_send_ack(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

627

process_rxstatus(hdcp, event_ctx, input, &status);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

633

&status, hdcp, "receiver_id_list_read"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

637

&status, hdcp, "device_count_check"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

641

&status, hdcp, "rx_id_list_validation"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

645

&status, hdcp, "repeater_auth_ack_write"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

651

static enum mod_hdcp_status send_stream_management(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

663

process_rxstatus(hdcp, event_ctx, input, &status);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

667

if (is_hdmi_dvi_sl_hdcp(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

668

if (!process_rxstatus(hdcp, event_ctx, input, &status))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

675

&status, hdcp, "prepare_stream_manage"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

680

&status, hdcp, "stream_manage_write"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

686

static enum mod_hdcp_status validate_stream_ready(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

699

process_rxstatus(hdcp, event_ctx, input, &status);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

703

if (is_hdmi_dvi_sl_hdcp(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

704

if (!process_rxstatus(hdcp, event_ctx, input, &status))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

709

if (is_hdmi_dvi_sl_hdcp(hdcp))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

71

struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

712

&status, hdcp, "stream_ready_available"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

716

&status, hdcp, "stream_ready_read"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

720

&status, hdcp, "stream_ready_validation"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

727

static enum mod_hdcp_status determine_rx_hdcp_capable_dp(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

740

&status, hdcp, "rx_caps_read_dp"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

744

hdcp, "hdcp2_capable_check"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

75

if (is_dp_hdcp(hdcp))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

750

static enum mod_hdcp_status send_content_stream_type_dp(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

76

ret = HDCP_2_2_DP_RXSTATUS_REAUTH_REQ(hdcp->auth.msg.hdcp2.rxstatus_dp) ?

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

762

if (!process_rxstatus(hdcp, event_ctx, input, &status))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

766

hdcp, "content_stream_type_write"))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

772

enum mod_hdcp_status mod_hdcp_hdcp2_execution(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

778

switch (current_state(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

780

status = known_hdcp2_capable_rx(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

783

status = send_ake_init(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

786

status = validate_ake_cert(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

789

status = send_no_stored_km(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

792

status = read_h_prime(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

795

status = read_pairing_info_and_validate_h_prime(hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

799

status = send_stored_km(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

80

ret = HDCP_2_2_HDMI_RXSTATUS_REAUTH_REQ(hdcp->auth.msg.hdcp2.rxstatus[1]) ?

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

802

status = validate_h_prime(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

805

status = locality_check(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

808

status = exchange_ks_and_test_for_repeater(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

811

status = enable_encryption(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

814

status = authenticated(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

817

status = wait_for_rx_id_list(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

820

status = verify_rx_id_list_and_send_ack(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

823

status = send_stream_management(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

826

status = validate_stream_ready(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

836

enum mod_hdcp_status mod_hdcp_hdcp2_dp_execution(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

842

switch (current_state(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

844

status = determine_rx_hdcp_capable_dp(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

847

status = send_ake_init(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

850

status = validate_ake_cert(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

853

status = send_no_stored_km(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

856

status = read_h_prime(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

859

status = read_pairing_info_and_validate_h_prime(hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

863

status = send_stored_km(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

866

status = validate_h_prime(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

869

status = locality_check(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

87

struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

872

status = exchange_ks_and_test_for_repeater(hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

876

status = send_content_stream_type_dp(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

879

status = enable_encryption(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

882

status = authenticated(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

885

status = wait_for_rx_id_list(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

888

status = verify_rx_id_list_and_send_ack(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

89

return HDCP_2_2_DP_RXSTATUS_LINK_FAILED(hdcp->auth.msg.hdcp2.rxstatus_dp) ?

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

891

status = send_stream_management(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

894

status = validate_stream_ready(hdcp, event_ctx, input);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

94

static enum mod_hdcp_status check_ake_cert_available(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

98

if (is_dp_hdcp(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

105

set_watchdog_in_ms(hdcp, 2000, output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

107

set_watchdog_in_ms(hdcp, 1000, output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

109

set_state_id(hdcp, output, H2_A1_READ_H_PRIME);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

120

increment_stay_counter(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

127

set_watchdog_in_ms(hdcp, 200, output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

129

set_state_id(hdcp, output, H2_A1_READ_PAIRING_INFO_AND_VALIDATE_H_PRIME);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

142

increment_stay_counter(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

152

set_state_id(hdcp, output, H2_A2_LOCALITY_CHECK);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

159

set_watchdog_in_ms(hdcp, 200, output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

161

set_state_id(hdcp, output, H2_A1_VALIDATE_H_PRIME);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

172

increment_stay_counter(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

185

set_state_id(hdcp, output, H2_A2_LOCALITY_CHECK);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

189

if (hdcp->state.stay_count > 10 ||

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

200

increment_stay_counter(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

215

increment_stay_counter(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

219

set_state_id(hdcp, output, H2_A3_EXCHANGE_KS_AND_TEST_FOR_REPEATER);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

228

set_watchdog_in_ms(hdcp, 3000, output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

230

set_state_id(hdcp, output, H2_A6_WAIT_FOR_RX_ID_LIST);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

236

set_state_id(hdcp, output, H2_ENABLE_ENCRYPTION);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

250

set_state_id(hdcp, output, H2_A78_VERIFY_RX_ID_LIST_AND_SEND_ACK);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

257

set_state_id(hdcp, output, H2_A5_AUTHENTICATED);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

258

set_auth_complete(hdcp, output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

267

set_state_id(hdcp, output, H2_A78_VERIFY_RX_ID_LIST_AND_SEND_ACK);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

271

increment_stay_counter(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

28

enum mod_hdcp_status mod_hdcp_hdcp2_transition(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

289

increment_stay_counter(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

294

set_state_id(hdcp, output, H2_A78_VERIFY_RX_ID_LIST_AND_SEND_ACK);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

313

set_state_id(hdcp, output, H2_A9_SEND_STREAM_MANAGEMENT);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

322

set_state_id(hdcp, output, H2_A78_VERIFY_RX_ID_LIST_AND_SEND_ACK);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

329

set_watchdog_in_ms(hdcp, 100, output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

331

set_state_id(hdcp, output, H2_A9_VALIDATE_STREAM_READY);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

34

struct mod_hdcp_connection *conn = &hdcp->connection;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

340

set_state_id(hdcp, output, H2_A78_VERIFY_RX_ID_LIST_AND_SEND_ACK);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

347

hdcp->auth.count.stream_management_retry_count++;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

349

set_state_id(hdcp, output, H2_A9_SEND_STREAM_MANAGEMENT);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

35

struct mod_hdcp_link_adjustment *adjust = &hdcp->connection.link.adjust;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

352

increment_stay_counter(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

361

if (hdcp->auth.count.stream_management_retry_count > 10) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

364

hdcp->auth.count.stream_management_retry_count++;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

366

set_state_id(hdcp, output, H2_A9_SEND_STREAM_MANAGEMENT);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

37

switch (current_state(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

371

set_state_id(hdcp, output, H2_ENABLE_ENCRYPTION);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

382

enum mod_hdcp_status mod_hdcp_hdcp2_dp_transition(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

388

struct mod_hdcp_connection *conn = &hdcp->connection;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

389

struct mod_hdcp_link_adjustment *adjust = &hdcp->connection.link.adjust;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

391

switch (current_state(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

397

set_state_id(hdcp, output, HDCP_INITIALIZED);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

400

set_state_id(hdcp, output, D2_A1_SEND_AKE_INIT);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

416

set_state_id(hdcp, output, D2_A1_VALIDATE_AKE_CERT);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

43

set_state_id(hdcp, output, HDCP_INITIALIZED);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

431

set_state_id(hdcp, output, D2_A1_SEND_STORED_KM);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

434

set_state_id(hdcp, output, D2_A1_SEND_NO_STORED_KM);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

443

set_watchdog_in_ms(hdcp, 2000, output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

445

set_watchdog_in_ms(hdcp, 1000, output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

446

set_state_id(hdcp, output, D2_A1_READ_H_PRIME);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

455

increment_stay_counter(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

46

set_state_id(hdcp, output, H2_A1_SEND_AKE_INIT);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

461

set_watchdog_in_ms(hdcp, 200, output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

462

set_state_id(hdcp, output, D2_A1_READ_PAIRING_INFO_AND_VALIDATE_H_PRIME);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

474

increment_stay_counter(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

483

set_state_id(hdcp, output, D2_A2_LOCALITY_CHECK);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

490

set_watchdog_in_ms(hdcp, 200, output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

491

set_state_id(hdcp, output, D2_A1_VALIDATE_H_PRIME);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

500

increment_stay_counter(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

512

set_state_id(hdcp, output, D2_A2_LOCALITY_CHECK);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

515

if (hdcp->state.stay_count > 10 ||

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

525

increment_stay_counter(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

538

increment_stay_counter(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

542

set_state_id(hdcp, output, D2_A34_EXCHANGE_KS_AND_TEST_FOR_REPEATER);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

551

set_watchdog_in_ms(hdcp, 3000, output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

552

set_state_id(hdcp, output, D2_A6_WAIT_FOR_RX_ID_LIST);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

555

set_state_id(hdcp, output, D2_SEND_CONTENT_STREAM_TYPE);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

567

set_state_id(hdcp, output, D2_ENABLE_ENCRYPTION);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

581

set_state_id(hdcp, output, D2_A78_VERIFY_RX_ID_LIST_AND_SEND_ACK);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

584

(is_dp_mst_hdcp(hdcp) && input->stream_encryption_dp != PASS)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

588

set_state_id(hdcp, output, D2_A5_AUTHENTICATED);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

589

set_auth_complete(hdcp, output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

597

if (hdcp->connection.hdcp2_retry_count >= 1)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

60

set_watchdog_in_ms(hdcp, 100, output);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

603

set_state_id(hdcp, output, D2_A78_VERIFY_RX_ID_LIST_AND_SEND_ACK);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

606

increment_stay_counter(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

619

increment_stay_counter(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

62

set_state_id(hdcp, output, H2_A1_VALIDATE_AKE_CERT);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

623

set_state_id(hdcp, output, D2_A78_VERIFY_RX_ID_LIST_AND_SEND_ACK);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

644

set_state_id(hdcp, output, D2_A9_SEND_STREAM_MANAGEMENT);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

654

set_state_id(hdcp, output, D2_A78_VERIFY_RX_ID_LIST_AND_SEND_ACK);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

661

increment_stay_counter(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

665

set_state_id(hdcp, output, D2_A9_VALIDATE_STREAM_READY);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

675

set_state_id(hdcp, output, D2_A78_VERIFY_RX_ID_LIST_AND_SEND_ACK);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

684

if (hdcp->auth.count.stream_management_retry_count > 10) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

687

hdcp->auth.count.stream_management_retry_count++;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

689

set_state_id(hdcp, output, D2_A9_SEND_STREAM_MANAGEMENT);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

691

increment_stay_counter(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

696

set_state_id(hdcp, output, D2_ENABLE_ENCRYPTION);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

78

increment_stay_counter(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

93

set_state_id(hdcp, output, H2_A1_SEND_STORED_KM);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c

96

set_state_id(hdcp, output, H2_A1_SEND_NO_STORED_KM);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

152

static enum mod_hdcp_status read(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

165

if (is_dp_hdcp(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

172

success = hdcp->config.ddc.funcs.read_dpcd(hdcp->config.ddc.handle,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

188

success = hdcp->config.ddc.funcs.read_i2c(

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

189

hdcp->config.ddc.handle,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

199

static enum mod_hdcp_status read_repeatedly(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

211

status = read(hdcp, msg_id, buf + data_offset, cur_size);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

223

static enum mod_hdcp_status write(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

236

if (is_dp_hdcp(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

243

success = hdcp->config.ddc.funcs.write_dpcd(

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

244

hdcp->config.ddc.handle,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

260

hdcp->buf[0] = hdcp_i2c_offsets[msg_id];

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

261

memmove(&hdcp->buf[1], buf, buf_len);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

262

success = hdcp->config.ddc.funcs.write_i2c(

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

263

hdcp->config.ddc.handle,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

265

hdcp->buf,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

272

enum mod_hdcp_status mod_hdcp_read_bksv(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

274

return read(hdcp, MOD_HDCP_MESSAGE_ID_READ_BKSV,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

275

hdcp->auth.msg.hdcp1.bksv,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

276

sizeof(hdcp->auth.msg.hdcp1.bksv));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

279

enum mod_hdcp_status mod_hdcp_read_bcaps(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

281

return read(hdcp, MOD_HDCP_MESSAGE_ID_READ_BCAPS,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

282

&hdcp->auth.msg.hdcp1.bcaps,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

283

sizeof(hdcp->auth.msg.hdcp1.bcaps));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

286

enum mod_hdcp_status mod_hdcp_read_bstatus(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

290

if (is_dp_hdcp(hdcp))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

291

status = read(hdcp, MOD_HDCP_MESSAGE_ID_READ_BSTATUS,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

292

(uint8_t *)&hdcp->auth.msg.hdcp1.bstatus,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

295

status = read(hdcp, MOD_HDCP_MESSAGE_ID_READ_BSTATUS,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

296

(uint8_t *)&hdcp->auth.msg.hdcp1.bstatus,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

297

sizeof(hdcp->auth.msg.hdcp1.bstatus));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

301

enum mod_hdcp_status mod_hdcp_read_r0p(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

303

return read(hdcp, MOD_HDCP_MESSAGE_ID_READ_RI_R0,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

304

(uint8_t *)&hdcp->auth.msg.hdcp1.r0p,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

305

sizeof(hdcp->auth.msg.hdcp1.r0p));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

309

enum mod_hdcp_status mod_hdcp_read_ksvlist(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

313

if (is_dp_hdcp(hdcp))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

314

status = read_repeatedly(hdcp, MOD_HDCP_MESSAGE_ID_READ_KSV_FIFO,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

315

hdcp->auth.msg.hdcp1.ksvlist,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

316

hdcp->auth.msg.hdcp1.ksvlist_size,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

319

status = read(hdcp, MOD_HDCP_MESSAGE_ID_READ_KSV_FIFO,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

320

(uint8_t *)&hdcp->auth.msg.hdcp1.ksvlist,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

321

hdcp->auth.msg.hdcp1.ksvlist_size);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

325

enum mod_hdcp_status mod_hdcp_read_vp(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

329

status = read(hdcp, MOD_HDCP_MESSAGE_ID_READ_VH_0,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

330

&hdcp->auth.msg.hdcp1.vp[0], 4);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

334

status = read(hdcp, MOD_HDCP_MESSAGE_ID_READ_VH_1,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

335

&hdcp->auth.msg.hdcp1.vp[4], 4);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

339

status = read(hdcp, MOD_HDCP_MESSAGE_ID_READ_VH_2,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

340

&hdcp->auth.msg.hdcp1.vp[8], 4);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

344

status = read(hdcp, MOD_HDCP_MESSAGE_ID_READ_VH_3,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

345

&hdcp->auth.msg.hdcp1.vp[12], 4);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

349

status = read(hdcp, MOD_HDCP_MESSAGE_ID_READ_VH_4,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

350

&hdcp->auth.msg.hdcp1.vp[16], 4);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

355

enum mod_hdcp_status mod_hdcp_read_binfo(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

359

if (is_dp_hdcp(hdcp))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

360

status = read(hdcp, MOD_HDCP_MESSAGE_ID_READ_BINFO,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

361

(uint8_t *)&hdcp->auth.msg.hdcp1.binfo_dp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

362

sizeof(hdcp->auth.msg.hdcp1.binfo_dp));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

369

enum mod_hdcp_status mod_hdcp_write_aksv(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

371

return write(hdcp, MOD_HDCP_MESSAGE_ID_WRITE_AKSV,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

372

hdcp->auth.msg.hdcp1.aksv,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

373

sizeof(hdcp->auth.msg.hdcp1.aksv));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

376

enum mod_hdcp_status mod_hdcp_write_ainfo(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

378

return write(hdcp, MOD_HDCP_MESSAGE_ID_WRITE_AINFO,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

379

&hdcp->auth.msg.hdcp1.ainfo,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

380

sizeof(hdcp->auth.msg.hdcp1.ainfo));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

383

enum mod_hdcp_status mod_hdcp_write_an(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

385

return write(hdcp, MOD_HDCP_MESSAGE_ID_WRITE_AN,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

386

hdcp->auth.msg.hdcp1.an,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

387

sizeof(hdcp->auth.msg.hdcp1.an));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

390

enum mod_hdcp_status mod_hdcp_read_hdcp2version(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

394

if (is_dp_hdcp(hdcp))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

397

status = read(hdcp, MOD_HDCP_MESSAGE_ID_HDCP2VERSION,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

398

&hdcp->auth.msg.hdcp2.hdcp2version_hdmi,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

399

sizeof(hdcp->auth.msg.hdcp2.hdcp2version_hdmi));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

404

enum mod_hdcp_status mod_hdcp_read_rxcaps(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

408

if (!is_dp_hdcp(hdcp))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

411

status = read(hdcp, MOD_HDCP_MESSAGE_ID_RX_CAPS,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

412

hdcp->auth.msg.hdcp2.rxcaps_dp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

413

sizeof(hdcp->auth.msg.hdcp2.rxcaps_dp));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

418

enum mod_hdcp_status mod_hdcp_read_rxstatus(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

422

if (is_dp_hdcp(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

423

status = read(hdcp, MOD_HDCP_MESSAGE_ID_READ_RXSTATUS,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

424

&hdcp->auth.msg.hdcp2.rxstatus_dp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

427

status = read(hdcp, MOD_HDCP_MESSAGE_ID_READ_RXSTATUS,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

428

(uint8_t *)&hdcp->auth.msg.hdcp2.rxstatus,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

429

sizeof(hdcp->auth.msg.hdcp2.rxstatus));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

434

enum mod_hdcp_status mod_hdcp_read_ake_cert(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

438

if (is_dp_hdcp(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

439

hdcp->auth.msg.hdcp2.ake_cert[0] = HDCP_2_2_AKE_SEND_CERT;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

440

status = read(hdcp, MOD_HDCP_MESSAGE_ID_READ_AKE_SEND_CERT,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

441

hdcp->auth.msg.hdcp2.ake_cert+1,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

442

sizeof(hdcp->auth.msg.hdcp2.ake_cert)-1);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

445

status = read(hdcp, MOD_HDCP_MESSAGE_ID_READ_AKE_SEND_CERT,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

446

hdcp->auth.msg.hdcp2.ake_cert,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

447

sizeof(hdcp->auth.msg.hdcp2.ake_cert));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

452

enum mod_hdcp_status mod_hdcp_read_h_prime(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

456

if (is_dp_hdcp(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

457

hdcp->auth.msg.hdcp2.ake_h_prime[0] = HDCP_2_2_AKE_SEND_HPRIME;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

458

status = read(hdcp, MOD_HDCP_MESSAGE_ID_READ_AKE_SEND_H_PRIME,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

459

hdcp->auth.msg.hdcp2.ake_h_prime+1,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

460

sizeof(hdcp->auth.msg.hdcp2.ake_h_prime)-1);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

463

status = read(hdcp, MOD_HDCP_MESSAGE_ID_READ_AKE_SEND_H_PRIME,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

464

hdcp->auth.msg.hdcp2.ake_h_prime,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

465

sizeof(hdcp->auth.msg.hdcp2.ake_h_prime));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

470

enum mod_hdcp_status mod_hdcp_read_pairing_info(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

474

if (is_dp_hdcp(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

475

hdcp->auth.msg.hdcp2.ake_pairing_info[0] = HDCP_2_2_AKE_SEND_PAIRING_INFO;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

476

status = read(hdcp, MOD_HDCP_MESSAGE_ID_READ_AKE_SEND_PAIRING_INFO,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

477

hdcp->auth.msg.hdcp2.ake_pairing_info+1,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

478

sizeof(hdcp->auth.msg.hdcp2.ake_pairing_info)-1);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

481

status = read(hdcp, MOD_HDCP_MESSAGE_ID_READ_AKE_SEND_PAIRING_INFO,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

482

hdcp->auth.msg.hdcp2.ake_pairing_info,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

483

sizeof(hdcp->auth.msg.hdcp2.ake_pairing_info));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

488

enum mod_hdcp_status mod_hdcp_read_l_prime(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

492

if (is_dp_hdcp(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

493

hdcp->auth.msg.hdcp2.lc_l_prime[0] = HDCP_2_2_LC_SEND_LPRIME;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

494

status = read(hdcp, MOD_HDCP_MESSAGE_ID_READ_LC_SEND_L_PRIME,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

495

hdcp->auth.msg.hdcp2.lc_l_prime+1,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

496

sizeof(hdcp->auth.msg.hdcp2.lc_l_prime)-1);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

499

status = read(hdcp, MOD_HDCP_MESSAGE_ID_READ_LC_SEND_L_PRIME,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

500

hdcp->auth.msg.hdcp2.lc_l_prime,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

501

sizeof(hdcp->auth.msg.hdcp2.lc_l_prime));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

506

enum mod_hdcp_status mod_hdcp_read_rx_id_list(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

510

if (is_dp_hdcp(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

515

hdcp->auth.msg.hdcp2.rx_id_list[0] = HDCP_2_2_REP_SEND_RECVID_LIST;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

516

status = read(hdcp, MOD_HDCP_MESSAGE_ID_READ_REPEATER_AUTH_SEND_RECEIVERID_LIST,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

517

hdcp->auth.msg.hdcp2.rx_id_list+1,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

521

device_count = HDCP_2_2_DEV_COUNT_LO(hdcp->auth.msg.hdcp2.rx_id_list[2]) +

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

522

(HDCP_2_2_DEV_COUNT_HI(hdcp->auth.msg.hdcp2.rx_id_list[1]) << 4);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

524

(sizeof(hdcp->auth.msg.hdcp2.rx_id_list) - 1));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

525

status = read(hdcp, MOD_HDCP_MESSAGE_ID_READ_REPEATER_AUTH_SEND_RECEIVERID_LIST_PART2,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

526

hdcp->auth.msg.hdcp2.rx_id_list + 1 + bytes_read,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

530

status = read(hdcp, MOD_HDCP_MESSAGE_ID_READ_REPEATER_AUTH_SEND_RECEIVERID_LIST,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

531

hdcp->auth.msg.hdcp2.rx_id_list,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

532

hdcp->auth.msg.hdcp2.rx_id_list_size);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

537

enum mod_hdcp_status mod_hdcp_read_stream_ready(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

541

if (is_dp_hdcp(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

542

hdcp->auth.msg.hdcp2.repeater_auth_stream_ready[0] = HDCP_2_2_REP_STREAM_READY;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

543

status = read(hdcp, MOD_HDCP_MESSAGE_ID_READ_REPEATER_AUTH_STREAM_READY,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

544

hdcp->auth.msg.hdcp2.repeater_auth_stream_ready+1,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

545

sizeof(hdcp->auth.msg.hdcp2.repeater_auth_stream_ready)-1);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

548

status = read(hdcp, MOD_HDCP_MESSAGE_ID_READ_REPEATER_AUTH_STREAM_READY,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

549

hdcp->auth.msg.hdcp2.repeater_auth_stream_ready,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

550

sizeof(hdcp->auth.msg.hdcp2.repeater_auth_stream_ready));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

555

enum mod_hdcp_status mod_hdcp_write_ake_init(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

559

if (is_dp_hdcp(hdcp))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

560

status = write(hdcp, MOD_HDCP_MESSAGE_ID_WRITE_AKE_INIT,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

561

hdcp->auth.msg.hdcp2.ake_init+1,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

562

sizeof(hdcp->auth.msg.hdcp2.ake_init)-1);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

564

status = write(hdcp, MOD_HDCP_MESSAGE_ID_WRITE_AKE_INIT,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

565

hdcp->auth.msg.hdcp2.ake_init,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

566

sizeof(hdcp->auth.msg.hdcp2.ake_init));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

570

enum mod_hdcp_status mod_hdcp_write_no_stored_km(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

574

if (is_dp_hdcp(hdcp))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

575

status = write(hdcp, MOD_HDCP_MESSAGE_ID_WRITE_AKE_NO_STORED_KM,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

576

hdcp->auth.msg.hdcp2.ake_no_stored_km+1,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

577

sizeof(hdcp->auth.msg.hdcp2.ake_no_stored_km)-1);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

579

status = write(hdcp, MOD_HDCP_MESSAGE_ID_WRITE_AKE_NO_STORED_KM,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

580

hdcp->auth.msg.hdcp2.ake_no_stored_km,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

581

sizeof(hdcp->auth.msg.hdcp2.ake_no_stored_km));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

585

enum mod_hdcp_status mod_hdcp_write_stored_km(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

589

if (is_dp_hdcp(hdcp))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

590

status = write(hdcp, MOD_HDCP_MESSAGE_ID_WRITE_AKE_STORED_KM,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

591

hdcp->auth.msg.hdcp2.ake_stored_km+1,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

592

sizeof(hdcp->auth.msg.hdcp2.ake_stored_km)-1);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

594

status = write(hdcp, MOD_HDCP_MESSAGE_ID_WRITE_AKE_STORED_KM,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

595

hdcp->auth.msg.hdcp2.ake_stored_km,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

596

sizeof(hdcp->auth.msg.hdcp2.ake_stored_km));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

600

enum mod_hdcp_status mod_hdcp_write_lc_init(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

604

if (is_dp_hdcp(hdcp))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

605

status = write(hdcp, MOD_HDCP_MESSAGE_ID_WRITE_LC_INIT,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

606

hdcp->auth.msg.hdcp2.lc_init+1,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

607

sizeof(hdcp->auth.msg.hdcp2.lc_init)-1);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

609

status = write(hdcp, MOD_HDCP_MESSAGE_ID_WRITE_LC_INIT,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

610

hdcp->auth.msg.hdcp2.lc_init,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

611

sizeof(hdcp->auth.msg.hdcp2.lc_init));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

615

enum mod_hdcp_status mod_hdcp_write_eks(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

619

if (is_dp_hdcp(hdcp))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

620

status = write(hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

622

hdcp->auth.msg.hdcp2.ske_eks+1,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

623

sizeof(hdcp->auth.msg.hdcp2.ske_eks)-1);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

625

status = write(hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

627

hdcp->auth.msg.hdcp2.ske_eks,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

628

sizeof(hdcp->auth.msg.hdcp2.ske_eks));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

632

enum mod_hdcp_status mod_hdcp_write_repeater_auth_ack(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

636

if (is_dp_hdcp(hdcp))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

637

status = write(hdcp, MOD_HDCP_MESSAGE_ID_WRITE_REPEATER_AUTH_SEND_ACK,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

638

hdcp->auth.msg.hdcp2.repeater_auth_ack+1,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

639

sizeof(hdcp->auth.msg.hdcp2.repeater_auth_ack)-1);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

641

status = write(hdcp, MOD_HDCP_MESSAGE_ID_WRITE_REPEATER_AUTH_SEND_ACK,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

642

hdcp->auth.msg.hdcp2.repeater_auth_ack,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

643

sizeof(hdcp->auth.msg.hdcp2.repeater_auth_ack));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

647

enum mod_hdcp_status mod_hdcp_write_stream_manage(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

651

if (is_dp_hdcp(hdcp))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

652

status = write(hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

654

hdcp->auth.msg.hdcp2.repeater_auth_stream_manage+1,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

655

hdcp->auth.msg.hdcp2.stream_manage_size-1);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

657

status = write(hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

659

hdcp->auth.msg.hdcp2.repeater_auth_stream_manage,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

660

hdcp->auth.msg.hdcp2.stream_manage_size);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

664

enum mod_hdcp_status mod_hdcp_write_content_type(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

668

if (is_dp_hdcp(hdcp))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

669

status = write(hdcp, MOD_HDCP_MESSAGE_ID_WRITE_CONTENT_STREAM_TYPE,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

670

hdcp->auth.msg.hdcp2.content_stream_type_dp+1,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

671

sizeof(hdcp->auth.msg.hdcp2.content_stream_type_dp)-1);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

677

enum mod_hdcp_status mod_hdcp_clear_cp_irq_status(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

682

if (is_dp_hdcp(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

683

uint32_t cp_irq_addrs = (hdcp->connection.link.dp.rev >= 0x14)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

685

return hdcp->config.ddc.funcs.write_dpcd(hdcp->config.ddc.handle, cp_irq_addrs,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

692

static bool write_stall_read_lc_fw_aux(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

694

struct mod_hdcp_message_hdcp2 *hdcp2 = &hdcp->auth.msg.hdcp2;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

710

return hdcp->config.ddc.funcs.atomic_write_poll_read_aux(

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

711

hdcp->config.ddc.handle,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

720

static bool write_poll_read_lc_fw_i2c(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

722

struct mod_hdcp_message_hdcp2 *hdcp2 = &hdcp->auth.msg.hdcp2;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

725

hdcp->buf[0] = hdcp_i2c_offsets[MOD_HDCP_MESSAGE_ID_WRITE_LC_INIT];

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

726

memmove(&hdcp->buf[1], hdcp2->lc_init, sizeof(hdcp2->lc_init));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

731

hdcp->buf,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

747

return hdcp->config.ddc.funcs.atomic_write_poll_read_i2c(

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

748

hdcp->config.ddc.handle,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

757

enum mod_hdcp_status mod_hdcp_write_poll_read_lc_fw(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

759

const bool success = (is_dp_hdcp(hdcp) ? write_stall_read_lc_fw_aux : write_poll_read_lc_fw_i2c)(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

100

sizeof(hdcp->auth.msg.hdcp2.ake_pairing_info));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

101

HDCP_DDC_WRITE_TRACE(hdcp, "LC Init", hdcp->auth.msg.hdcp2.lc_init,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

102

sizeof(hdcp->auth.msg.hdcp2.lc_init));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

103

HDCP_DDC_READ_TRACE(hdcp, "L'", hdcp->auth.msg.hdcp2.lc_l_prime,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

104

sizeof(hdcp->auth.msg.hdcp2.lc_l_prime));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

105

HDCP_DDC_WRITE_TRACE(hdcp, "Exchange KS", hdcp->auth.msg.hdcp2.ske_eks,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

106

sizeof(hdcp->auth.msg.hdcp2.ske_eks));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

107

HDCP_DDC_READ_TRACE(hdcp, "Rx Status",

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

108

(uint8_t *)&hdcp->auth.msg.hdcp2.rxstatus,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

109

sizeof(hdcp->auth.msg.hdcp2.rxstatus));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

110

HDCP_DDC_READ_TRACE(hdcp, "Rx Id List",

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

111

hdcp->auth.msg.hdcp2.rx_id_list,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

112

hdcp->auth.msg.hdcp2.rx_id_list_size);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

113

HDCP_DDC_WRITE_TRACE(hdcp, "Rx Id List Ack",

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

114

hdcp->auth.msg.hdcp2.repeater_auth_ack,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

115

sizeof(hdcp->auth.msg.hdcp2.repeater_auth_ack));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

116

HDCP_DDC_WRITE_TRACE(hdcp, "Content Stream Management",

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

117

hdcp->auth.msg.hdcp2.repeater_auth_stream_manage,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

118

hdcp->auth.msg.hdcp2.stream_manage_size);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

119

HDCP_DDC_READ_TRACE(hdcp, "Stream Ready",

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

120

hdcp->auth.msg.hdcp2.repeater_auth_stream_ready,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

121

sizeof(hdcp->auth.msg.hdcp2.repeater_auth_stream_ready));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

122

HDCP_DDC_WRITE_TRACE(hdcp, "Content Stream Type",

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

123

hdcp->auth.msg.hdcp2.content_stream_type_dp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

124

sizeof(hdcp->auth.msg.hdcp2.content_stream_type_dp));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

54

void mod_hdcp_log_ddc_trace(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

56

if (is_hdcp1(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

57

HDCP_DDC_READ_TRACE(hdcp, "BKSV", hdcp->auth.msg.hdcp1.bksv,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

58

sizeof(hdcp->auth.msg.hdcp1.bksv));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

59

HDCP_DDC_READ_TRACE(hdcp, "BCAPS", &hdcp->auth.msg.hdcp1.bcaps,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

60

sizeof(hdcp->auth.msg.hdcp1.bcaps));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

61

HDCP_DDC_READ_TRACE(hdcp, "BSTATUS",

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

62

(uint8_t *)&hdcp->auth.msg.hdcp1.bstatus,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

63

sizeof(hdcp->auth.msg.hdcp1.bstatus));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

64

HDCP_DDC_WRITE_TRACE(hdcp, "AN", hdcp->auth.msg.hdcp1.an,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

65

sizeof(hdcp->auth.msg.hdcp1.an));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

66

HDCP_DDC_WRITE_TRACE(hdcp, "AKSV", hdcp->auth.msg.hdcp1.aksv,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

67

sizeof(hdcp->auth.msg.hdcp1.aksv));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

68

HDCP_DDC_WRITE_TRACE(hdcp, "AINFO", &hdcp->auth.msg.hdcp1.ainfo,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

69

sizeof(hdcp->auth.msg.hdcp1.ainfo));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

70

HDCP_DDC_READ_TRACE(hdcp, "RI' / R0'",

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

71

(uint8_t *)&hdcp->auth.msg.hdcp1.r0p,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

72

sizeof(hdcp->auth.msg.hdcp1.r0p));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

73

HDCP_DDC_READ_TRACE(hdcp, "BINFO",

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

74

(uint8_t *)&hdcp->auth.msg.hdcp1.binfo_dp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

75

sizeof(hdcp->auth.msg.hdcp1.binfo_dp));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

76

HDCP_DDC_READ_TRACE(hdcp, "KSVLIST", hdcp->auth.msg.hdcp1.ksvlist,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

77

hdcp->auth.msg.hdcp1.ksvlist_size);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

78

HDCP_DDC_READ_TRACE(hdcp, "V'", hdcp->auth.msg.hdcp1.vp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

79

sizeof(hdcp->auth.msg.hdcp1.vp));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

80

} else if (is_hdcp2(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

81

HDCP_DDC_READ_TRACE(hdcp, "HDCP2Version",

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

82

&hdcp->auth.msg.hdcp2.hdcp2version_hdmi,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

83

sizeof(hdcp->auth.msg.hdcp2.hdcp2version_hdmi));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

84

HDCP_DDC_READ_TRACE(hdcp, "Rx Caps", hdcp->auth.msg.hdcp2.rxcaps_dp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

85

sizeof(hdcp->auth.msg.hdcp2.rxcaps_dp));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

86

HDCP_DDC_WRITE_TRACE(hdcp, "AKE Init", hdcp->auth.msg.hdcp2.ake_init,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

87

sizeof(hdcp->auth.msg.hdcp2.ake_init));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

88

HDCP_DDC_READ_TRACE(hdcp, "AKE Cert", hdcp->auth.msg.hdcp2.ake_cert,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

89

sizeof(hdcp->auth.msg.hdcp2.ake_cert));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

90

HDCP_DDC_WRITE_TRACE(hdcp, "Stored KM",

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

91

hdcp->auth.msg.hdcp2.ake_stored_km,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

92

sizeof(hdcp->auth.msg.hdcp2.ake_stored_km));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

93

HDCP_DDC_WRITE_TRACE(hdcp, "No Stored KM",

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

94

hdcp->auth.msg.hdcp2.ake_no_stored_km,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

95

sizeof(hdcp->auth.msg.hdcp2.ake_no_stored_km));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

96

HDCP_DDC_READ_TRACE(hdcp, "H'", hdcp->auth.msg.hdcp2.ake_h_prime,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

97

sizeof(hdcp->auth.msg.hdcp2.ake_h_prime));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

98

HDCP_DDC_READ_TRACE(hdcp, "Pairing Info",

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.c

99

hdcp->auth.msg.hdcp2.ake_pairing_info,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

100

HDCP_LOG_DDC(hdcp, "[Link %d] Read %s%s", hdcp->config.index, \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

101

msg_name, hdcp->buf); \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

103

#define HDCP_DDC_WRITE_TRACE(hdcp, msg_name, msg, msg_size) do { \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

104

mod_hdcp_dump_binary_message(msg, msg_size, hdcp->buf, \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

105

sizeof(hdcp->buf)); \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

106

HDCP_LOG_DDC(hdcp, "[Link %d] Write %s%s", \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

107

hdcp->config.index, msg_name,\

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

108

hdcp->buf); \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

110

#define HDCP_TOP_ADD_DISPLAY_TRACE(hdcp, i) \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

111

HDCP_LOG_TOP(hdcp, "[Link %d]\tadd display %d", \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

112

hdcp->config.index, i)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

113

#define HDCP_TOP_REMOVE_DISPLAY_TRACE(hdcp, i) \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

114

HDCP_LOG_TOP(hdcp, "[Link %d]\tremove display %d", \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

115

hdcp->config.index, i)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

116

#define HDCP_TOP_HDCP1_DESTROY_SESSION_TRACE(hdcp) \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

117

HDCP_LOG_TOP(hdcp, "[Link %d]\tdestroy hdcp1 session", \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

118

hdcp->config.index)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

119

#define HDCP_TOP_HDCP2_DESTROY_SESSION_TRACE(hdcp) \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

120

HDCP_LOG_TOP(hdcp, "[Link %d]\tdestroy hdcp2 session", \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

121

hdcp->config.index)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

122

#define HDCP_TOP_RESET_AUTH_TRACE(hdcp) \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

123

HDCP_LOG_TOP(hdcp, "[Link %d]\treset authentication", hdcp->config.index)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

124

#define HDCP_TOP_RESET_CONN_TRACE(hdcp) \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

125

HDCP_LOG_TOP(hdcp, "[Link %d]\treset connection", hdcp->config.index)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

126

#define HDCP_TOP_INTERFACE_TRACE(hdcp) do { \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

127

HDCP_LOG_TOP(hdcp, "\n"); \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

128

HDCP_LOG_TOP(hdcp, "[Link %d] %s", hdcp->config.index, __func__); \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

130

#define HDCP_TOP_INTERFACE_TRACE_WITH_INDEX(hdcp, i) do { \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

131

HDCP_LOG_TOP(hdcp, "\n"); \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

132

HDCP_LOG_TOP(hdcp, "[Link %d] %s display %d", hdcp->config.index, __func__, i); \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

135

#define HDCP_AUTH_COMPLETE_TRACE(hdcp) do { \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

136

mod_hdcp_log_ddc_trace(hdcp); \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

137

HDCP_LOG_TRA(hdcp); \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

29

#define HDCP_LOG_ERR(hdcp, ...) DRM_DEBUG_KMS(__VA_ARGS__)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

30

#define HDCP_LOG_VER(hdcp, ...) DRM_DEBUG_KMS(__VA_ARGS__)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

31

#define HDCP_LOG_FSM(hdcp, ...) DRM_DEBUG_KMS(__VA_ARGS__)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

32

#define HDCP_LOG_TOP(hdcp, ...) pr_debug("[HDCP_TOP]:"__VA_ARGS__)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

33

#define HDCP_LOG_DDC(hdcp, ...) pr_debug("[HDCP_DDC]:"__VA_ARGS__)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

34

#define HDCP_LOG_TRA(hdcp) do {} while (0)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

37

#define HDCP_ERROR_TRACE(hdcp, status) \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

38

HDCP_LOG_ERR(hdcp, \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

40

hdcp->config.index, \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

42

mod_hdcp_state_id_to_str(hdcp->state.id), \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

43

hdcp->state.stay_count)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

44

#define HDCP_HDCP1_ENABLED_TRACE(hdcp, displayIndex) \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

45

HDCP_LOG_VER(hdcp, \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

47

hdcp->config.index, displayIndex)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

48

#define HDCP_HDCP2_ENABLED_TRACE(hdcp, displayIndex) \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

49

HDCP_LOG_VER(hdcp, \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

51

hdcp->config.index, displayIndex)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

52

#define HDCP_HDCP1_DISABLED_TRACE(hdcp, displayIndex) \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

53

HDCP_LOG_VER(hdcp, \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

55

hdcp->config.index, displayIndex)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

56

#define HDCP_HDCP2_DISABLED_TRACE(hdcp, displayIndex) \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

57

HDCP_LOG_VER(hdcp, \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

59

hdcp->config.index, displayIndex)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

62

#define HDCP_REMOVE_DISPLAY_TRACE(hdcp, displayIndex) \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

63

HDCP_LOG_FSM(hdcp, \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

65

hdcp->config.index, displayIndex)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

66

#define HDCP_INPUT_PASS_TRACE(hdcp, str) \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

67

HDCP_LOG_FSM(hdcp, \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

69

hdcp->config.index, str)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

70

#define HDCP_INPUT_FAIL_TRACE(hdcp, str) \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

71

HDCP_LOG_FSM(hdcp, \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

73

hdcp->config.index, str)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

74

#define HDCP_NEXT_STATE_TRACE(hdcp, id, output) do { \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

76

HDCP_LOG_FSM(hdcp, \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

78

hdcp->config.index, \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

81

HDCP_LOG_FSM(hdcp, \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

82

"[Link %d] > %s", hdcp->config.index, \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

85

#define HDCP_TIMEOUT_TRACE(hdcp) \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

86

HDCP_LOG_FSM(hdcp, "[Link %d] --> TIMEOUT", hdcp->config.index)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

87

#define HDCP_CPIRQ_TRACE(hdcp) \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

88

HDCP_LOG_FSM(hdcp, "[Link %d] --> CPIRQ", hdcp->config.index)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

89

#define HDCP_EVENT_TRACE(hdcp, event) \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

92

HDCP_TIMEOUT_TRACE(hdcp); \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

94

HDCP_CPIRQ_TRACE(hdcp); \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

97

#define HDCP_DDC_READ_TRACE(hdcp, msg_name, msg, msg_size) do { \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

98

mod_hdcp_dump_binary_message(msg, msg_size, hdcp->buf, \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h

99

sizeof(hdcp->buf)); \

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

1011

hdcp2_message_init(hdcp, msg_in);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

1015

msg_in->process.msg1_desc.msg_size = sizeof(hdcp->auth.msg.hdcp2.repeater_auth_stream_ready);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

1017

memcpy(&msg_in->process.receiver_message[0], hdcp->auth.msg.hdcp2.repeater_auth_stream_ready,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

1018

sizeof(hdcp->auth.msg.hdcp2.repeater_auth_stream_ready));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

111

status = remove_display_from_topology_v2(hdcp, index);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

116

HDCP_TOP_REMOVE_DISPLAY_TRACE(hdcp, display->index);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

123

struct mod_hdcp *hdcp, struct mod_hdcp_display *display)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

125

struct psp_context *psp = hdcp->config.psp.handle;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

127

struct mod_hdcp_link *link = &hdcp->connection.link;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

148

if (is_dp_hdcp(hdcp))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

162

HDCP_TOP_ADD_DISPLAY_TRACE(hdcp, display->index);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

170

struct mod_hdcp *hdcp, struct mod_hdcp_display *display)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

172

struct psp_context *psp = hdcp->config.psp.handle;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

174

struct mod_hdcp_link *link = &hdcp->connection.link;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

195

if (is_dp_hdcp(hdcp))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

214

status = add_display_to_topology_v2(hdcp, display);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

218

HDCP_TOP_ADD_DISPLAY_TRACE(hdcp, display->index);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

225

struct mod_hdcp *hdcp, uint8_t index)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

229

if (hdcp->config.psp.caps.dtm_v3_supported)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

230

status = remove_display_from_topology_v3(hdcp, index);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

232

status = remove_display_from_topology_v2(hdcp, index);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

237

enum mod_hdcp_status mod_hdcp_add_display_to_topology(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

242

if (hdcp->config.psp.caps.dtm_v3_supported)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

243

status = add_display_to_topology_v3(hdcp, display);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

245

status = add_display_to_topology_v2(hdcp, display);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

250

enum mod_hdcp_status mod_hdcp_hdcp1_create_session(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

253

struct psp_context *psp = hdcp->config.psp.handle;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

254

struct mod_hdcp_display *display = get_first_active_display(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

276

hdcp->auth.id = hdcp_cmd->out_msg.hdcp1_create_session.session_handle;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

281

hdcp->auth.msg.hdcp1.ainfo = hdcp_cmd->out_msg.hdcp1_create_session.ainfo_primary;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

282

memcpy(hdcp->auth.msg.hdcp1.aksv, hdcp_cmd->out_msg.hdcp1_create_session.aksv_primary,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

283

sizeof(hdcp->auth.msg.hdcp1.aksv));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

284

memcpy(hdcp->auth.msg.hdcp1.an, hdcp_cmd->out_msg.hdcp1_create_session.an_primary,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

285

sizeof(hdcp->auth.msg.hdcp1.an));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

292

enum mod_hdcp_status mod_hdcp_hdcp1_destroy_session(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

295

struct psp_context *psp = hdcp->config.psp.handle;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

304

hdcp_cmd->in_msg.hdcp1_destroy_session.session_handle = hdcp->auth.id;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

312

HDCP_TOP_HDCP1_DESTROY_SESSION_TRACE(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

314

if (is_display_encryption_enabled(&hdcp->displays[i])) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

315

hdcp->displays[i].state =

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

318

hdcp, hdcp->displays[i].index);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

326

enum mod_hdcp_status mod_hdcp_hdcp1_validate_rx(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

328

struct psp_context *psp = hdcp->config.psp.handle;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

336

hdcp_cmd->in_msg.hdcp1_first_part_authentication.session_handle = hdcp->auth.id;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

338

memcpy(hdcp_cmd->in_msg.hdcp1_first_part_authentication.bksv_primary, hdcp->auth.msg.hdcp1.bksv,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

34

static void hdcp2_message_init(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

341

hdcp_cmd->in_msg.hdcp1_first_part_authentication.r0_prime_primary = hdcp->auth.msg.hdcp1.r0p;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

342

hdcp_cmd->in_msg.hdcp1_first_part_authentication.bcaps = hdcp->auth.msg.hdcp1.bcaps;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

352

hdcp->connection.is_repeater = 1;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

355

hdcp->connection.is_repeater = 0;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

358

hdcp->connection.is_hdcp1_revoked = 1;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

367

enum mod_hdcp_status mod_hdcp_hdcp1_enable_encryption(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

369

struct psp_context *psp = hdcp->config.psp.handle;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

37

in->session_handle = hdcp->auth.id;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

371

struct mod_hdcp_display *display = get_first_active_display(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

381

hdcp_cmd->in_msg.hdcp1_enable_encryption.session_handle = hdcp->auth.id;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

388

} else if (!is_dp_mst_hdcp(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

390

HDCP_HDCP1_ENABLED_TRACE(hdcp, display->index);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

397

enum mod_hdcp_status mod_hdcp_hdcp1_validate_ksvlist_vp(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

399

struct psp_context *psp = hdcp->config.psp.handle;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

407

hdcp_cmd->in_msg.hdcp1_second_part_authentication.session_handle = hdcp->auth.id;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

409

hdcp_cmd->in_msg.hdcp1_second_part_authentication.ksv_list_size = hdcp->auth.msg.hdcp1.ksvlist_size;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

410

memcpy(hdcp_cmd->in_msg.hdcp1_second_part_authentication.ksv_list, hdcp->auth.msg.hdcp1.ksvlist,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

411

hdcp->auth.msg.hdcp1.ksvlist_size);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

413

memcpy(hdcp_cmd->in_msg.hdcp1_second_part_authentication.v_prime, hdcp->auth.msg.hdcp1.vp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

414

sizeof(hdcp->auth.msg.hdcp1.vp));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

417

is_dp_hdcp(hdcp) ? hdcp->auth.msg.hdcp1.binfo_dp : hdcp->auth.msg.hdcp1.bstatus;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

428

hdcp->connection.is_hdcp1_revoked = 1;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

438

enum mod_hdcp_status mod_hdcp_hdcp1_enable_dp_stream_encryption(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

441

struct psp_context *psp = hdcp->config.psp.handle;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

451

if (hdcp->displays[i].adjust.disable || hdcp->displays[i].state != MOD_HDCP_DISPLAY_ACTIVE)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

456

hdcp_cmd->in_msg.hdcp1_enable_dp_stream_encryption.session_handle = hdcp->auth.id;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

457

hdcp_cmd->in_msg.hdcp1_enable_dp_stream_encryption.display_handle = hdcp->displays[i].index;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

467

hdcp->displays[i].state = MOD_HDCP_DISPLAY_ENCRYPTION_ENABLED;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

468

HDCP_HDCP1_ENABLED_TRACE(hdcp, hdcp->displays[i].index);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

475

enum mod_hdcp_status mod_hdcp_hdcp1_link_maintenance(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

477

struct psp_context *psp = hdcp->config.psp.handle;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

486

hdcp_cmd->in_msg.hdcp1_get_encryption_status.session_handle = hdcp->auth.id;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

49

struct mod_hdcp *hdcp, uint8_t index)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

501

enum mod_hdcp_status mod_hdcp_hdcp2_create_session(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

503

struct psp_context *psp = hdcp->config.psp.handle;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

505

struct mod_hdcp_display *display = get_first_active_display(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

51

struct psp_context *psp = hdcp->config.psp.handle;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

524

if (hdcp->connection.link.adjust.hdcp2.force_type == MOD_HDCP_FORCE_TYPE_0)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

527

else if (hdcp->connection.link.adjust.hdcp2.force_type == MOD_HDCP_FORCE_TYPE_1)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

530

else if (hdcp->connection.link.adjust.hdcp2.force_type == MOD_HDCP_FORCE_TYPE_MAX)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

54

get_active_display_at_index(hdcp, index);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

542

hdcp->auth.id = hdcp_cmd->out_msg.hdcp2_create_session_v2.session_handle;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

548

enum mod_hdcp_status mod_hdcp_hdcp2_destroy_session(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

550

struct psp_context *psp = hdcp->config.psp.handle;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

559

hdcp_cmd->in_msg.hdcp2_destroy_session.session_handle = hdcp->auth.id;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

567

HDCP_TOP_HDCP2_DESTROY_SESSION_TRACE(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

569

if (is_display_encryption_enabled(&hdcp->displays[i])) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

570

hdcp->displays[i].state =

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

573

hdcp, hdcp->displays[i].index);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

581

enum mod_hdcp_status mod_hdcp_hdcp2_prepare_ake_init(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

583

struct psp_context *psp = hdcp->config.psp.handle;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

596

hdcp2_message_init(hdcp, msg_in);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

606

memcpy(&hdcp->auth.msg.hdcp2.ake_init[0], &msg_out->prepare.transmitter_message[0],

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

607

sizeof(hdcp->auth.msg.hdcp2.ake_init));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

613

enum mod_hdcp_status mod_hdcp_hdcp2_validate_ake_cert(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

615

struct psp_context *psp = hdcp->config.psp.handle;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

628

hdcp2_message_init(hdcp, msg_in);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

633

memcpy(&msg_in->process.receiver_message[0], hdcp->auth.msg.hdcp2.ake_cert,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

634

sizeof(hdcp->auth.msg.hdcp2.ake_cert));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

646

memcpy(hdcp->auth.msg.hdcp2.ake_no_stored_km,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

648

sizeof(hdcp->auth.msg.hdcp2.ake_no_stored_km));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

650

memcpy(hdcp->auth.msg.hdcp2.ake_stored_km,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

651

&msg_out->prepare.transmitter_message[sizeof(hdcp->auth.msg.hdcp2.ake_no_stored_km)],

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

652

sizeof(hdcp->auth.msg.hdcp2.ake_stored_km));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

656

hdcp->connection.is_km_stored =

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

658

hdcp->connection.is_repeater =

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

663

hdcp->connection.is_hdcp2_revoked = 1;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

673

enum mod_hdcp_status mod_hdcp_hdcp2_validate_h_prime(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

675

struct psp_context *psp = hdcp->config.psp.handle;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

688

hdcp2_message_init(hdcp, msg_in);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

693

memcpy(&msg_in->process.receiver_message[0], hdcp->auth.msg.hdcp2.ake_h_prime,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

694

sizeof(hdcp->auth.msg.hdcp2.ake_h_prime));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

696

if (!hdcp->connection.is_km_stored) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

699

memcpy(&msg_in->process.receiver_message[sizeof(hdcp->auth.msg.hdcp2.ake_h_prime)],

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

700

hdcp->auth.msg.hdcp2.ake_pairing_info, sizeof(hdcp->auth.msg.hdcp2.ake_pairing_info));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

711

else if (!hdcp->connection.is_km_stored &&

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

719

enum mod_hdcp_status mod_hdcp_hdcp2_prepare_lc_init(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

721

struct psp_context *psp = hdcp->config.psp.handle;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

734

hdcp2_message_init(hdcp, msg_in);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

745

memcpy(hdcp->auth.msg.hdcp2.lc_init, &msg_out->prepare.transmitter_message[0],

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

746

sizeof(hdcp->auth.msg.hdcp2.lc_init));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

752

enum mod_hdcp_status mod_hdcp_hdcp2_validate_l_prime(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

754

struct psp_context *psp = hdcp->config.psp.handle;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

767

hdcp2_message_init(hdcp, msg_in);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

77

HDCP_TOP_REMOVE_DISPLAY_TRACE(hdcp, display->index);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

772

memcpy(&msg_in->process.receiver_message[0], hdcp->auth.msg.hdcp2.lc_l_prime,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

773

sizeof(hdcp->auth.msg.hdcp2.lc_l_prime));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

787

enum mod_hdcp_status mod_hdcp_hdcp2_prepare_eks(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

789

struct psp_context *psp = hdcp->config.psp.handle;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

802

hdcp2_message_init(hdcp, msg_in);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

806

if (is_dp_hdcp(hdcp))

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

815

memcpy(hdcp->auth.msg.hdcp2.ske_eks,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

817

sizeof(hdcp->auth.msg.hdcp2.ske_eks));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

819

sizeof(hdcp->auth.msg.hdcp2.ske_eks);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

821

if (is_dp_hdcp(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

822

memcpy(hdcp->auth.msg.hdcp2.content_stream_type_dp,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

823

&msg_out->prepare.transmitter_message[sizeof(hdcp->auth.msg.hdcp2.ske_eks)],

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

824

sizeof(hdcp->auth.msg.hdcp2.content_stream_type_dp));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

832

enum mod_hdcp_status mod_hdcp_hdcp2_enable_encryption(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

834

struct psp_context *psp = hdcp->config.psp.handle;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

836

struct mod_hdcp_display *display = get_first_active_display(hdcp);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

847

hdcp_cmd->in_msg.hdcp2_set_encryption.session_handle = hdcp->auth.id;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

85

struct mod_hdcp *hdcp, uint8_t index)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

854

} else if (!is_dp_mst_hdcp(hdcp)) {

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

856

HDCP_HDCP2_ENABLED_TRACE(hdcp, display->index);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

863

enum mod_hdcp_status mod_hdcp_hdcp2_validate_rx_id_list(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

865

struct psp_context *psp = hdcp->config.psp.handle;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

87

struct psp_context *psp = hdcp->config.psp.handle;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

879

hdcp2_message_init(hdcp, msg_in);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

882

msg_in->process.msg1_desc.msg_size = sizeof(hdcp->auth.msg.hdcp2.rx_id_list);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

883

memcpy(&msg_in->process.receiver_message[0], hdcp->auth.msg.hdcp2.rx_id_list,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

884

sizeof(hdcp->auth.msg.hdcp2.rx_id_list));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

895

memcpy(hdcp->auth.msg.hdcp2.repeater_auth_ack,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

897

sizeof(hdcp->auth.msg.hdcp2.repeater_auth_ack));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

90

get_active_display_at_index(hdcp, index);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

901

hdcp->connection.is_km_stored = msg_out->process.is_km_stored ? 1 : 0;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

902

hdcp->connection.is_repeater = msg_out->process.is_repeater ? 1 : 0;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

906

hdcp->connection.is_hdcp2_revoked = 1;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

916

enum mod_hdcp_status mod_hdcp_hdcp2_enable_dp_stream_encryption(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

918

struct psp_context *psp = hdcp->config.psp.handle;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

930

hdcp2_message_init(hdcp, msg_in);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

934

if (hdcp->displays[i].adjust.disable || hdcp->displays[i].state != MOD_HDCP_DISPLAY_ACTIVE)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

937

hdcp_cmd->in_msg.hdcp2_enable_dp_stream_encryption.display_handle = hdcp->displays[i].index;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

938

hdcp_cmd->in_msg.hdcp2_enable_dp_stream_encryption.session_handle = hdcp->auth.id;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

946

hdcp->displays[i].state = MOD_HDCP_DISPLAY_ENCRYPTION_ENABLED;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

947

HDCP_HDCP2_ENABLED_TRACE(hdcp, hdcp->displays[i].index);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

959

enum mod_hdcp_status mod_hdcp_hdcp2_prepare_stream_management(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

962

struct psp_context *psp = hdcp->config.psp.handle;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

975

hdcp2_message_init(hdcp, msg_in);

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

986

hdcp->auth.msg.hdcp2.stream_manage_size = msg_out->prepare.msg1_desc.msg_size;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

988

memcpy(hdcp->auth.msg.hdcp2.repeater_auth_stream_manage,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

990

sizeof(hdcp->auth.msg.hdcp2.repeater_auth_stream_manage));

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

996

enum mod_hdcp_status mod_hdcp_hdcp2_validate_stream_ready(struct mod_hdcp *hdcp)

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c

998

struct psp_context *psp = hdcp->config.psp.handle;

drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h

333

enum mod_hdcp_status mod_hdcp_setup(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h

337

enum mod_hdcp_status mod_hdcp_teardown(struct mod_hdcp *hdcp);

drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h

340

enum mod_hdcp_status mod_hdcp_add_display(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h

345

enum mod_hdcp_status mod_hdcp_remove_display(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h

349

enum mod_hdcp_status mod_hdcp_update_display(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h

356

enum mod_hdcp_status mod_hdcp_query_display(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h

360

enum mod_hdcp_status mod_hdcp_reset_connection(struct mod_hdcp *hdcp,

drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h

364

enum mod_hdcp_status mod_hdcp_process_event(struct mod_hdcp *hdcp,

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.h

413

struct cdns_mhdp_hdcp hdcp;

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

438

mutex_lock(&mhdp->hdcp.mutex);

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

439

if (mhdp->hdcp.value == DRM_MODE_CONTENT_PROTECTION_UNDESIRED)

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

452

mhdp->hdcp.value = DRM_MODE_CONTENT_PROTECTION_DESIRED;

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

453

schedule_work(&mhdp->hdcp.prop_work);

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

457

ret = _cdns_mhdp_hdcp_enable(mhdp, mhdp->hdcp.hdcp_content_type);

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

459

mhdp->hdcp.value = DRM_MODE_CONTENT_PROTECTION_DESIRED;

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

460

schedule_work(&mhdp->hdcp.prop_work);

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

463

mutex_unlock(&mhdp->hdcp.mutex);

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

470

struct cdns_mhdp_hdcp *hdcp = container_of(d_work,

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

473

struct cdns_mhdp_device *mhdp = container_of(hdcp,

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

475

hdcp);

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

478

schedule_delayed_work(&hdcp->check_work,

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

484

struct cdns_mhdp_hdcp *hdcp = container_of(work,

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

487

struct cdns_mhdp_device *mhdp = container_of(hdcp,

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

489

hdcp);

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

494

mutex_lock(&mhdp->hdcp.mutex);

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

495

if (mhdp->hdcp.value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

497

state->content_protection = mhdp->hdcp.value;

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

499

mutex_unlock(&mhdp->hdcp.mutex);

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

507

mutex_lock(&mhdp->hdcp.mutex);

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

512

mhdp->hdcp.hdcp_content_type = content_type;

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

513

mhdp->hdcp.value = DRM_MODE_CONTENT_PROTECTION_ENABLED;

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

514

schedule_work(&mhdp->hdcp.prop_work);

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

515

schedule_delayed_work(&mhdp->hdcp.check_work,

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

518

mutex_unlock(&mhdp->hdcp.mutex);

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

526

mutex_lock(&mhdp->hdcp.mutex);

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

527

if (mhdp->hdcp.value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

528

mhdp->hdcp.value = DRM_MODE_CONTENT_PROTECTION_UNDESIRED;

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

529

schedule_work(&mhdp->hdcp.prop_work);

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

532

mutex_unlock(&mhdp->hdcp.mutex);

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

533

cancel_delayed_work_sync(&mhdp->hdcp.check_work);

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

540

INIT_DELAYED_WORK(&mhdp->hdcp.check_work, cdns_mhdp_hdcp_check_work);

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

541

INIT_WORK(&mhdp->hdcp.prop_work, cdns_mhdp_hdcp_prop_work);

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c

542

mutex_init(&mhdp->hdcp.mutex);

drivers/gpu/drm/i915/display/intel_ddi.c

4670

kfree(dig_port->hdcp.port_data.streams);

drivers/gpu/drm/i915/display/intel_display_core.h

456

} hdcp;

drivers/gpu/drm/i915/display/intel_display_driver.c

184

mutex_init(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_display_types.h

1996

} hdcp;

drivers/gpu/drm/i915/display/intel_display_types.h

609

struct intel_hdcp hdcp;

drivers/gpu/drm/i915/display/intel_dp_hdcp.c

404

struct intel_hdcp *hdcp = &dp->attached_connector->hdcp;

drivers/gpu/drm/i915/display/intel_dp_hdcp.c

409

if (msg_id == HDCP_2_2_AKE_SEND_HPRIME && !hdcp->is_paired)

drivers/gpu/drm/i915/display/intel_dp_hdcp.c

45

struct intel_hdcp *hdcp = &dp->attached_connector->hdcp;

drivers/gpu/drm/i915/display/intel_dp_hdcp.c

48

#define C (hdcp->cp_irq_count_cached != atomic_read(&hdcp->cp_irq_count))

drivers/gpu/drm/i915/display/intel_dp_hdcp.c

49

ret = wait_event_interruptible_timeout(hdcp->cp_irq_queue, C,

drivers/gpu/drm/i915/display/intel_dp_hdcp.c

522

struct intel_hdcp *hdcp = &dp->attached_connector->hdcp;

drivers/gpu/drm/i915/display/intel_dp_hdcp.c

540

hdcp->cp_irq_count_cached = atomic_read(&hdcp->cp_irq_count);

drivers/gpu/drm/i915/display/intel_dp_hdcp.c

752

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_dp_hdcp.c

756

hdcp->stream_transcoder, enable,

drivers/gpu/drm/i915/display/intel_dp_hdcp.c

770

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_dp_hdcp.c

772

enum transcoder cpu_transcoder = hdcp->stream_transcoder;

drivers/gpu/drm/i915/display/intel_dp_hdcp.c

802

struct hdcp_port_data *data = &dig_port->hdcp.port_data;

drivers/gpu/drm/i915/display/intel_dp_hdcp.c

803

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_dp_hdcp.c

804

enum transcoder cpu_transcoder = hdcp->stream_transcoder;

drivers/gpu/drm/i915/display/intel_dp_hdcp.c

848

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_dp_hdcp.c

857

if (hdcp->is_repeater) {

drivers/gpu/drm/i915/display/intel_encoder.c

120

mutex_init(&dig_port->hdcp.mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1003

transcoder_name(hdcp->stream_transcoder));

drivers/gpu/drm/i915/display/intel_hdcp.c

1009

if (dig_port->hdcp.num_streams > 0)

drivers/gpu/drm/i915/display/intel_hdcp.c

1013

hdcp->hdcp_encrypted = false;

drivers/gpu/drm/i915/display/intel_hdcp.c

1027

ret = hdcp->shim->toggle_signalling(dig_port, cpu_transcoder, false);

drivers/gpu/drm/i915/display/intel_hdcp.c

1040

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_hdcp.c

1063

intel_hdcp_adjust_hdcp_line_rekeying(connector->encoder, hdcp, true);

drivers/gpu/drm/i915/display/intel_hdcp.c

1069

hdcp->hdcp_encrypted = true;

drivers/gpu/drm/i915/display/intel_hdcp.c

1084

static struct intel_connector *intel_hdcp_to_connector(struct intel_hdcp *hdcp)

drivers/gpu/drm/i915/display/intel_hdcp.c

1086

return container_of(hdcp, struct intel_connector, hdcp);

drivers/gpu/drm/i915/display/intel_hdcp.c

1094

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_hdcp.c

1096

drm_WARN_ON(display->drm, !mutex_is_locked(&hdcp->mutex));

drivers/gpu/drm/i915/display/intel_hdcp.c

1098

if (hdcp->value == value)

drivers/gpu/drm/i915/display/intel_hdcp.c

1101

drm_WARN_ON(display->drm, !mutex_is_locked(&dig_port->hdcp.mutex));

drivers/gpu/drm/i915/display/intel_hdcp.c

1103

if (hdcp->value == DRM_MODE_CONTENT_PROTECTION_ENABLED) {

drivers/gpu/drm/i915/display/intel_hdcp.c

1104

if (!drm_WARN_ON(display->drm, dig_port->hdcp.num_streams == 0))

drivers/gpu/drm/i915/display/intel_hdcp.c

1105

dig_port->hdcp.num_streams--;

drivers/gpu/drm/i915/display/intel_hdcp.c

1107

dig_port->hdcp.num_streams++;

drivers/gpu/drm/i915/display/intel_hdcp.c

1110

hdcp->value = value;

drivers/gpu/drm/i915/display/intel_hdcp.c

1113

if (!queue_work(display->wq.unordered, &hdcp->prop_work))

drivers/gpu/drm/i915/display/intel_hdcp.c

1123

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_hdcp.c

1128

mutex_lock(&hdcp->mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1129

mutex_lock(&dig_port->hdcp.mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1131

cpu_transcoder = hdcp->cpu_transcoder;

drivers/gpu/drm/i915/display/intel_hdcp.c

1134

if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_ENABLED ||

drivers/gpu/drm/i915/display/intel_hdcp.c

1135

!hdcp->hdcp_encrypted) {

drivers/gpu/drm/i915/display/intel_hdcp.c

1153

if (hdcp->shim->check_link(dig_port, connector)) {

drivers/gpu/drm/i915/display/intel_hdcp.c

1154

if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {

drivers/gpu/drm/i915/display/intel_hdcp.c

1184

mutex_unlock(&dig_port->hdcp.mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1185

mutex_unlock(&hdcp->mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

119

struct hdcp_port_data *data = &dig_port->hdcp.port_data;

drivers/gpu/drm/i915/display/intel_hdcp.c

1191

struct intel_hdcp *hdcp = container_of(work, struct intel_hdcp,

drivers/gpu/drm/i915/display/intel_hdcp.c

1193

struct intel_connector *connector = intel_hdcp_to_connector(hdcp);

drivers/gpu/drm/i915/display/intel_hdcp.c

1197

mutex_lock(&hdcp->mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1204

if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED)

drivers/gpu/drm/i915/display/intel_hdcp.c

1206

hdcp->value);

drivers/gpu/drm/i915/display/intel_hdcp.c

1208

mutex_unlock(&hdcp->mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1226

struct hdcp_port_data *data = &dig_port->hdcp.port_data;

drivers/gpu/drm/i915/display/intel_hdcp.c

123

if (dig_port->hdcp.auth_status)

drivers/gpu/drm/i915/display/intel_hdcp.c

1230

mutex_lock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1231

arbiter = display->hdcp.arbiter;

drivers/gpu/drm/i915/display/intel_hdcp.c

1234

mutex_unlock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1242

mutex_unlock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1256

struct hdcp_port_data *data = &dig_port->hdcp.port_data;

drivers/gpu/drm/i915/display/intel_hdcp.c

1260

mutex_lock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1261

arbiter = display->hdcp.arbiter;

drivers/gpu/drm/i915/display/intel_hdcp.c

1264

mutex_unlock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1274

mutex_unlock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

128

if (!dig_port->hdcp.mst_type1_capable)

drivers/gpu/drm/i915/display/intel_hdcp.c

1284

struct hdcp_port_data *data = &dig_port->hdcp.port_data;

drivers/gpu/drm/i915/display/intel_hdcp.c

1288

mutex_lock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1289

arbiter = display->hdcp.arbiter;

drivers/gpu/drm/i915/display/intel_hdcp.c

1292

mutex_unlock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1299

mutex_unlock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1310

struct hdcp_port_data *data = &dig_port->hdcp.port_data;

drivers/gpu/drm/i915/display/intel_hdcp.c

1314

mutex_lock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1315

arbiter = display->hdcp.arbiter;

drivers/gpu/drm/i915/display/intel_hdcp.c

1318

mutex_unlock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1326

mutex_unlock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1337

struct hdcp_port_data *data = &dig_port->hdcp.port_data;

drivers/gpu/drm/i915/display/intel_hdcp.c

1341

mutex_lock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1342

arbiter = display->hdcp.arbiter;

drivers/gpu/drm/i915/display/intel_hdcp.c

1345

mutex_unlock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1353

mutex_unlock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1364

struct hdcp_port_data *data = &dig_port->hdcp.port_data;

drivers/gpu/drm/i915/display/intel_hdcp.c

1368

mutex_lock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1369

arbiter = display->hdcp.arbiter;

drivers/gpu/drm/i915/display/intel_hdcp.c

1372

mutex_unlock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1380

mutex_unlock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1390

struct hdcp_port_data *data = &dig_port->hdcp.port_data;

drivers/gpu/drm/i915/display/intel_hdcp.c

1394

mutex_lock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1395

arbiter = display->hdcp.arbiter;

drivers/gpu/drm/i915/display/intel_hdcp.c

1398

mutex_unlock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1406

mutex_unlock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1419

struct hdcp_port_data *data = &dig_port->hdcp.port_data;

drivers/gpu/drm/i915/display/intel_hdcp.c

1423

mutex_lock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1424

arbiter = display->hdcp.arbiter;

drivers/gpu/drm/i915/display/intel_hdcp.c

1427

mutex_unlock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1438

mutex_unlock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1449

struct hdcp_port_data *data = &dig_port->hdcp.port_data;

drivers/gpu/drm/i915/display/intel_hdcp.c

1453

mutex_lock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1454

arbiter = display->hdcp.arbiter;

drivers/gpu/drm/i915/display/intel_hdcp.c

1457

mutex_unlock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1464

mutex_unlock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1473

struct hdcp_port_data *data = &dig_port->hdcp.port_data;

drivers/gpu/drm/i915/display/intel_hdcp.c

1477

mutex_lock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1478

arbiter = display->hdcp.arbiter;

drivers/gpu/drm/i915/display/intel_hdcp.c

1481

mutex_unlock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1489

mutex_unlock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1501

mutex_lock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1502

arbiter = display->hdcp.arbiter;

drivers/gpu/drm/i915/display/intel_hdcp.c

1505

mutex_unlock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1510

&dig_port->hdcp.port_data);

drivers/gpu/drm/i915/display/intel_hdcp.c

1511

mutex_unlock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

1527

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_hdcp.c

1535

const struct intel_hdcp_shim *shim = hdcp->shim;

drivers/gpu/drm/i915/display/intel_hdcp.c

1540

hdcp->seq_num_v = 0;

drivers/gpu/drm/i915/display/intel_hdcp.c

1541

hdcp->seq_num_m = 0;

drivers/gpu/drm/i915/display/intel_hdcp.c

1591

hdcp->is_repeater = HDCP_2_2_RX_REPEATER(msgs.send_cert.rx_caps[2]);

drivers/gpu/drm/i915/display/intel_hdcp.c

1605

&hdcp->is_paired,

drivers/gpu/drm/i915/display/intel_hdcp.c

1623

if (!hdcp->is_paired) {

drivers/gpu/drm/i915/display/intel_hdcp.c

1635

hdcp->is_paired = true;

drivers/gpu/drm/i915/display/intel_hdcp.c

1643

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_hdcp.c

1648

const struct intel_hdcp_shim *shim = hdcp->shim;

drivers/gpu/drm/i915/display/intel_hdcp.c

1678

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_hdcp.c

1686

ret = hdcp->shim->write_2_2_msg(connector, &send_eks,

drivers/gpu/drm/i915/display/intel_hdcp.c

1698

struct hdcp_port_data *data = &dig_port->hdcp.port_data;

drivers/gpu/drm/i915/display/intel_hdcp.c

1699

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_hdcp.c

1704

const struct intel_hdcp_shim *shim = hdcp->shim;

drivers/gpu/drm/i915/display/intel_hdcp.c

1707

if (connector->hdcp.seq_num_m > HDCP_2_2_SEQ_NUM_MAX)

drivers/gpu/drm/i915/display/intel_hdcp.c

171

struct hdcp_port_data *data = &dig_port->hdcp.port_data;

drivers/gpu/drm/i915/display/intel_hdcp.c

1712

drm_hdcp_cpu_to_be24(msgs.stream_manage.seq_num_m, hdcp->seq_num_m);

drivers/gpu/drm/i915/display/intel_hdcp.c

172

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_hdcp.c

1734

data->seq_num_m = hdcp->seq_num_m;

drivers/gpu/drm/i915/display/intel_hdcp.c

1739

hdcp->seq_num_m++;

drivers/gpu/drm/i915/display/intel_hdcp.c

1749

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_hdcp.c

1754

const struct intel_hdcp_shim *shim = hdcp->shim;

drivers/gpu/drm/i915/display/intel_hdcp.c

1776

dig_port->hdcp.mst_type1_capable =

drivers/gpu/drm/i915/display/intel_hdcp.c

1780

if (!dig_port->hdcp.mst_type1_capable && hdcp->content_type) {

drivers/gpu/drm/i915/display/intel_hdcp.c

179

data->streams[0].stream_type = hdcp->content_type;

drivers/gpu/drm/i915/display/intel_hdcp.c

1790

if (!hdcp->hdcp2_encrypted && seq_num_v) {

drivers/gpu/drm/i915/display/intel_hdcp.c

1796

if (seq_num_v < hdcp->seq_num_v) {

drivers/gpu/drm/i915/display/intel_hdcp.c

1817

hdcp->seq_num_v = seq_num_v;

drivers/gpu/drm/i915/display/intel_hdcp.c

1829

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_hdcp.c

1830

const struct intel_hdcp_shim *shim = hdcp->shim;

drivers/gpu/drm/i915/display/intel_hdcp.c

1854

hdcp->is_repeater,

drivers/gpu/drm/i915/display/intel_hdcp.c

1855

hdcp->content_type);

drivers/gpu/drm/i915/display/intel_hdcp.c

1860

if (hdcp->is_repeater) {

drivers/gpu/drm/i915/display/intel_hdcp.c

1876

struct hdcp_port_data *data = &dig_port->hdcp.port_data;

drivers/gpu/drm/i915/display/intel_hdcp.c

1877

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_hdcp.c

1878

enum transcoder cpu_transcoder = hdcp->cpu_transcoder;

drivers/gpu/drm/i915/display/intel_hdcp.c

1890

if (hdcp->shim->stream_2_2_encryption) {

drivers/gpu/drm/i915/display/intel_hdcp.c

1891

ret = hdcp->shim->stream_2_2_encryption(connector, true);

drivers/gpu/drm/i915/display/intel_hdcp.c

1898

transcoder_name(hdcp->stream_transcoder));

drivers/gpu/drm/i915/display/intel_hdcp.c

1907

dig_port->hdcp.auth_status = false;

drivers/gpu/drm/i915/display/intel_hdcp.c

1917

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_hdcp.c

1919

enum transcoder cpu_transcoder = hdcp->cpu_transcoder;

drivers/gpu/drm/i915/display/intel_hdcp.c

1925

if (hdcp->shim->toggle_signalling) {

drivers/gpu/drm/i915/display/intel_hdcp.c

1926

ret = hdcp->shim->toggle_signalling(dig_port, cpu_transcoder,

drivers/gpu/drm/i915/display/intel_hdcp.c

1946

dig_port->hdcp.auth_status = true;

drivers/gpu/drm/i915/display/intel_hdcp.c

1955

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_hdcp.c

1957

enum transcoder cpu_transcoder = hdcp->cpu_transcoder;

drivers/gpu/drm/i915/display/intel_hdcp.c

1974

if (hdcp->shim->toggle_signalling) {

drivers/gpu/drm/i915/display/intel_hdcp.c

1975

ret = hdcp->shim->toggle_signalling(dig_port, cpu_transcoder,

drivers/gpu/drm/i915/display/intel_hdcp.c

1994

if (!connector->hdcp.is_repeater)

drivers/gpu/drm/i915/display/intel_hdcp.c

2003

if (connector->hdcp.seq_num_m > HDCP_2_2_SEQ_NUM_MAX) {

drivers/gpu/drm/i915/display/intel_hdcp.c

2024

for (i = 0; i < tries && !dig_port->hdcp.auth_status; i++) {

drivers/gpu/drm/i915/display/intel_hdcp.c

2057

if (!ret && !dig_port->hdcp.auth_status) {

drivers/gpu/drm/i915/display/intel_hdcp.c

2082

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_hdcp.c

2087

hdcp->content_type);

drivers/gpu/drm/i915/display/intel_hdcp.c

2089

intel_hdcp_adjust_hdcp_line_rekeying(connector->encoder, hdcp, false);

drivers/gpu/drm/i915/display/intel_hdcp.c

2094

hdcp->content_type, ret);

drivers/gpu/drm/i915/display/intel_hdcp.c

2100

hdcp->content_type);

drivers/gpu/drm/i915/display/intel_hdcp.c

2102

hdcp->hdcp2_encrypted = true;

drivers/gpu/drm/i915/display/intel_hdcp.c

2111

struct hdcp_port_data *data = &dig_port->hdcp.port_data;

drivers/gpu/drm/i915/display/intel_hdcp.c

2112

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_hdcp.c

2118

if (hdcp->shim->stream_2_2_encryption) {

drivers/gpu/drm/i915/display/intel_hdcp.c

2119

ret = hdcp->shim->stream_2_2_encryption(connector, false);

drivers/gpu/drm/i915/display/intel_hdcp.c

2126

transcoder_name(hdcp->stream_transcoder));

drivers/gpu/drm/i915/display/intel_hdcp.c

2128

if (dig_port->hdcp.num_streams > 0 && !hdcp2_link_recovery)

drivers/gpu/drm/i915/display/intel_hdcp.c

2137

connector->hdcp.hdcp2_encrypted = false;

drivers/gpu/drm/i915/display/intel_hdcp.c

2138

dig_port->hdcp.auth_status = false;

drivers/gpu/drm/i915/display/intel_hdcp.c

2149

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_hdcp.c

2154

mutex_lock(&hdcp->mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

2155

mutex_lock(&dig_port->hdcp.mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

2156

cpu_transcoder = hdcp->cpu_transcoder;

drivers/gpu/drm/i915/display/intel_hdcp.c

2159

if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_ENABLED ||

drivers/gpu/drm/i915/display/intel_hdcp.c

2160

!hdcp->hdcp2_encrypted) {

drivers/gpu/drm/i915/display/intel_hdcp.c

2178

ret = hdcp->shim->check_2_2_link(dig_port, connector);

drivers/gpu/drm/i915/display/intel_hdcp.c

2180

if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {

drivers/gpu/drm/i915/display/intel_hdcp.c

2189

if (hdcp->value == DRM_MODE_CONTENT_PROTECTION_UNDESIRED)

drivers/gpu/drm/i915/display/intel_hdcp.c

2226

mutex_unlock(&dig_port->hdcp.mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

2227

mutex_unlock(&hdcp->mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

2233

struct intel_hdcp *hdcp = container_of(to_delayed_work(work),

drivers/gpu/drm/i915/display/intel_hdcp.c

2236

struct intel_connector *connector = intel_hdcp_to_connector(hdcp);

drivers/gpu/drm/i915/display/intel_hdcp.c

224

const struct intel_hdcp_shim *shim = connector->hdcp.shim;

drivers/gpu/drm/i915/display/intel_hdcp.c

2243

queue_delayed_work(display->wq.unordered, &hdcp->check_work,

drivers/gpu/drm/i915/display/intel_hdcp.c

2246

queue_delayed_work(display->wq.unordered, &hdcp->check_work,

drivers/gpu/drm/i915/display/intel_hdcp.c

2256

mutex_lock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

2257

display->hdcp.arbiter = (struct i915_hdcp_arbiter *)data;

drivers/gpu/drm/i915/display/intel_hdcp.c

2258

display->hdcp.arbiter->hdcp_dev = mei_kdev;

drivers/gpu/drm/i915/display/intel_hdcp.c

2259

mutex_unlock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

2270

mutex_lock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

2271

display->hdcp.arbiter = NULL;

drivers/gpu/drm/i915/display/intel_hdcp.c

2272

mutex_unlock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

2307

struct hdcp_port_data *data = &dig_port->hdcp.port_data;

drivers/gpu/drm/i915/display/intel_hdcp.c

2361

mutex_lock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

2362

drm_WARN_ON(display->drm, display->hdcp.comp_added);

drivers/gpu/drm/i915/display/intel_hdcp.c

2364

display->hdcp.comp_added = true;

drivers/gpu/drm/i915/display/intel_hdcp.c

2365

mutex_unlock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

2375

mutex_lock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

2376

display->hdcp.comp_added = false;

drivers/gpu/drm/i915/display/intel_hdcp.c

2377

mutex_unlock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

2387

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_hdcp.c

2396

hdcp->hdcp2_supported = true;

drivers/gpu/drm/i915/display/intel_hdcp.c

2404

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_hdcp.c

2414

hdcp->hdcp2_supported);

drivers/gpu/drm/i915/display/intel_hdcp.c

2416

hdcp->hdcp2_supported = false;

drivers/gpu/drm/i915/display/intel_hdcp.c

2417

kfree(dig_port->hdcp.port_data.streams);

drivers/gpu/drm/i915/display/intel_hdcp.c

2421

hdcp->shim = shim;

drivers/gpu/drm/i915/display/intel_hdcp.c

2422

mutex_init(&hdcp->mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

2423

INIT_DELAYED_WORK(&hdcp->check_work, intel_hdcp_check_work);

drivers/gpu/drm/i915/display/intel_hdcp.c

2424

INIT_WORK(&hdcp->prop_work, intel_hdcp_prop_work);

drivers/gpu/drm/i915/display/intel_hdcp.c

2425

init_waitqueue_head(&hdcp->cp_irq_queue);

drivers/gpu/drm/i915/display/intel_hdcp.c

2439

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_hdcp.c

2443

if (!hdcp->shim)

drivers/gpu/drm/i915/display/intel_hdcp.c

2446

mutex_lock(&hdcp->mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

2447

mutex_lock(&dig_port->hdcp.mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

2449

hdcp->value == DRM_MODE_CONTENT_PROTECTION_ENABLED);

drivers/gpu/drm/i915/display/intel_hdcp.c

2450

hdcp->content_type = (u8)conn_state->hdcp_content_type;

drivers/gpu/drm/i915/display/intel_hdcp.c

2453

hdcp->cpu_transcoder = pipe_config->mst_master_transcoder;

drivers/gpu/drm/i915/display/intel_hdcp.c

2454

hdcp->stream_transcoder = pipe_config->cpu_transcoder;

drivers/gpu/drm/i915/display/intel_hdcp.c

2456

hdcp->cpu_transcoder = pipe_config->cpu_transcoder;

drivers/gpu/drm/i915/display/intel_hdcp.c

2457

hdcp->stream_transcoder = INVALID_TRANSCODER;

drivers/gpu/drm/i915/display/intel_hdcp.c

2461

dig_port->hdcp.port_data.hdcp_transcoder =

drivers/gpu/drm/i915/display/intel_hdcp.c

2462

intel_get_hdcp_transcoder(hdcp->cpu_transcoder);

drivers/gpu/drm/i915/display/intel_hdcp.c

2468

if (!hdcp->force_hdcp14 && intel_hdcp2_get_capability(connector)) {

drivers/gpu/drm/i915/display/intel_hdcp.c

2475

if (hdcp->force_hdcp14)

drivers/gpu/drm/i915/display/intel_hdcp.c

2483

hdcp->content_type != DRM_MODE_HDCP_CONTENT_TYPE1) {

drivers/gpu/drm/i915/display/intel_hdcp.c

2488

queue_delayed_work(display->wq.unordered, &hdcp->check_work,

drivers/gpu/drm/i915/display/intel_hdcp.c

2495

mutex_unlock(&dig_port->hdcp.mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

2496

mutex_unlock(&hdcp->mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

2507

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_hdcp.c

2516

DRM_MODE_CONTENT_PROTECTION_ENABLED && hdcp->value ==

drivers/gpu/drm/i915/display/intel_hdcp.c

2524

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_hdcp.c

2527

if (!hdcp->shim)

drivers/gpu/drm/i915/display/intel_hdcp.c

253

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_hdcp.c

2530

mutex_lock(&hdcp->mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

2531

mutex_lock(&dig_port->hdcp.mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

2533

if (hdcp->value == DRM_MODE_CONTENT_PROTECTION_UNDESIRED)

drivers/gpu/drm/i915/display/intel_hdcp.c

2538

if (hdcp->hdcp2_encrypted)

drivers/gpu/drm/i915/display/intel_hdcp.c

2540

else if (hdcp->hdcp_encrypted)

drivers/gpu/drm/i915/display/intel_hdcp.c

2544

mutex_unlock(&dig_port->hdcp.mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

2545

mutex_unlock(&hdcp->mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

2546

cancel_delayed_work_sync(&hdcp->check_work);

drivers/gpu/drm/i915/display/intel_hdcp.c

2557

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_hdcp.c

256

if (!hdcp->hdcp2_supported)

drivers/gpu/drm/i915/display/intel_hdcp.c

2561

if (!connector->hdcp.shim)

drivers/gpu/drm/i915/display/intel_hdcp.c

2565

(conn_state->hdcp_content_type != hdcp->content_type &&

drivers/gpu/drm/i915/display/intel_hdcp.c

2583

mutex_lock(&hdcp->mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

2584

hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;

drivers/gpu/drm/i915/display/intel_hdcp.c

2586

if (!queue_work(display->wq.unordered, &hdcp->prop_work))

drivers/gpu/drm/i915/display/intel_hdcp.c

2588

mutex_unlock(&hdcp->mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

2593

mutex_lock(&hdcp->mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

2596

hdcp->value != DRM_MODE_CONTENT_PROTECTION_ENABLED;

drivers/gpu/drm/i915/display/intel_hdcp.c

2597

mutex_unlock(&hdcp->mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

2604

if (!queue_work(display->wq.unordered, &hdcp->prop_work))

drivers/gpu/drm/i915/display/intel_hdcp.c

2616

if (!connector->hdcp.shim)

drivers/gpu/drm/i915/display/intel_hdcp.c

2619

cancel_delayed_work_sync(&connector->hdcp.check_work);

drivers/gpu/drm/i915/display/intel_hdcp.c

2620

cancel_work_sync(&connector->hdcp.prop_work);

drivers/gpu/drm/i915/display/intel_hdcp.c

2625

mutex_lock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

2626

if (!display->hdcp.comp_added) {

drivers/gpu/drm/i915/display/intel_hdcp.c

2627

mutex_unlock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

2631

display->hdcp.comp_added = false;

drivers/gpu/drm/i915/display/intel_hdcp.c

2632

mutex_unlock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

2642

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_hdcp.c

2644

if (!hdcp->shim)

drivers/gpu/drm/i915/display/intel_hdcp.c

2658

cancel_delayed_work_sync(&hdcp->check_work);

drivers/gpu/drm/i915/display/intel_hdcp.c

266

mutex_lock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

2669

drm_WARN_ON(connector->base.dev, work_pending(&hdcp->prop_work));

drivers/gpu/drm/i915/display/intel_hdcp.c

267

if (!display->hdcp.comp_added || !display->hdcp.arbiter) {

drivers/gpu/drm/i915/display/intel_hdcp.c

2671

mutex_lock(&hdcp->mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

2672

hdcp->shim = NULL;

drivers/gpu/drm/i915/display/intel_hdcp.c

2673

mutex_unlock(&hdcp->mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

268

mutex_unlock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

271

mutex_unlock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp.c

2726

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_hdcp.c

2729

if (!hdcp->shim)

drivers/gpu/drm/i915/display/intel_hdcp.c

2732

atomic_inc(&connector->hdcp.cp_irq_count);

drivers/gpu/drm/i915/display/intel_hdcp.c

2733

wake_up_all(&connector->hdcp.cp_irq_queue);

drivers/gpu/drm/i915/display/intel_hdcp.c

2735

queue_delayed_work(display->wq.unordered, &hdcp->check_work, 0);

drivers/gpu/drm/i915/display/intel_hdcp.c

2743

if (!connector->hdcp.shim) {

drivers/gpu/drm/i915/display/intel_hdcp.c

279

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_hdcp.c

2810

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_hdcp.c

2821

hdcp->force_hdcp14 = force_hdcp14;

drivers/gpu/drm/i915/display/intel_hdcp.c

2832

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_hdcp.c

2850

str_yes_no(hdcp->force_hdcp14));

drivers/gpu/drm/i915/display/intel_hdcp.c

286

hdcp->shim->hdcp_2_2_get_capability(connector, &capable);

drivers/gpu/drm/i915/display/intel_hdcp.c

295

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_hdcp.c

297

if (!hdcp->shim->get_remote_hdcp_capability)

drivers/gpu/drm/i915/display/intel_hdcp.c

300

hdcp->shim->get_remote_hdcp_capability(connector, hdcp_capable,

drivers/gpu/drm/i915/display/intel_hdcp.c

46

struct intel_hdcp *hdcp,

drivers/gpu/drm/i915/display/intel_hdcp.c

486

enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder;

drivers/gpu/drm/i915/display/intel_hdcp.c

58

rekey_reg = TRANS_DDI_FUNC_CTL(display, hdcp->cpu_transcoder);

drivers/gpu/drm/i915/display/intel_hdcp.c

62

rekey_reg = TRANS_DDI_FUNC_CTL(display, hdcp->cpu_transcoder);

drivers/gpu/drm/i915/display/intel_hdcp.c

65

rekey_reg = CHICKEN_TRANS(display, hdcp->cpu_transcoder);

drivers/gpu/drm/i915/display/intel_hdcp.c

728

const struct intel_hdcp_shim *shim = connector->hdcp.shim;

drivers/gpu/drm/i915/display/intel_hdcp.c

811

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_hdcp.c

812

const struct intel_hdcp_shim *shim = hdcp->shim;

drivers/gpu/drm/i915/display/intel_hdcp.c

813

enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder;

drivers/gpu/drm/i915/display/intel_hdcp.c

972

transcoder_name(hdcp->stream_transcoder));

drivers/gpu/drm/i915/display/intel_hdcp.c

986

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_hdcp.c

988

enum transcoder cpu_transcoder = hdcp->cpu_transcoder;

drivers/gpu/drm/i915/display/intel_hdcp.c

995

if (hdcp->shim->stream_encryption) {

drivers/gpu/drm/i915/display/intel_hdcp.c

996

ret = hdcp->shim->stream_encryption(connector, false);

drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.c

156

gsc_context = display->hdcp.gsc_context;

drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.c

205

gsc_context = display->hdcp.gsc_context;

drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.c

257

gsc_context = display->hdcp.gsc_context;

drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.c

306

gsc_context = display->hdcp.gsc_context;

drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.c

34

gsc_context = display->hdcp.gsc_context;

drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.c

358

gsc_context = display->hdcp.gsc_context;

drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.c

413

gsc_context = display->hdcp.gsc_context;

drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.c

476

gsc_context = display->hdcp.gsc_context;

drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.c

539

gsc_context = display->hdcp.gsc_context;

drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.c

585

gsc_context = display->hdcp.gsc_context;

drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.c

640

mutex_lock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.c

649

display->hdcp.arbiter = arbiter;

drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.c

650

display->hdcp.arbiter->hdcp_dev = display->drm->dev;

drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.c

651

display->hdcp.arbiter->ops = &gsc_hdcp_ops;

drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.c

652

display->hdcp.gsc_context = gsc_context;

drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.c

655

mutex_unlock(&display->hdcp.hdcp_mutex);

drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.c

662

intel_parent_hdcp_gsc_context_free(display, display->hdcp.gsc_context);

drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.c

663

display->hdcp.gsc_context = NULL;

drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.c

664

kfree(display->hdcp.arbiter);

drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.c

665

display->hdcp.arbiter = NULL;

drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.c

92

gsc_context = display->hdcp.gsc_context;

drivers/gpu/drm/i915/display/intel_hdmi.c

1587

enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder;

drivers/gpu/drm/i915/display/intel_hdmi.c

1738

struct intel_hdcp *hdcp = &hdmi->attached_connector->hdcp;

drivers/gpu/drm/i915/display/intel_hdmi.c

1743

hdcp->is_paired);

drivers/gpu/drm/i915/display/intel_parent.c

32

return display->parent->hdcp->gsc_msg_send(gsc_context, msg_in, msg_in_len, msg_out, msg_out_len);

drivers/gpu/drm/i915/display/intel_parent.c

37

return display->parent->hdcp->gsc_check_status(display->drm);

drivers/gpu/drm/i915/display/intel_parent.c

42

return display->parent->hdcp->gsc_context_alloc(display->drm);

drivers/gpu/drm/i915/display/intel_parent.c

48

display->parent->hdcp->gsc_context_free(gsc_context);

drivers/gpu/drm/i915/display/intel_psr.c

1750

struct intel_hdcp *hdcp = &connector->hdcp;

drivers/gpu/drm/i915/display/intel_psr.c

1800

DRM_MODE_CONTENT_PROTECTION_ENABLED && hdcp->value ==

drivers/gpu/drm/i915/i915_driver.c

767

.hdcp = &i915_display_hdcp_interface,

drivers/gpu/drm/xe/display/xe_display.c

541

.hdcp = &xe_display_hdcp_interface,

drivers/perf/amlogic/meson_g12_ddr_pmu.c

47

PMU_FORMAT_ATTR(hdcp, "config1:3");

drivers/pinctrl/tegra/pinctrl-tegra30.c

2035

FUNCTION(hdcp),

include/drm/intel/display_parent_interface.h

110

const struct intel_display_hdcp_interface *hdcp;