CLKCTL
{ CLKCTL, 0x21 },
par->cmap_regs[PIDXLO] = CLKCTL; eieio();
par->cmap_regs[PIDXLO] = CLKCTL; eieio();
ret = catpt_readl_poll_shim(cdev, CLKCTL,
ret = catpt_readl_poll_shim(cdev, CLKCTL,
catpt_writel_shim(cdev, CLKCTL, CATPT_CLKCTL_DEFAULT);
catpt_updatel_shim(cdev, CLKCTL, CATPT_CLKCTL_SMOS, 0);
catpt_updatel_shim(cdev, CLKCTL, CATPT_CLKCTL_SMOS, CATPT_CLKCTL_SMOS);