gmu_write - Linux

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1014

gmu_write(gmu, REG_A8XX_GMU_GENERAL_10, chipid);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1015

gmu_write(gmu, REG_A8XX_GMU_GENERAL_8,

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1019

gmu_write(gmu, REG_A7XX_GMU_GENERAL_10, chipid);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1020

gmu_write(gmu, REG_A7XX_GMU_GENERAL_8,

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1024

gmu_write(gmu, REG_A6XX_GMU_HFI_SFR_ADDR, chipid);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1026

gmu_write(gmu, REG_A6XX_GPU_GMU_CX_GMU_PWR_COL_CP_MSG,

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1036

gmu_write(gmu, REG_A6XX_GMU_MRC_GBIF_QOS_CTRL, 0x33);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1079

gmu_write(gmu, REG_A6XX_GMU_AO_HOST_INTERRUPT_MASK, ~0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1080

gmu_write(gmu, REG_A6XX_GMU_GMU2HOST_INTR_MASK, ~0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1132

gmu_write(&a6xx_gpu->gmu, REG_A8XX_GMU_GMU_PWR_COL_KEEPALIVE, 0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1134

gmu_write(&a6xx_gpu->gmu, REG_A6XX_GMU_GMU_PWR_COL_KEEPALIVE, 0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1151

gmu_write(gmu, REG_A6XX_GMU_AHB_FENCE_STATUS_CLR, 0x7);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1152

gmu_write(gmu, REG_A6XX_GMU_AO_AHB_FENCE_CTRL, 0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1158

gmu_write(gmu, REG_A6XX_GMU_CM3_SYSRESET, 1);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1340

gmu_write(gmu, REG_A6XX_GMU_AO_HOST_INTERRUPT_CLR, ~0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1341

gmu_write(gmu, REG_A6XX_GMU_AO_HOST_INTERRUPT_MASK, ~A6XX_GMU_IRQ_MASK);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1371

gmu_write(gmu, REG_A6XX_GMU_GMU2HOST_INTR_CLR, ~0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1372

gmu_write(gmu, REG_A6XX_GMU_GMU2HOST_INTR_MASK, ~A6XX_HFI_IRQ_MASK);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

229

gmu_write(gmu, REG_A6XX_GMU_DCVS_ACK_OPTION, 0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

231

gmu_write(gmu, REG_A6XX_GMU_DCVS_PERF_SETTING,

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

238

gmu_write(gmu, REG_A6XX_GMU_DCVS_BW_SETTING, 0xff);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

307

gmu_write(gmu, REG_A6XX_GMU_CM3_SYSRESET, 1);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

313

gmu_write(gmu, REG_A8XX_GMU_GENERAL_9, 0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

315

gmu_write(gmu, REG_A7XX_GMU_GENERAL_9, 0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

317

gmu_write(gmu, REG_A6XX_GPU_GMU_CX_GMU_PWR_COL_CP_RESP, 0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

320

gmu_write(gmu, REG_A6XX_GMU_CM3_SYSRESET, 0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

338

gmu_write(gmu, REG_A6XX_GMU_HFI_CTRL_INIT, 1);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

425

gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, 1 << request);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

44

gmu_write(gmu, REG_A6XX_GMU_AO_HOST_INTERRUPT_CLR, status);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

452

gmu_write(gmu, REG_A6XX_GMU_GMU2HOST_INTR_CLR, 1 << ack);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

478

gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, 1 << bit);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

493

gmu_write(gmu, REG_A6XX_GMU_GX_SPTPRAC_POWER_CONTROL, 0x778000);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

518

gmu_write(gmu, REG_A6XX_GMU_GX_SPTPRAC_POWER_CONTROL, 0x778001);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

534

gmu_write(gmu, REG_A6XX_GMU_BOOT_SLUMBER_OPTION, 0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

539

gmu_write(gmu, REG_A6XX_GMU_GX_VOTE_IDX, vote & 0xff);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

540

gmu_write(gmu, REG_A6XX_GMU_MX_VOTE_IDX, (vote >> 8) & 0xff);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

557

gmu_write(gmu, REG_A8XX_GPU_GMU_CX_GMU_CX_FALNEXT_INTF, BIT(0));

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

560

gmu_write(gmu, REG_A6XX_GPU_GMU_CX_GMU_CX_FALNEXT_INTF, BIT(0));

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

572

gmu_write(gmu, REG_A8XX_GMU_CX_GMU_POWER_COUNTER_ENABLE, 0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

574

gmu_write(gmu, REG_A6XX_GMU_CX_GMU_POWER_COUNTER_ENABLE, 0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

586

gmu_write(gmu, REG_A6XX_GMU_BOOT_SLUMBER_OPTION, 1);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

602

gmu_write(gmu, REG_A6XX_GMU_AO_AHB_FENCE_CTRL, 0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

615

gmu_write(gmu, REG_A6XX_GMU_RSCC_CONTROL_REQ, BIT(1));

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

632

gmu_write(gmu, REG_A6XX_GMU_RSCC_CONTROL_REQ, 0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

651

gmu_write(gmu, REG_A6XX_GMU_RSCC_CONTROL_REQ, 1);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

658

gmu_write(gmu, REG_A6XX_GMU_RSCC_CONTROL_REQ, 0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

68

gmu_write(gmu, REG_A6XX_GMU_GMU2HOST_INTR_CLR, status);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

807

gmu_write(gmu, REG_A6XX_GMU_SYS_BUS_CONFIG, 0x1);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

808

gmu_write(gmu, REG_A6XX_GMU_ICACHE_CONFIG, 0x1);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

809

gmu_write(gmu, REG_A6XX_GMU_DCACHE_CONFIG, 0x1);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

815

gmu_write(gmu, REG_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL, 0x9c40400);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

819

gmu_write(gmu, REG_A6XX_GMU_PWR_COL_INTER_FRAME_HYST,

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

826

gmu_write(gmu, REG_A6XX_GMU_PWR_COL_SPTPRAC_HYST,

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

941

gmu_write(gmu, REG_A6XX_GPU_GMU_CX_GMU_CX_FALNEXT_INTF, 1);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

942

gmu_write(gmu, REG_A6XX_GPU_GMU_CX_GMU_CX_FAL_INTF, 1);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

944

gmu_write(gmu, REG_A8XX_GPU_GMU_CX_GMU_CX_FALNEXT_INTF, 1);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

945

gmu_write(gmu, REG_A8XX_GPU_GMU_CX_GMU_CX_FAL_INTF, 1);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

952

gmu_write(gmu, REG_A6XX_GMU_GENERAL_7, 1);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

969

gmu_write(gmu, REG_A6XX_GMU_CM3_FW_INIT_RESULT, 0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

970

gmu_write(gmu, REG_A6XX_GMU_CM3_BOOT_CONFIG, 0x02);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

973

gmu_write(gmu, REG_A6XX_GMU_HFI_QTBL_ADDR, gmu->hfi.iova);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

974

gmu_write(gmu, REG_A6XX_GMU_HFI_QTBL_INFO, 1);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

987

gmu_write(gmu, REG_A6XX_GMU_AHB_FENCE_RANGE_0,

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

996

gmu_write(gmu, REG_A6XX_GMU_CM3_CFG, 0x4052);

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

164

gmu_write(gmu, reg, val | or);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1330

gmu_write(&a6xx_gpu->gmu, REG_A6XX_GMU_CX_GMU_POWER_COUNTER_SELECT_1,

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1369

gmu_write(gmu, REG_A6XX_GPU_GMU_AO_GPU_CX_BUSY_MASK, 0xff000000);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1373

gmu_write(gmu, REG_A6XX_GMU_CX_GMU_POWER_COUNTER_ENABLE, 1);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1875

gmu_write(&a6xx_gpu->gmu, REG_A6XX_GMU_GMU_PWR_COL_KEEPALIVE, on);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

671

gmu_write(&a6xx_gpu->gmu, REG_A6XX_GPU_GMU_AO_GMU_CGC_MODE_CNTL,

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

673

gmu_write(&a6xx_gpu->gmu, REG_A6XX_GPU_GMU_AO_GMU_CGC_DELAY_CNTL,

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

675

gmu_write(&a6xx_gpu->gmu, REG_A6XX_GPU_GMU_AO_GMU_CGC_HYST_CNTL,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1258

gmu_write(&a6xx_gpu->gmu, REG_A6XX_GMU_AO_AHB_FENCE_CTRL, 0);

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

107

gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, 0x01);

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

143

gmu_write(gmu, REG_A6XX_GMU_GMU2HOST_INTR_CLR,

drivers/gpu/drm/msm/adreno/a6xx_preempt.c

76

gmu_write(&a6xx_gpu->gmu, REG_A6XX_GMU_PWR_COL_PREEMPT_KEEPALIVE, on);

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

1141

gmu_write(&a6xx_gpu->gmu, REG_A6XX_GMU_GMU_PWR_COL_KEEPALIVE, 1);

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

206

gmu_write(gmu, REG_A6XX_GPU_GMU_AO_GMU_CGC_MODE_CNTL,

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

208

gmu_write(gmu, REG_A6XX_GPU_GMU_AO_GMU_CGC_DELAY_CNTL,

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

210

gmu_write(gmu, REG_A6XX_GPU_GMU_AO_GMU_CGC_HYST_CNTL,

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

676

gmu_write(&a6xx_gpu->gmu, REG_A8XX_GMU_CX_GMU_POWER_COUNTER_SELECT_XOCLK_1,

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

715

gmu_write(gmu, REG_A6XX_GPU_GMU_AO_GPU_CX_BUSY_MASK, 0xff000000);

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

719

gmu_write(gmu, REG_A8XX_GMU_CX_GMU_POWER_COUNTER_ENABLE, 1);

drivers/gpu/drm/msm/adreno/a8xx_preempt.c

57

gmu_write(&a6xx_gpu->gmu, REG_A8XX_GMU_PWR_COL_PREEMPT_KEEPALIVE, on);