drivers/crypto/bcm/cipher.h

102

enum hash_mode mode;

drivers/crypto/bcm/cipher.h

365

enum hash_mode hash_mode, u32 chunksize,

drivers/crypto/bcm/cipher.h

392

enum hash_mode auth_mode,

drivers/crypto/bcm/spu.c

1024

enum hash_mode auth_mode,

drivers/crypto/bcm/spu.c

106

if (hash_alg && hash_mode) {

drivers/crypto/bcm/spu.c

147

(hash_mode == HASH_MODE_XCBC)) {

drivers/crypto/bcm/spu.c

170

if (hash_alg && (hash_mode == HASH_MODE_NONE) &&

drivers/crypto/bcm/spu.c

35

u32 hash_mode;

drivers/crypto/bcm/spu.c

424

u16 spum_hash_pad_len(enum hash_alg hash_alg, enum hash_mode hash_mode,

drivers/crypto/bcm/spu.c

432

if ((hash_alg == HASH_ALG_AES) && (hash_mode == HASH_MODE_XCBC)) {

drivers/crypto/bcm/spu.c

82

hash_mode = (cflags & HASH_MODE) >> HASH_MODE_SHIFT;

drivers/crypto/bcm/spu.c

85

hash_alg, hash_mode, hash_type);

drivers/crypto/bcm/spu.h

129

enum hash_mode mode;

drivers/crypto/bcm/spu.h

229

u16 spum_hash_pad_len(enum hash_alg hash_alg, enum hash_mode hash_mode,

drivers/crypto/bcm/spu.h

261

enum hash_mode auth_mode,

drivers/crypto/bcm/spu2.c

1247

enum hash_alg auth_alg, enum hash_mode auth_mode,

drivers/crypto/bcm/spu2.c

197

static int spu2_hash_mode_xlate(enum hash_mode hash_mode,

drivers/crypto/bcm/spu2.c

200

switch (hash_mode) {

drivers/crypto/bcm/spu2.c

235

spu2_hash_xlate(enum hash_alg hash_alg, enum hash_mode hash_mode,

drivers/crypto/bcm/spu2.c

241

err = spu2_hash_mode_xlate(hash_mode, spu2_mode);

drivers/crypto/bcm/spu2.c

243

flow_log("Invalid hash mode %d\n", hash_mode);

drivers/crypto/bcm/spu2.c

314

enum spu2_hash_mode hash_mode;

drivers/crypto/bcm/spu2.c

357

hash_mode = (ctrl0 & SPU2_HASH_MODE) >> SPU2_HASH_MODE_SHIFT;

drivers/crypto/bcm/spu2.c

358

hash_mode_name = spu2_hash_mode_name(hash_mode);

drivers/crypto/bcm/spu2.c

81

static char *spu2_hash_mode_name(enum spu2_hash_mode hash_mode)

drivers/crypto/bcm/spu2.c

83

if (hash_mode >= SPU2_HASH_MODE_LAST)

drivers/crypto/bcm/spu2.c

845

u16 spu2_hash_pad_len(enum hash_alg hash_alg, enum hash_mode hash_mode,

drivers/crypto/bcm/spu2.c

85

return spu2_hash_mode_names[hash_mode];

drivers/crypto/bcm/spu2.h

180

u16 spu2_hash_pad_len(enum hash_alg hash_alg, enum hash_mode hash_mode,

drivers/crypto/bcm/spu2.h

205

enum hash_alg auth_alg, enum hash_mode auth_mode,

drivers/crypto/ccree/cc_aead.c

1001

set_cipher_mode(&desc[idx], hash_mode);

drivers/crypto/ccree/cc_aead.c

1011

set_cipher_mode(&desc[idx], hash_mode);

drivers/crypto/ccree/cc_aead.c

1012

set_din_sram(&desc[idx], cc_digest_len_addr(ctx->drvdata, hash_mode),

drivers/crypto/ccree/cc_aead.c

1103

unsigned int hash_mode = (ctx->auth_mode == DRV_HASH_SHA1) ?

drivers/crypto/ccree/cc_aead.c

1110

set_cipher_mode(&desc[idx], hash_mode);

drivers/crypto/ccree/cc_aead.c

1125

set_cipher_mode(&desc[idx], hash_mode);

drivers/crypto/ccree/cc_aead.c

1130

set_cipher_mode(&desc[idx], hash_mode);

drivers/crypto/ccree/cc_aead.c

1140

set_cipher_mode(&desc[idx], hash_mode);

drivers/crypto/ccree/cc_aead.c

1141

set_din_sram(&desc[idx], cc_digest_len_addr(ctx->drvdata, hash_mode),

drivers/crypto/ccree/cc_aead.c

297

unsigned int hash_mode = (ctx->auth_mode == DRV_HASH_SHA1) ?

drivers/crypto/ccree/cc_aead.c

310

set_cipher_mode(&desc[idx], hash_mode);

drivers/crypto/ccree/cc_aead.c

321

set_cipher_mode(&desc[idx], hash_mode);

drivers/crypto/ccree/cc_aead.c

330

set_cipher_mode(&desc[idx], hash_mode);

drivers/crypto/ccree/cc_aead.c

340

set_cipher_mode(&desc[idx], hash_mode);

drivers/crypto/ccree/cc_aead.c

347

set_cipher_mode(&desc[idx], hash_mode);

drivers/crypto/ccree/cc_aead.c

878

unsigned int hash_mode = (ctx->auth_mode == DRV_HASH_SHA1) ?

drivers/crypto/ccree/cc_aead.c

896

set_cipher_mode(&desc[idx], hash_mode);

drivers/crypto/ccree/cc_aead.c

913

set_cipher_mode(&desc[idx], hash_mode);

drivers/crypto/ccree/cc_aead.c

993

unsigned int hash_mode = (ctx->auth_mode == DRV_HASH_SHA1) ?

drivers/crypto/ccree/cc_hash.c

1114

if (ctx->hash_mode == DRV_HASH_SM3)

drivers/crypto/ccree/cc_hash.c

1133

ctx->hash_mode = cc_alg->hash_mode;

drivers/crypto/ccree/cc_hash.c

151

if (ctx->hash_mode == DRV_HASH_SHA512 ||

drivers/crypto/ccree/cc_hash.c

152

ctx->hash_mode == DRV_HASH_SHA384)

drivers/crypto/ccree/cc_hash.c

1567

int hash_mode;

drivers/crypto/ccree/cc_hash.c

1603

.hash_mode = DRV_HASH_SHA1,

drivers/crypto/ccree/cc_hash.c

162

if (ctx->hash_mode != DRV_HASH_NULL) {

drivers/crypto/ccree/cc_hash.c

1630

.hash_mode = DRV_HASH_SHA256,

drivers/crypto/ccree/cc_hash.c

1657

.hash_mode = DRV_HASH_SHA224,

drivers/crypto/ccree/cc_hash.c

1684

.hash_mode = DRV_HASH_SHA384,

drivers/crypto/ccree/cc_hash.c

1711

.hash_mode = DRV_HASH_SHA512,

drivers/crypto/ccree/cc_hash.c

172

const void *larval = cc_larval_digest(dev, ctx->hash_mode);

drivers/crypto/ccree/cc_hash.c

1738

.hash_mode = DRV_HASH_MD5,

drivers/crypto/ccree/cc_hash.c

1763

.hash_mode = DRV_HASH_SM3,

drivers/crypto/ccree/cc_hash.c

1788

.hash_mode = DRV_HASH_NULL,

drivers/crypto/ccree/cc_hash.c

1813

.hash_mode = DRV_HASH_NULL,

drivers/crypto/ccree/cc_hash.c

1858

t_crypto_alg->hash_mode = template->hash_mode;

drivers/crypto/ccree/cc_hash.c

2086

set_hash_cipher_mode(&desc[idx], DRV_CIPHER_XCBC_MAC, ctx->hash_mode);

drivers/crypto/ccree/cc_hash.c

209

if (is_hmac && ctx->hash_mode != DRV_HASH_NULL) {

drivers/crypto/ccree/cc_hash.c

351

set_hash_cipher_mode(&desc[idx], ctx->hw_mode, ctx->hash_mode);

drivers/crypto/ccree/cc_hash.c

358

cc_set_endianity(ctx->hash_mode, &desc[idx]);

drivers/crypto/ccree/cc_hash.c

378

cc_set_endianity(ctx->hash_mode, &desc[idx]);

drivers/crypto/ccree/cc_hash.c

395

cc_digest_len_addr(ctx->drvdata, ctx->hash_mode),

drivers/crypto/ccree/cc_hash.c

468

set_hash_cipher_mode(&desc[idx], ctx->hw_mode, ctx->hash_mode);

drivers/crypto/ccree/cc_hash.c

474

ctx->hash_mode);

drivers/crypto/ccree/cc_hash.c

484

set_hash_cipher_mode(&desc[idx], ctx->hw_mode, ctx->hash_mode);

drivers/crypto/ccree/cc_hash.c

534

set_hash_cipher_mode(&desc[idx], ctx->hw_mode, ctx->hash_mode);

drivers/crypto/ccree/cc_hash.c

543

set_hash_cipher_mode(&desc[idx], ctx->hw_mode, ctx->hash_mode);

drivers/crypto/ccree/cc_hash.c

606

set_hash_cipher_mode(&desc[idx], ctx->hw_mode, ctx->hash_mode);

drivers/crypto/ccree/cc_hash.c

615

set_hash_cipher_mode(&desc[idx], ctx->hw_mode, ctx->hash_mode);

drivers/crypto/ccree/cc_hash.c

679

set_hash_cipher_mode(&desc[idx], ctx->hw_mode, ctx->hash_mode);

drivers/crypto/ccree/cc_hash.c

69

int hash_mode;

drivers/crypto/ccree/cc_hash.c

746

larval_addr = cc_larval_digest_addr(ctx->drvdata, ctx->hash_mode);

drivers/crypto/ccree/cc_hash.c

807

cc_set_endianity(ctx->hash_mode, &desc[idx]);

drivers/crypto/ccree/cc_hash.c

95

int hash_mode;

drivers/crypto/ccree/cc_hw_queue_defs.h

509

enum drv_hash_mode hash_mode)

drivers/crypto/ccree/cc_hw_queue_defs.h

512

if (hash_mode == DRV_HASH_SM3)

drivers/crypto/starfive/jh7110-cryp.h

165

unsigned int hash_mode;

drivers/crypto/starfive/jh7110-hash.c

211

rctx->csr.hash.mode = ctx->hash_mode;

drivers/crypto/starfive/jh7110-hash.c

398

ctx->hash_mode = mode;

drivers/crypto/starfive/jh7110-hash.c

479

if (ctx->hash_mode == STARFIVE_HASH_SM3)

include/uapi/linux/netfilter_ipv4/ipt_CLUSTERIP.h

31

__u32 hash_mode;

include/uapi/linux/virtio_crypto.h

250

__le32 hash_mode;