drivers/media/platform/verisilicon/hantro_g1_vp8_dec.c
144
hantro_reg_write(vpu, &vp8_dec_lf_level[0], lf->level);
drivers/media/platform/verisilicon/hantro_g1_vp8_dec.c
150
hantro_reg_write(vpu, &vp8_dec_lf_level[i], lf_level);
drivers/media/platform/verisilicon/hantro_g1_vp8_dec.c
154
hantro_reg_write(vpu, &vp8_dec_lf_level[i],
drivers/media/platform/verisilicon/hantro_g1_vp8_dec.c
165
hantro_reg_write(vpu, &vp8_dec_mb_adj[i],
drivers/media/platform/verisilicon/hantro_g1_vp8_dec.c
167
hantro_reg_write(vpu, &vp8_dec_ref_adj[i],
drivers/media/platform/verisilicon/hantro_g1_vp8_dec.c
185
hantro_reg_write(vpu, &vp8_dec_quant[0], q->y_ac_qi);
drivers/media/platform/verisilicon/hantro_g1_vp8_dec.c
191
hantro_reg_write(vpu, &vp8_dec_quant[i], quant);
drivers/media/platform/verisilicon/hantro_g1_vp8_dec.c
195
hantro_reg_write(vpu, &vp8_dec_quant[i],
drivers/media/platform/verisilicon/hantro_g1_vp8_dec.c
199
hantro_reg_write(vpu, &vp8_dec_quant_delta[0], q->y_dc_delta);
drivers/media/platform/verisilicon/hantro_g1_vp8_dec.c
200
hantro_reg_write(vpu, &vp8_dec_quant_delta[1], q->y2_dc_delta);
drivers/media/platform/verisilicon/hantro_g1_vp8_dec.c
201
hantro_reg_write(vpu, &vp8_dec_quant_delta[2], q->y2_ac_delta);
drivers/media/platform/verisilicon/hantro_g1_vp8_dec.c
202
hantro_reg_write(vpu, &vp8_dec_quant_delta[3], q->uv_dc_delta);
drivers/media/platform/verisilicon/hantro_g1_vp8_dec.c
203
hantro_reg_write(vpu, &vp8_dec_quant_delta[4], q->uv_ac_delta);
drivers/media/platform/verisilicon/hantro_g1_vp8_dec.c
276
hantro_reg_write(vpu, ®, mb_start_bits);
drivers/media/platform/verisilicon/hantro_g1_vp8_dec.c
282
hantro_reg_write(vpu, ®, mb_size + 1);
drivers/media/platform/verisilicon/hantro_g1_vp8_dec.c
303
hantro_reg_write(vpu, ®, hdr->num_dct_parts - 1);
drivers/media/platform/verisilicon/hantro_g1_vp8_dec.c
315
hantro_reg_write(vpu, &vp8_dec_dct_base[i],
drivers/media/platform/verisilicon/hantro_g1_vp8_dec.c
318
hantro_reg_write(vpu, &vp8_dec_dct_start_bits[i],
drivers/media/platform/verisilicon/hantro_g1_vp8_dec.c
348
hantro_reg_write(vpu, &vp8_dec_pred_bc_tap[i][j],
drivers/media/platform/verisilicon/hantro_g1_vp8_dec.c
365
hantro_reg_write(vpu, ®, val);
drivers/media/platform/verisilicon/hantro_g2.c
60
hantro_reg_write(vpu, &g2_dec_irq, 0);
drivers/media/platform/verisilicon/hantro_g2.c
61
hantro_reg_write(vpu, &g2_dec_int_stat, 0);
drivers/media/platform/verisilicon/hantro_g2.c
62
hantro_reg_write(vpu, &g2_clk_gate_e, 1);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
153
hantro_reg_write(vpu, &g2_bit_depth_y_minus8, sps->bit_depth_luma_minus8);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
154
hantro_reg_write(vpu, &g2_bit_depth_c_minus8, sps->bit_depth_chroma_minus8);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
156
hantro_reg_write(vpu, &g2_hdr_skip_length, compute_header_skip_length(ctx));
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
161
hantro_reg_write(vpu, &g2_min_cb_size, min_log2_cb_size);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
162
hantro_reg_write(vpu, &g2_max_cb_size, max_log2_ctb_size);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
175
hantro_reg_write(vpu, &g2_partial_ctb_x, partial_ctb_x);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
176
hantro_reg_write(vpu, &g2_partial_ctb_y, partial_ctb_y);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
178
hantro_reg_write(vpu, &g2_pic_width_in_cbs, pic_width_in_min_cbs);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
179
hantro_reg_write(vpu, &g2_pic_height_in_cbs, pic_height_in_min_cbs);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
181
hantro_reg_write(vpu, &g2_pic_width_4x4,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
183
hantro_reg_write(vpu, &g2_pic_height_4x4,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
186
hantro_reg_write(vpu, &hevc_max_inter_hierdepth,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
188
hantro_reg_write(vpu, &hevc_max_intra_hierdepth,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
190
hantro_reg_write(vpu, &hevc_min_trb_size,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
192
hantro_reg_write(vpu, &hevc_max_trb_size,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
196
hantro_reg_write(vpu, &g2_tempor_mvp_e,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
199
hantro_reg_write(vpu, &g2_strong_smooth_e,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
201
hantro_reg_write(vpu, &g2_asym_pred_e,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
203
hantro_reg_write(vpu, &g2_sao_e,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
205
hantro_reg_write(vpu, &g2_sign_data_hide,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
209
hantro_reg_write(vpu, &g2_cu_qpd_e, 1);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
210
hantro_reg_write(vpu, &g2_max_cu_qpd_depth, pps->diff_cu_qp_delta_depth);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
212
hantro_reg_write(vpu, &g2_cu_qpd_e, 0);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
213
hantro_reg_write(vpu, &g2_max_cu_qpd_depth, 0);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
216
hantro_reg_write(vpu, &g2_cb_qp_offset, pps->pps_cb_qp_offset);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
217
hantro_reg_write(vpu, &g2_cr_qp_offset, pps->pps_cr_qp_offset);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
219
hantro_reg_write(vpu, &g2_filt_offset_beta, pps->pps_beta_offset_div2);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
220
hantro_reg_write(vpu, &g2_filt_offset_tc, pps->pps_tc_offset_div2);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
221
hantro_reg_write(vpu, &g2_slice_hdr_ext_e,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
223
hantro_reg_write(vpu, &g2_slice_hdr_ext_bits, pps->num_extra_slice_header_bits);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
224
hantro_reg_write(vpu, &g2_slice_chqp_present,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
226
hantro_reg_write(vpu, &g2_weight_bipr_idc,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
228
hantro_reg_write(vpu, &g2_transq_bypass,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
230
hantro_reg_write(vpu, &g2_list_mod_e,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
232
hantro_reg_write(vpu, &g2_entropy_sync_e,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
234
hantro_reg_write(vpu, &g2_cabac_init_present,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
236
hantro_reg_write(vpu, &g2_idr_pic_e,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
238
hantro_reg_write(vpu, &hevc_parallel_merge,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
240
hantro_reg_write(vpu, &g2_pcm_filt_d,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
242
hantro_reg_write(vpu, &g2_pcm_e,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
245
hantro_reg_write(vpu, &g2_max_pcm_size,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
248
hantro_reg_write(vpu, &g2_min_pcm_size,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
250
hantro_reg_write(vpu, &g2_bit_depth_pcm_y,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
252
hantro_reg_write(vpu, &g2_bit_depth_pcm_c,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
255
hantro_reg_write(vpu, &g2_max_pcm_size, 0);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
256
hantro_reg_write(vpu, &g2_min_pcm_size, 0);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
257
hantro_reg_write(vpu, &g2_bit_depth_pcm_y, 0);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
258
hantro_reg_write(vpu, &g2_bit_depth_pcm_c, 0);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
261
hantro_reg_write(vpu, &g2_start_code_e, 1);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
262
hantro_reg_write(vpu, &g2_init_qp, pps->init_qp_minus26 + 26);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
263
hantro_reg_write(vpu, &g2_weight_pred_e,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
265
hantro_reg_write(vpu, &g2_cabac_init_present,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
267
hantro_reg_write(vpu, &g2_const_intra_e,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
269
hantro_reg_write(vpu, &g2_transform_skip,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
271
hantro_reg_write(vpu, &g2_out_filtering_dis,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
273
hantro_reg_write(vpu, &g2_filt_ctrl_pres,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
275
hantro_reg_write(vpu, &g2_dependent_slice,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
277
hantro_reg_write(vpu, &g2_filter_override,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
279
hantro_reg_write(vpu, &g2_refidx0_active,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
28
hantro_reg_write(vpu, &g2_tile_e, tiles_enabled);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
281
hantro_reg_write(vpu, &g2_refidx1_active,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
283
hantro_reg_write(vpu, &g2_apf_threshold, 8);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
367
hantro_reg_write(vpu, &ref_pic_regs0[i],
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
369
hantro_reg_write(vpu, &ref_pic_regs1[i],
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
419
hantro_reg_write(vpu, &g2_num_ref_frames, max_ref_frames);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
420
hantro_reg_write(vpu, &g2_filter_over_slices,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
422
hantro_reg_write(vpu, &g2_filter_over_tiles,
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
431
hantro_reg_write(vpu, &cur_poc[i], poc_diff);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
439
hantro_reg_write(vpu, &cur_poc[i], 0);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
445
hantro_reg_write(vpu, &cur_poc[i], decode_params->pic_order_cnt_val);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
46
hantro_reg_write(vpu, &g2_num_tile_rows, num_tile_rows);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
47
hantro_reg_write(vpu, &g2_num_tile_cols, num_tile_cols);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
509
hantro_reg_write(vpu, &g2_refer_lterm_e, dpb_longterm_e);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
529
hantro_reg_write(vpu, &g2_stream_len, src_len);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
530
hantro_reg_write(vpu, &g2_strm_buffer_len, src_buf_len);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
531
hantro_reg_write(vpu, &g2_strm_start_offset, 0);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
532
hantro_reg_write(vpu, &g2_start_bit, 0);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
533
hantro_reg_write(vpu, &g2_write_mvs_e, 1);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
552
hantro_reg_write(vpu, &g2_scaling_list_e, scaling_list_enabled);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
616
hantro_reg_write(vpu, &g2_mode, HEVC_DEC_MODE);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
617
hantro_reg_write(vpu, &g2_clk_gate_e, 1);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
620
hantro_reg_write(vpu, &g2_out_dis, 0);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
622
hantro_reg_write(vpu, &g2_ref_compress_bypass, !ctx->hevc_dec.use_compression);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
625
hantro_reg_write(vpu, &g2_buswidth, BUS_WIDTH_128);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
626
hantro_reg_write(vpu, &g2_max_burst, 16);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
629
hantro_reg_write(vpu, &g2_strm_swap, 0xf);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
630
hantro_reg_write(vpu, &g2_dirmv_swap, 0xf);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
631
hantro_reg_write(vpu, &g2_compress_swap, 0xf);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
94
hantro_reg_write(vpu, &g2_num_tile_rows, 1);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
95
hantro_reg_write(vpu, &g2_num_tile_cols, 1);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
134
hantro_reg_write(ctx->dev, &g2_out_dis, 0);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
136
hantro_reg_write(ctx->dev, &g2_output_format, 0);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
173
hantro_reg_write(ctx->dev, &ref_reg->width, refw);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
174
hantro_reg_write(ctx->dev, &ref_reg->height, refh);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
176
hantro_reg_write(ctx->dev, &ref_reg->hor_scale, (refw << 14) / dst->vp9.width);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
177
hantro_reg_write(ctx->dev, &ref_reg->ver_scale, (refh << 14) / dst->vp9.height);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
228
hantro_reg_write(ctx->dev, &vp9_last_sign_bias,
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
231
hantro_reg_write(ctx->dev, &vp9_gref_sign_bias,
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
234
hantro_reg_write(ctx->dev, &vp9_aref_sign_bias,
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
335
hantro_reg_write(ctx->dev, &g2_tile_e, 1);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
342
hantro_reg_write(ctx->dev, &g2_tile_e, 0);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
346
hantro_reg_write(ctx->dev, &g2_num_tile_cols_old, cols);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
347
hantro_reg_write(ctx->dev, &g2_num_tile_rows_old, rows);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
349
hantro_reg_write(ctx->dev, &g2_num_tile_cols, cols);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
350
hantro_reg_write(ctx->dev, &g2_num_tile_rows, rows);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
408
hantro_reg_write(ctx->dev, &vp9_segment_e, segment_enabled);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
409
hantro_reg_write(ctx->dev, &vp9_segment_upd_e,
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
411
hantro_reg_write(ctx->dev, &vp9_segment_temp_upd_e,
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
430
hantro_reg_write(ctx->dev, &seg_regs[segid][feat_id], feat_val);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
443
hantro_reg_write(ctx->dev, &seg_regs[segid][feat_id], feat_val);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
455
hantro_reg_write(ctx->dev, &seg_regs[segid][feat_id], feat_val);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
466
hantro_reg_write(ctx->dev, &seg_regs[segid][feat_id], feat_val);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
474
hantro_reg_write(ctx->dev, &vp9_filt_level, dec_params->lf.level);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
475
hantro_reg_write(ctx->dev, &g2_out_filtering_dis, dec_params->lf.level == 0);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
476
hantro_reg_write(ctx->dev, &vp9_filt_sharpness, dec_params->lf.sharpness);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
478
hantro_reg_write(ctx->dev, &vp9_filt_ref_adj_0, d ? dec_params->lf.ref_deltas[0] : 0);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
479
hantro_reg_write(ctx->dev, &vp9_filt_ref_adj_1, d ? dec_params->lf.ref_deltas[1] : 0);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
480
hantro_reg_write(ctx->dev, &vp9_filt_ref_adj_2, d ? dec_params->lf.ref_deltas[2] : 0);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
481
hantro_reg_write(ctx->dev, &vp9_filt_ref_adj_3, d ? dec_params->lf.ref_deltas[3] : 0);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
482
hantro_reg_write(ctx->dev, &vp9_filt_mb_adj_0, d ? dec_params->lf.mode_deltas[0] : 0);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
483
hantro_reg_write(ctx->dev, &vp9_filt_mb_adj_1, d ? dec_params->lf.mode_deltas[1] : 0);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
490
hantro_reg_write(ctx->dev, &g2_pic_width_in_cbs, (dst->vp9.width + 7) / 8);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
491
hantro_reg_write(ctx->dev, &g2_pic_height_in_cbs, (dst->vp9.height + 7) / 8);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
494
hantro_reg_write(ctx->dev, &g2_pic_width_4x4, pic_w_4x4);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
495
hantro_reg_write(ctx->dev, &g2_pic_height_4x4, pic_h_4x4);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
502
hantro_reg_write(ctx->dev, &g2_bit_depth_y, dec_params->bit_depth);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
503
hantro_reg_write(ctx->dev, &g2_bit_depth_c, dec_params->bit_depth);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
504
hantro_reg_write(ctx->dev, &g2_pix_shift, 0);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
506
hantro_reg_write(ctx->dev, &g2_bit_depth_y_minus8, dec_params->bit_depth - 8);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
507
hantro_reg_write(ctx->dev, &g2_bit_depth_c_minus8, dec_params->bit_depth - 8);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
520
hantro_reg_write(ctx->dev, &vp9_qp_delta_y_dc, dec_params->quant.delta_q_y_dc);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
521
hantro_reg_write(ctx->dev, &vp9_qp_delta_ch_dc, dec_params->quant.delta_q_uv_dc);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
522
hantro_reg_write(ctx->dev, &vp9_qp_delta_ch_ac, dec_params->quant.delta_q_uv_ac);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
523
hantro_reg_write(ctx->dev, &vp9_lossless_e, is_lossless(&dec_params->quant));
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
551
hantro_reg_write(ctx->dev, &g2_idr_pic_e, intra_only);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
553
hantro_reg_write(ctx->dev, &vp9_transform_mode, vp9_ctx->cur.tx_mode);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
555
hantro_reg_write(ctx->dev, &vp9_mcomp_filt_type, intra_only ?
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
558
hantro_reg_write(ctx->dev, &vp9_high_prec_mv_e,
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
561
hantro_reg_write(ctx->dev, &vp9_comp_pred_mode, dec_params->reference_mode);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
563
hantro_reg_write(ctx->dev, &g2_tempor_mvp_e,
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
572
hantro_reg_write(ctx->dev, &g2_write_mvs_e,
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
616
hantro_reg_write(ctx->dev, &vp9_comp_pred_fixed_ref, comp_fixed_ref);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
617
hantro_reg_write(ctx->dev, &vp9_comp_pred_var_ref0, comp_var_ref[0]);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
618
hantro_reg_write(ctx->dev, &vp9_comp_pred_var_ref1, comp_var_ref[1]);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
794
hantro_reg_write(ctx->dev, &g2_start_bit, start_bit);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
798
hantro_reg_write(ctx->dev, &g2_stream_len, src_len);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
802
hantro_reg_write(ctx->dev, &g2_strm_start_offset, tmp_addr - stream_base);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
804
hantro_reg_write(ctx->dev, &g2_strm_buffer_len, src_buf_len);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
844
hantro_reg_write(ctx->dev, &g2_mode, VP9_DEC_MODE);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
846
hantro_reg_write(ctx->dev, &g2_strm_swap, 0xf);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
847
hantro_reg_write(ctx->dev, &g2_dirmv_swap, 0xf);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
848
hantro_reg_write(ctx->dev, &g2_compress_swap, 0xf);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
849
hantro_reg_write(ctx->dev, &g2_ref_compress_bypass, 1);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
851
hantro_reg_write(ctx->dev, &g2_strm_swap_old, 0x1f);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
852
hantro_reg_write(ctx->dev, &g2_pic_swap, 0x10);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
853
hantro_reg_write(ctx->dev, &g2_dirmv_swap_old, 0x10);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
854
hantro_reg_write(ctx->dev, &g2_tab0_swap_old, 0x10);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
855
hantro_reg_write(ctx->dev, &g2_tab1_swap_old, 0x10);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
856
hantro_reg_write(ctx->dev, &g2_tab2_swap_old, 0x10);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
857
hantro_reg_write(ctx->dev, &g2_tab3_swap_old, 0x10);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
858
hantro_reg_write(ctx->dev, &g2_rscan_swap, 0x10);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
860
hantro_reg_write(ctx->dev, &g2_buswidth, BUS_WIDTH_128);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
861
hantro_reg_write(ctx->dev, &g2_max_burst, 16);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
862
hantro_reg_write(ctx->dev, &g2_apf_threshold, 8);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
863
hantro_reg_write(ctx->dev, &g2_clk_gate_e, 1);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
864
hantro_reg_write(ctx->dev, &g2_max_cb_size, 6);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
865
hantro_reg_write(ctx->dev, &g2_min_cb_size, 3);
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
867
hantro_reg_write(ctx->dev, &g2_double_buffer_e, 1);
drivers/media/platform/verisilicon/hantro_postproc.c
135
hantro_reg_write(vpu, &g2_down_scale_e, 1);
drivers/media/platform/verisilicon/hantro_postproc.c
136
hantro_reg_write(vpu, &g2_down_scale_y, down_scale >> 2);
drivers/media/platform/verisilicon/hantro_postproc.c
137
hantro_reg_write(vpu, &g2_down_scale_x, down_scale >> 2);
drivers/media/platform/verisilicon/hantro_postproc.c
152
hantro_reg_write(ctx->dev, &g2_rs_out_bit_depth, out_depth);
drivers/media/platform/verisilicon/hantro_postproc.c
153
hantro_reg_write(ctx->dev, &g2_pp_pix_shift, pp_shift);
drivers/media/platform/verisilicon/hantro_postproc.c
155
hantro_reg_write(vpu, &g2_output_8_bits, out_depth > 8 ? 0 : 1);
drivers/media/platform/verisilicon/hantro_postproc.c
156
hantro_reg_write(vpu, &g2_output_format, out_depth > 8 ? 1 : 0);
drivers/media/platform/verisilicon/hantro_postproc.c
158
hantro_reg_write(vpu, &g2_out_rs_e, 1);
drivers/media/platform/verisilicon/hantro_postproc.c
19
hantro_reg_write(vpu, \
drivers/media/platform/verisilicon/hantro_postproc.c
305
hantro_reg_write(vpu, &g2_out_rs_e, 0);
drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c
285
hantro_reg_write(vpu, &vp8_dec_lf_level[0], lf->level);
drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c
291
hantro_reg_write(vpu, &vp8_dec_lf_level[i], lf_level);
drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c
295
hantro_reg_write(vpu, &vp8_dec_lf_level[i],
drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c
306
hantro_reg_write(vpu, &vp8_dec_mb_adj[i],
drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c
308
hantro_reg_write(vpu, &vp8_dec_ref_adj[i],
drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c
323
hantro_reg_write(vpu, &vp8_dec_quant[0], q->y_ac_qi);
drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c
329
hantro_reg_write(vpu, &vp8_dec_quant[i], quant);
drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c
333
hantro_reg_write(vpu, &vp8_dec_quant[i],
drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c
337
hantro_reg_write(vpu, &vp8_dec_quant_delta[0], q->y_dc_delta);
drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c
338
hantro_reg_write(vpu, &vp8_dec_quant_delta[1], q->y2_dc_delta);
drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c
339
hantro_reg_write(vpu, &vp8_dec_quant_delta[2], q->y2_ac_delta);
drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c
340
hantro_reg_write(vpu, &vp8_dec_quant_delta[3], q->uv_dc_delta);
drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c
341
hantro_reg_write(vpu, &vp8_dec_quant_delta[4], q->uv_ac_delta);
drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c
383
hantro_reg_write(vpu, &vp8_dec_mb_start_bit, mb_start_bits);
drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c
384
hantro_reg_write(vpu, &vp8_dec_mb_aligned_data_len, mb_size);
drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c
402
hantro_reg_write(vpu, &vp8_dec_num_dct_partitions,
drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c
406
hantro_reg_write(vpu, &vp8_dec_stream_len, dct_part_total_len);
drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c
413
hantro_reg_write(vpu, &vp8_dec_dct_base[i],
drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c
416
hantro_reg_write(vpu, &vp8_dec_dct_start_bits[i],
drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c
439
hantro_reg_write(vpu,
drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c
562
hantro_reg_write(vpu, &vp8_dec_skip_mode, 1);
drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c
564
hantro_reg_write(vpu, &vp8_dec_filter_disable, 1);
drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c
570
hantro_reg_write(vpu, &vp8_dec_mb_width, mb_width);
drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c
571
hantro_reg_write(vpu, &vp8_dec_mb_height, mb_height);
drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c
572
hantro_reg_write(vpu, &vp8_dec_mb_width_ext, mb_width >> 9);
drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c
573
hantro_reg_write(vpu, &vp8_dec_mb_height_ext, mb_height >> 8);
drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c
576
hantro_reg_write(vpu, &vp8_dec_bool_range, hdr->coder_state.range);
drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c
577
hantro_reg_write(vpu, &vp8_dec_bool_value, hdr->coder_state.value);
drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c
597
hantro_reg_write(vpu, &vp8_dec_start_dec, 1);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1000
hantro_reg_write(vpu, &av1_filt_level_delta3_seg5,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1002
hantro_reg_write(vpu, &av1_refpic_seg5,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1004
hantro_reg_write(vpu, &av1_skip_seg5,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1006
hantro_reg_write(vpu, &av1_global_mv_seg5,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1009
hantro_reg_write(vpu, &av1_quant_seg6,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1011
hantro_reg_write(vpu, &av1_filt_level_delta0_seg6,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1013
hantro_reg_write(vpu, &av1_filt_level_delta1_seg6,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1015
hantro_reg_write(vpu, &av1_filt_level_delta2_seg6,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1017
hantro_reg_write(vpu, &av1_filt_level_delta3_seg6,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1019
hantro_reg_write(vpu, &av1_refpic_seg6,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1021
hantro_reg_write(vpu, &av1_skip_seg6,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1023
hantro_reg_write(vpu, &av1_global_mv_seg6,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1026
hantro_reg_write(vpu, &av1_quant_seg7,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1028
hantro_reg_write(vpu, &av1_filt_level_delta0_seg7,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1030
hantro_reg_write(vpu, &av1_filt_level_delta1_seg7,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1032
hantro_reg_write(vpu, &av1_filt_level_delta2_seg7,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1034
hantro_reg_write(vpu, &av1_filt_level_delta3_seg7,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1036
hantro_reg_write(vpu, &av1_refpic_seg7,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1038
hantro_reg_write(vpu, &av1_skip_seg7,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1040
hantro_reg_write(vpu, &av1_global_mv_seg7,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1082
hantro_reg_write(vpu, &av1_filtering_dis, filtering_dis);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1083
hantro_reg_write(vpu, &av1_filt_level_base_gt32, loop_filter->level[0] > 32);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1084
hantro_reg_write(vpu, &av1_filt_sharpness, loop_filter->sharpness);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1086
hantro_reg_write(vpu, &av1_filt_level0, loop_filter->level[0]);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1087
hantro_reg_write(vpu, &av1_filt_level1, loop_filter->level[1]);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1088
hantro_reg_write(vpu, &av1_filt_level2, loop_filter->level[2]);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1089
hantro_reg_write(vpu, &av1_filt_level3, loop_filter->level[3]);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1094
hantro_reg_write(vpu, &av1_filt_ref_adj_0,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1096
hantro_reg_write(vpu, &av1_filt_ref_adj_1,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1098
hantro_reg_write(vpu, &av1_filt_ref_adj_2,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1100
hantro_reg_write(vpu, &av1_filt_ref_adj_3,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1102
hantro_reg_write(vpu, &av1_filt_ref_adj_4,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1104
hantro_reg_write(vpu, &av1_filt_ref_adj_5,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1106
hantro_reg_write(vpu, &av1_filt_ref_adj_6,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1108
hantro_reg_write(vpu, &av1_filt_ref_adj_7,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1110
hantro_reg_write(vpu, &av1_filt_mb_adj_0,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1112
hantro_reg_write(vpu, &av1_filt_mb_adj_1,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1115
hantro_reg_write(vpu, &av1_filt_ref_adj_0, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1116
hantro_reg_write(vpu, &av1_filt_ref_adj_1, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1117
hantro_reg_write(vpu, &av1_filt_ref_adj_2, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1118
hantro_reg_write(vpu, &av1_filt_ref_adj_3, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1119
hantro_reg_write(vpu, &av1_filt_ref_adj_4, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1120
hantro_reg_write(vpu, &av1_filt_ref_adj_5, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1121
hantro_reg_write(vpu, &av1_filt_ref_adj_6, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1122
hantro_reg_write(vpu, &av1_filt_ref_adj_7, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1123
hantro_reg_write(vpu, &av1_filt_mb_adj_0, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1124
hantro_reg_write(vpu, &av1_filt_mb_adj_1, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1251
hantro_reg_write(vpu, &av1_apply_grain, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1254
hantro_reg_write(vpu, &av1_num_y_points_b, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1255
hantro_reg_write(vpu, &av1_num_cb_points_b, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1256
hantro_reg_write(vpu, &av1_num_cr_points_b, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1257
hantro_reg_write(vpu, &av1_scaling_shift, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1258
hantro_reg_write(vpu, &av1_cb_mult, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1259
hantro_reg_write(vpu, &av1_cb_luma_mult, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1260
hantro_reg_write(vpu, &av1_cb_offset, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1261
hantro_reg_write(vpu, &av1_cr_mult, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1262
hantro_reg_write(vpu, &av1_cr_luma_mult, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1263
hantro_reg_write(vpu, &av1_cr_offset, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1264
hantro_reg_write(vpu, &av1_overlap_flag, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1265
hantro_reg_write(vpu, &av1_clip_to_restricted_range, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1266
hantro_reg_write(vpu, &av1_chroma_scaling_from_luma, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1267
hantro_reg_write(vpu, &av1_random_seed, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1285
hantro_reg_write(vpu, &av1_apply_grain, 1);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1287
hantro_reg_write(vpu, &av1_num_y_points_b,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1289
hantro_reg_write(vpu, &av1_num_cb_points_b,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1291
hantro_reg_write(vpu, &av1_num_cr_points_b,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1293
hantro_reg_write(vpu, &av1_scaling_shift,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1297
hantro_reg_write(vpu, &av1_cb_mult, film_grain->cb_mult - 128);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1298
hantro_reg_write(vpu, &av1_cb_luma_mult, film_grain->cb_luma_mult - 128);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1299
hantro_reg_write(vpu, &av1_cb_offset, film_grain->cb_offset - 256);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1300
hantro_reg_write(vpu, &av1_cr_mult, film_grain->cr_mult - 128);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1301
hantro_reg_write(vpu, &av1_cr_luma_mult, film_grain->cr_luma_mult - 128);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1302
hantro_reg_write(vpu, &av1_cr_offset, film_grain->cr_offset - 256);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1304
hantro_reg_write(vpu, &av1_cb_mult, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1305
hantro_reg_write(vpu, &av1_cb_luma_mult, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1306
hantro_reg_write(vpu, &av1_cb_offset, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1307
hantro_reg_write(vpu, &av1_cr_mult, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1308
hantro_reg_write(vpu, &av1_cr_luma_mult, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1309
hantro_reg_write(vpu, &av1_cr_offset, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1312
hantro_reg_write(vpu, &av1_overlap_flag,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1314
hantro_reg_write(vpu, &av1_clip_to_restricted_range,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1316
hantro_reg_write(vpu, &av1_chroma_scaling_from_luma, scaling_from_luma);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1317
hantro_reg_write(vpu, &av1_random_seed, film_grain->grain_seed);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1416
hantro_reg_write(vpu, &av1_enable_cdef, enable_cdef);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1417
hantro_reg_write(vpu, &av1_cdef_bits, cdef->bits);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1418
hantro_reg_write(vpu, &av1_cdef_damping, cdef->damping_minus_3);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1434
hantro_reg_write(vpu, &av1_cdef_luma_primary_strength,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1436
hantro_reg_write(vpu, &av1_cdef_luma_secondary_strength,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1438
hantro_reg_write(vpu, &av1_cdef_chroma_primary_strength,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1440
hantro_reg_write(vpu, &av1_cdef_chroma_secondary_strength,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1472
hantro_reg_write(vpu, &av1_lr_type, lr_type);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1473
hantro_reg_write(vpu, &av1_lr_unit_size, lr_unit_size);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1553
hantro_reg_write(vpu, &av1_superres_pic_width, frame->upscaled_width);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1556
hantro_reg_write(vpu, &av1_scale_denom_minus9,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1559
hantro_reg_write(vpu, &av1_scale_denom_minus9, frame->superres_denom);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1561
hantro_reg_write(vpu, &av1_superres_luma_step, superres_luma_step);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1562
hantro_reg_write(vpu, &av1_superres_chroma_step, superres_chroma_step);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1563
hantro_reg_write(vpu, &av1_superres_luma_step_invra,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1565
hantro_reg_write(vpu, &av1_superres_chroma_step_invra,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1567
hantro_reg_write(vpu, &av1_superres_init_luma_subpel_x,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1569
hantro_reg_write(vpu, &av1_superres_init_chroma_subpel_x,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1571
hantro_reg_write(vpu, &av1_superres_is_scaled, superres_is_scaled);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1589
hantro_reg_write(vpu, &av1_pic_width_in_cbs, pic_width_in_cbs);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1590
hantro_reg_write(vpu, &av1_pic_height_in_cbs, pic_height_in_cbs);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1591
hantro_reg_write(vpu, &av1_pic_width_pad, pic_width_pad);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1592
hantro_reg_write(vpu, &av1_pic_height_pad, pic_height_pad);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1723
hantro_reg_write(vpu, &av1_use_temporal0_mvs, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1724
hantro_reg_write(vpu, &av1_use_temporal1_mvs, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1725
hantro_reg_write(vpu, &av1_use_temporal2_mvs, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1726
hantro_reg_write(vpu, &av1_use_temporal3_mvs, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1728
hantro_reg_write(vpu, &av1_mf1_last_offset, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1729
hantro_reg_write(vpu, &av1_mf1_last2_offset, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1730
hantro_reg_write(vpu, &av1_mf1_last3_offset, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1731
hantro_reg_write(vpu, &av1_mf1_golden_offset, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1732
hantro_reg_write(vpu, &av1_mf1_bwdref_offset, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1733
hantro_reg_write(vpu, &av1_mf1_altref2_offset, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1734
hantro_reg_write(vpu, &av1_mf1_altref_offset, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1744
hantro_reg_write(vpu, &av1_use_temporal0_mvs, 1);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1747
hantro_reg_write(vpu, &av1_mf1_last_offset, val);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1750
hantro_reg_write(vpu, &av1_mf1_last2_offset, val);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1753
hantro_reg_write(vpu, &av1_mf1_last3_offset, val);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1756
hantro_reg_write(vpu, &av1_mf1_golden_offset, val);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1759
hantro_reg_write(vpu, &av1_mf1_bwdref_offset, val);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1762
hantro_reg_write(vpu, &av1_mf1_altref2_offset, val);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1765
hantro_reg_write(vpu, &av1_mf1_altref_offset, val);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1768
hantro_reg_write(vpu, &av1_mf2_last_offset, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1769
hantro_reg_write(vpu, &av1_mf2_last2_offset, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1770
hantro_reg_write(vpu, &av1_mf2_last3_offset, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1771
hantro_reg_write(vpu, &av1_mf2_golden_offset, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1772
hantro_reg_write(vpu, &av1_mf2_bwdref_offset, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1773
hantro_reg_write(vpu, &av1_mf2_altref2_offset, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1774
hantro_reg_write(vpu, &av1_mf2_altref_offset, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1784
hantro_reg_write(vpu, &av1_use_temporal1_mvs, 1);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1787
hantro_reg_write(vpu, &av1_mf2_last_offset, val);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1790
hantro_reg_write(vpu, &av1_mf2_last2_offset, val);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1793
hantro_reg_write(vpu, &av1_mf2_last3_offset, val);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1796
hantro_reg_write(vpu, &av1_mf2_golden_offset, val);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1799
hantro_reg_write(vpu, &av1_mf2_bwdref_offset, val);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1802
hantro_reg_write(vpu, &av1_mf2_altref2_offset, val);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1805
hantro_reg_write(vpu, &av1_mf2_altref_offset, val);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1808
hantro_reg_write(vpu, &av1_mf3_last_offset, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1809
hantro_reg_write(vpu, &av1_mf3_last2_offset, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1810
hantro_reg_write(vpu, &av1_mf3_last3_offset, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1811
hantro_reg_write(vpu, &av1_mf3_golden_offset, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1812
hantro_reg_write(vpu, &av1_mf3_bwdref_offset, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1813
hantro_reg_write(vpu, &av1_mf3_altref2_offset, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1814
hantro_reg_write(vpu, &av1_mf3_altref_offset, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1824
hantro_reg_write(vpu, &av1_use_temporal2_mvs, 1);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1827
hantro_reg_write(vpu, &av1_mf3_last_offset, val);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1830
hantro_reg_write(vpu, &av1_mf3_last2_offset, val);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1833
hantro_reg_write(vpu, &av1_mf3_last3_offset, val);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1836
hantro_reg_write(vpu, &av1_mf3_golden_offset, val);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1839
hantro_reg_write(vpu, &av1_mf3_bwdref_offset, val);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1842
hantro_reg_write(vpu, &av1_mf3_altref2_offset, val);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1845
hantro_reg_write(vpu, &av1_mf3_altref_offset, val);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1848
hantro_reg_write(vpu, &av1_cur_last_offset, cur_offset[0]);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1849
hantro_reg_write(vpu, &av1_cur_last2_offset, cur_offset[1]);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1850
hantro_reg_write(vpu, &av1_cur_last3_offset, cur_offset[2]);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1851
hantro_reg_write(vpu, &av1_cur_golden_offset, cur_offset[3]);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1852
hantro_reg_write(vpu, &av1_cur_bwdref_offset, cur_offset[4]);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1853
hantro_reg_write(vpu, &av1_cur_altref2_offset, cur_offset[5]);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1854
hantro_reg_write(vpu, &av1_cur_altref_offset, cur_offset[6]);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1856
hantro_reg_write(vpu, &av1_cur_last_roffset, cur_roffset[0]);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1857
hantro_reg_write(vpu, &av1_cur_last2_roffset, cur_roffset[1]);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1858
hantro_reg_write(vpu, &av1_cur_last3_roffset, cur_roffset[2]);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1859
hantro_reg_write(vpu, &av1_cur_golden_roffset, cur_roffset[3]);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1860
hantro_reg_write(vpu, &av1_cur_bwdref_roffset, cur_roffset[4]);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1861
hantro_reg_write(vpu, &av1_cur_altref2_roffset, cur_roffset[5]);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1862
hantro_reg_write(vpu, &av1_cur_altref_roffset, cur_roffset[6]);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1864
hantro_reg_write(vpu, &av1_mf1_type, mf_types[0] - V4L2_AV1_REF_LAST_FRAME);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1865
hantro_reg_write(vpu, &av1_mf2_type, mf_types[1] - V4L2_AV1_REF_LAST_FRAME);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1866
hantro_reg_write(vpu, &av1_mf3_type, mf_types[2] - V4L2_AV1_REF_LAST_FRAME);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1899
hantro_reg_write(vpu, &av1_ref_frames, ref_frames);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1926
hantro_reg_write(vpu, &av1_ref_scaling_enable, scale_enable);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1928
hantro_reg_write(vpu, &av1_ref0_gm_mode,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1930
hantro_reg_write(vpu, &av1_ref1_gm_mode,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1932
hantro_reg_write(vpu, &av1_ref2_gm_mode,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1934
hantro_reg_write(vpu, &av1_ref3_gm_mode,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1936
hantro_reg_write(vpu, &av1_ref4_gm_mode,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1938
hantro_reg_write(vpu, &av1_ref5_gm_mode,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1940
hantro_reg_write(vpu, &av1_ref6_gm_mode,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1967
hantro_reg_write(vpu, &av1_skip_mode,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1969
hantro_reg_write(vpu, &av1_tempor_mvp_e,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1971
hantro_reg_write(vpu, &av1_delta_lf_res_log,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1973
hantro_reg_write(vpu, &av1_delta_lf_multi,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1976
hantro_reg_write(vpu, &av1_delta_lf_present,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1979
hantro_reg_write(vpu, &av1_disable_cdf_update,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1981
hantro_reg_write(vpu, &av1_allow_warp,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1983
hantro_reg_write(vpu, &av1_show_frame,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1985
hantro_reg_write(vpu, &av1_switchable_motion_mode,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1987
hantro_reg_write(vpu, &av1_allow_masked_compound,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1990
hantro_reg_write(vpu, &av1_allow_interintra,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1993
hantro_reg_write(vpu, &av1_enable_intra_edge_filter,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1996
hantro_reg_write(vpu, &av1_allow_filter_intra,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1998
hantro_reg_write(vpu, &av1_enable_jnt_comp,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2000
hantro_reg_write(vpu, &av1_enable_dual_filter,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2002
hantro_reg_write(vpu, &av1_reduced_tx_set_used,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2004
hantro_reg_write(vpu, &av1_allow_screen_content_tools,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2006
hantro_reg_write(vpu, &av1_allow_intrabc,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2010
hantro_reg_write(vpu, &av1_force_interger_mv, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2012
hantro_reg_write(vpu, &av1_force_interger_mv,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2015
hantro_reg_write(vpu, &av1_blackwhite_e, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2016
hantro_reg_write(vpu, &av1_delta_q_res_log, ctrls->frame->quantization.delta_q_res);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2017
hantro_reg_write(vpu, &av1_delta_q_present,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2021
hantro_reg_write(vpu, &av1_idr_pic_e, IS_INTRA(ctrls->frame->frame_type));
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2022
hantro_reg_write(vpu, &av1_quant_base_qindex, ctrls->frame->quantization.base_q_idx);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2023
hantro_reg_write(vpu, &av1_bit_depth_y_minus8, ctx->bit_depth - 8);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2024
hantro_reg_write(vpu, &av1_bit_depth_c_minus8, ctx->bit_depth - 8);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2026
hantro_reg_write(vpu, &av1_mcomp_filt_type, ctrls->frame->interpolation_filter);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2027
hantro_reg_write(vpu, &av1_high_prec_mv_e,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2029
hantro_reg_write(vpu, &av1_comp_pred_mode,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2033
hantro_reg_write(vpu, &av1_transform_mode, tx_mode);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2034
hantro_reg_write(vpu, &av1_max_cb_size,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2037
hantro_reg_write(vpu, &av1_min_cb_size, 3);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2039
hantro_reg_write(vpu, &av1_comp_pred_fixed_ref, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2040
hantro_reg_write(vpu, &av1_comp_pred_var_ref0_av1, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2041
hantro_reg_write(vpu, &av1_comp_pred_var_ref1_av1, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2042
hantro_reg_write(vpu, &av1_filt_level_seg0, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2043
hantro_reg_write(vpu, &av1_filt_level_seg1, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2044
hantro_reg_write(vpu, &av1_filt_level_seg2, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2045
hantro_reg_write(vpu, &av1_filt_level_seg3, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2046
hantro_reg_write(vpu, &av1_filt_level_seg4, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2047
hantro_reg_write(vpu, &av1_filt_level_seg5, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2048
hantro_reg_write(vpu, &av1_filt_level_seg6, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2049
hantro_reg_write(vpu, &av1_filt_level_seg7, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2051
hantro_reg_write(vpu, &av1_qp_delta_y_dc_av1, ctrls->frame->quantization.delta_q_y_dc);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2052
hantro_reg_write(vpu, &av1_qp_delta_ch_dc_av1, ctrls->frame->quantization.delta_q_u_dc);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2053
hantro_reg_write(vpu, &av1_qp_delta_ch_ac_av1, ctrls->frame->quantization.delta_q_u_ac);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2055
hantro_reg_write(vpu, &av1_qmlevel_y, ctrls->frame->quantization.qm_y);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2056
hantro_reg_write(vpu, &av1_qmlevel_u, ctrls->frame->quantization.qm_u);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2057
hantro_reg_write(vpu, &av1_qmlevel_v, ctrls->frame->quantization.qm_v);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2059
hantro_reg_write(vpu, &av1_qmlevel_y, 0xff);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2060
hantro_reg_write(vpu, &av1_qmlevel_u, 0xff);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2061
hantro_reg_write(vpu, &av1_qmlevel_v, 0xff);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2064
hantro_reg_write(vpu, &av1_lossless_e, rockchip_vpu981_av1_dec_is_lossless(ctx));
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2065
hantro_reg_write(vpu, &av1_quant_delta_v_dc, ctrls->frame->quantization.delta_q_v_dc);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2066
hantro_reg_write(vpu, &av1_quant_delta_v_ac, ctrls->frame->quantization.delta_q_v_ac);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2068
hantro_reg_write(vpu, &av1_skip_ref0,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2070
hantro_reg_write(vpu, &av1_skip_ref1,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2097
hantro_reg_write(vpu, &av1_strm_buffer_len, src_buf_len);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2098
hantro_reg_write(vpu, &av1_strm_start_bit, start_bit);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2099
hantro_reg_write(vpu, &av1_stream_len, src_len);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2100
hantro_reg_write(vpu, &av1_strm_start_offset, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2162
hantro_reg_write(vpu, &av1_dec_mode, AV1_DEC_MODE);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2163
hantro_reg_write(vpu, &av1_dec_out_ec_byte_word, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2164
hantro_reg_write(vpu, &av1_write_mvs_e, 1);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2165
hantro_reg_write(vpu, &av1_dec_out_ec_bypass, 1);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2166
hantro_reg_write(vpu, &av1_dec_clk_gate_e, 1);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2168
hantro_reg_write(vpu, &av1_dec_abort_e, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2169
hantro_reg_write(vpu, &av1_dec_tile_int_e, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2171
hantro_reg_write(vpu, &av1_dec_alignment, 64);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2172
hantro_reg_write(vpu, &av1_apf_disable, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2173
hantro_reg_write(vpu, &av1_apf_threshold, 8);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2174
hantro_reg_write(vpu, &av1_dec_buswidth, 2);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2175
hantro_reg_write(vpu, &av1_dec_max_burst, 16);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2176
hantro_reg_write(vpu, &av1_error_conceal_e, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2177
hantro_reg_write(vpu, &av1_axi_rd_ostd_threshold, 64);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2178
hantro_reg_write(vpu, &av1_axi_wr_ostd_threshold, 64);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2180
hantro_reg_write(vpu, &av1_ext_timeout_cycles, 0xfffffff);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2181
hantro_reg_write(vpu, &av1_ext_timeout_override_e, 1);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2182
hantro_reg_write(vpu, &av1_timeout_cycles, 0xfffffff);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2183
hantro_reg_write(vpu, &av1_timeout_override_e, 1);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2190
hantro_reg_write(vpu, &av1_dec_e, 1);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2216
hantro_reg_write(vpu, &av1_pp_out_e, 1);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2217
hantro_reg_write(vpu, &av1_pp_in_format, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2218
hantro_reg_write(vpu, &av1_pp0_dup_hor, 1);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2219
hantro_reg_write(vpu, &av1_pp0_dup_ver, 1);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2221
hantro_reg_write(vpu, &av1_pp_in_height, height / 2);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2222
hantro_reg_write(vpu, &av1_pp_in_width, width / 2);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2223
hantro_reg_write(vpu, &av1_pp_out_height, height);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2224
hantro_reg_write(vpu, &av1_pp_out_width, width);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2225
hantro_reg_write(vpu, &av1_pp_out_y_stride,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2227
hantro_reg_write(vpu, &av1_pp_out_c_stride,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2231
hantro_reg_write(vpu, &av1_pp_out_format, 1);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2234
hantro_reg_write(vpu, &av1_pp_out_format, 3);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2238
hantro_reg_write(vpu, &av1_pp_out_format, 10);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2241
hantro_reg_write(vpu, &av1_pp_out_format, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2244
hantro_reg_write(vpu, &av1_ppd_blend_exist, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2245
hantro_reg_write(vpu, &av1_ppd_dith_exist, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2246
hantro_reg_write(vpu, &av1_ablend_crop_e, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2247
hantro_reg_write(vpu, &av1_pp_format_customer1_e, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2248
hantro_reg_write(vpu, &av1_pp_crop_exist, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2249
hantro_reg_write(vpu, &av1_pp_up_level, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2250
hantro_reg_write(vpu, &av1_pp_down_level, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2251
hantro_reg_write(vpu, &av1_pp_exist, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
2262
hantro_reg_write(vpu, &av1_pp_out_e, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
627
hantro_reg_write(vpu, &av1_multicore_expect_context_update, !!(context_update_x == 0));
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
628
hantro_reg_write(vpu, &av1_tile_enable,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
630
hantro_reg_write(vpu, &av1_num_tile_cols_8k, tile_info->tile_cols);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
631
hantro_reg_write(vpu, &av1_num_tile_rows_8k, tile_info->tile_rows);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
632
hantro_reg_write(vpu, &av1_context_update_tile_id, context_update_tile_id);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
633
hantro_reg_write(vpu, &av1_tile_transpose, 1);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
636
hantro_reg_write(vpu, &av1_dec_tile_size_mag, tile_info->tile_size_bytes - 1);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
638
hantro_reg_write(vpu, &av1_dec_tile_size_mag, 3);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
706
hantro_reg_write(vpu, &av1_ref0_height, height);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
707
hantro_reg_write(vpu, &av1_ref0_width, width);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
708
hantro_reg_write(vpu, &av1_ref0_ver_scale, scale_width);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
709
hantro_reg_write(vpu, &av1_ref0_hor_scale, scale_height);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
712
hantro_reg_write(vpu, &av1_ref1_height, height);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
713
hantro_reg_write(vpu, &av1_ref1_width, width);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
714
hantro_reg_write(vpu, &av1_ref1_ver_scale, scale_width);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
715
hantro_reg_write(vpu, &av1_ref1_hor_scale, scale_height);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
718
hantro_reg_write(vpu, &av1_ref2_height, height);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
719
hantro_reg_write(vpu, &av1_ref2_width, width);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
720
hantro_reg_write(vpu, &av1_ref2_ver_scale, scale_width);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
721
hantro_reg_write(vpu, &av1_ref2_hor_scale, scale_height);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
724
hantro_reg_write(vpu, &av1_ref3_height, height);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
725
hantro_reg_write(vpu, &av1_ref3_width, width);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
726
hantro_reg_write(vpu, &av1_ref3_ver_scale, scale_width);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
727
hantro_reg_write(vpu, &av1_ref3_hor_scale, scale_height);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
730
hantro_reg_write(vpu, &av1_ref4_height, height);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
731
hantro_reg_write(vpu, &av1_ref4_width, width);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
732
hantro_reg_write(vpu, &av1_ref4_ver_scale, scale_width);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
733
hantro_reg_write(vpu, &av1_ref4_hor_scale, scale_height);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
736
hantro_reg_write(vpu, &av1_ref5_height, height);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
737
hantro_reg_write(vpu, &av1_ref5_width, width);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
738
hantro_reg_write(vpu, &av1_ref5_ver_scale, scale_width);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
739
hantro_reg_write(vpu, &av1_ref5_hor_scale, scale_height);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
742
hantro_reg_write(vpu, &av1_ref6_height, height);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
743
hantro_reg_write(vpu, &av1_ref6_width, width);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
744
hantro_reg_write(vpu, &av1_ref6_ver_scale, scale_width);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
745
hantro_reg_write(vpu, &av1_ref6_hor_scale, scale_height);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
771
hantro_reg_write(vpu, &av1_ref0_sign_bias, val);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
774
hantro_reg_write(vpu, &av1_ref1_sign_bias, val);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
777
hantro_reg_write(vpu, &av1_ref2_sign_bias, val);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
780
hantro_reg_write(vpu, &av1_ref3_sign_bias, val);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
783
hantro_reg_write(vpu, &av1_ref4_sign_bias, val);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
786
hantro_reg_write(vpu, &av1_ref5_sign_bias, val);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
789
hantro_reg_write(vpu, &av1_ref6_sign_bias, val);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
821
hantro_reg_write(vpu, &av1_use_temporal3_mvs, 1);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
825
hantro_reg_write(vpu, &av1_segment_temp_upd_e,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
827
hantro_reg_write(vpu, &av1_segment_upd_e,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
829
hantro_reg_write(vpu, &av1_segment_e,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
832
hantro_reg_write(vpu, &av1_error_resilient,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
837
hantro_reg_write(vpu, &av1_use_temporal3_mvs, 0);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
901
hantro_reg_write(vpu, &av1_last_active_seg, last_active_seg);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
902
hantro_reg_write(vpu, &av1_preskip_segid, preskip_segid);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
904
hantro_reg_write(vpu, &av1_seg_quant_sign, segsign);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
907
hantro_reg_write(vpu, &av1_quant_seg0,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
909
hantro_reg_write(vpu, &av1_filt_level_delta0_seg0,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
911
hantro_reg_write(vpu, &av1_filt_level_delta1_seg0,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
913
hantro_reg_write(vpu, &av1_filt_level_delta2_seg0,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
915
hantro_reg_write(vpu, &av1_filt_level_delta3_seg0,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
917
hantro_reg_write(vpu, &av1_refpic_seg0,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
919
hantro_reg_write(vpu, &av1_skip_seg0,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
921
hantro_reg_write(vpu, &av1_global_mv_seg0,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
924
hantro_reg_write(vpu, &av1_quant_seg1,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
926
hantro_reg_write(vpu, &av1_filt_level_delta0_seg1,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
928
hantro_reg_write(vpu, &av1_filt_level_delta1_seg1,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
930
hantro_reg_write(vpu, &av1_filt_level_delta2_seg1,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
932
hantro_reg_write(vpu, &av1_filt_level_delta3_seg1,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
934
hantro_reg_write(vpu, &av1_refpic_seg1,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
936
hantro_reg_write(vpu, &av1_skip_seg1,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
938
hantro_reg_write(vpu, &av1_global_mv_seg1,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
941
hantro_reg_write(vpu, &av1_quant_seg2,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
943
hantro_reg_write(vpu, &av1_filt_level_delta0_seg2,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
945
hantro_reg_write(vpu, &av1_filt_level_delta1_seg2,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
947
hantro_reg_write(vpu, &av1_filt_level_delta2_seg2,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
949
hantro_reg_write(vpu, &av1_filt_level_delta3_seg2,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
951
hantro_reg_write(vpu, &av1_refpic_seg2,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
953
hantro_reg_write(vpu, &av1_skip_seg2,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
955
hantro_reg_write(vpu, &av1_global_mv_seg2,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
958
hantro_reg_write(vpu, &av1_quant_seg3,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
960
hantro_reg_write(vpu, &av1_filt_level_delta0_seg3,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
962
hantro_reg_write(vpu, &av1_filt_level_delta1_seg3,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
964
hantro_reg_write(vpu, &av1_filt_level_delta2_seg3,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
966
hantro_reg_write(vpu, &av1_filt_level_delta3_seg3,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
968
hantro_reg_write(vpu, &av1_refpic_seg3,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
970
hantro_reg_write(vpu, &av1_skip_seg3,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
972
hantro_reg_write(vpu, &av1_global_mv_seg3,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
975
hantro_reg_write(vpu, &av1_quant_seg4,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
977
hantro_reg_write(vpu, &av1_filt_level_delta0_seg4,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
979
hantro_reg_write(vpu, &av1_filt_level_delta1_seg4,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
981
hantro_reg_write(vpu, &av1_filt_level_delta2_seg4,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
983
hantro_reg_write(vpu, &av1_filt_level_delta3_seg4,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
985
hantro_reg_write(vpu, &av1_refpic_seg4,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
987
hantro_reg_write(vpu, &av1_skip_seg4,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
989
hantro_reg_write(vpu, &av1_global_mv_seg4,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
992
hantro_reg_write(vpu, &av1_quant_seg5,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
994
hantro_reg_write(vpu, &av1_filt_level_delta0_seg5,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
996
hantro_reg_write(vpu, &av1_filt_level_delta1_seg5,
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
998
hantro_reg_write(vpu, &av1_filt_level_delta2_seg5,
