drivers/gpu/drm/i915/gvt/aperture_gm.c

101

gvt_dbg_core("vgpu%d: alloc high GM start %llx size %llx\n", vgpu->id,

drivers/gpu/drm/i915/gvt/aperture_gm.c

98

gvt_dbg_core("vgpu%d: alloc low GM start %llx size %llx\n", vgpu->id,

drivers/gpu/drm/i915/gvt/cfg_space.c

104

gvt_dbg_core("vgpu-%d power status changed to %d\n",

drivers/gpu/drm/i915/gvt/dmabuf.c

235

gvt_dbg_core("invalid drm_format_mod %llx for tiling\n",

drivers/gpu/drm/i915/gvt/fb_decoder.c

181

gvt_dbg_core("skl: unsupported bpp:%d\n", bpp);

drivers/gpu/drm/i915/gvt/fb_decoder.c

184

gvt_dbg_core("skl: unsupported tile format:%x\n",

drivers/gpu/drm/i915/gvt/fb_decoder.c

379

gvt_dbg_core("alpha_plane=0x%x, alpha_force=0x%x\n",

drivers/gpu/drm/i915/gvt/firmware.c

173

gvt_dbg_core("Invalid firmware: %s [file] 0x%llx [request] 0x%llx\n",

drivers/gpu/drm/i915/gvt/firmware.c

221

gvt_dbg_core("request hw state firmware %s...\n", path);

drivers/gpu/drm/i915/gvt/firmware.c

229

gvt_dbg_core("success.\n");

drivers/gpu/drm/i915/gvt/firmware.c

235

gvt_dbg_core("verified.\n");

drivers/gpu/drm/i915/gvt/gtt.c

2065

gvt_dbg_core("GMA 0x%lx is not present\n", gma);

drivers/gpu/drm/i915/gvt/gtt.c

2634

gvt_dbg_core("init gtt\n");

drivers/gpu/drm/i915/gvt/handlers.c

1375

gvt_dbg_core("vgpu%d: %s VGA mode\n", vgpu->id,

drivers/gpu/drm/i915/gvt/handlers.c

1751

gvt_dbg_core("VM(%d) write %x to mailbox, return data0 %x\n",

drivers/gpu/drm/i915/gvt/handlers.c

2082

gvt_dbg_core("EXECLIST %s on ring %s\n",

drivers/gpu/drm/i915/gvt/handlers.c

241

gvt_dbg_core("vgpu%d: ips enabled\n", vgpu->id);

drivers/gpu/drm/i915/gvt/handlers.c

243

gvt_dbg_core("vgpu%d: ips disabled\n", vgpu->id);

drivers/gpu/drm/i915/gvt/interrupt.c

489

gvt_dbg_core("vgpu%d: IRQ receive event %d (%s)\n",

drivers/gpu/drm/i915/gvt/interrupt.c

722

gvt_dbg_core("init irq framework\n");

drivers/gpu/drm/i915/gvt/kvmgt.c

1204

gvt_dbg_core("get region info bar:%d\n", info->index);

drivers/gpu/drm/i915/gvt/kvmgt.c

1213

gvt_dbg_core("get region info index:%d\n", info->index);

drivers/gpu/drm/i915/gvt/kvmgt.c

1265

gvt_dbg_core("vgpu%d ioctl, cmd: %d\n", vgpu->id, cmd);

drivers/gpu/drm/i915/gvt/kvmgt.c

1474

gvt_dbg_core("intel_vgpu_create succeeded for mdev: %s\n",

drivers/gpu/drm/i915/gvt/kvmgt.c

1737

gvt_dbg_core("service thread start\n");

drivers/gpu/drm/i915/gvt/kvmgt.c

1836

gvt_dbg_core("init gvt device\n");

drivers/gpu/drm/i915/gvt/kvmgt.c

1901

gvt_dbg_core("gvt device initialization is done\n");

drivers/gpu/drm/i915/gvt/mmio_context.c

242

gvt_dbg_core("add lri reg pair 0x%x:0x%x in inhibit ctx, vgpu:%d, rind_id:%d\n",

drivers/gpu/drm/i915/gvt/mmio_context.c

272

gvt_dbg_core("add lri reg pair 0x%x:0x%x in inhibit ctx, vgpu:%d, rind_id:%d\n",

drivers/gpu/drm/i915/gvt/mmio_context.c

299

gvt_dbg_core("add lri reg pair 0x%x:0x%x in inhibit ctx, vgpu:%d, rind_id:%d\n",

drivers/gpu/drm/i915/gvt/mmio_context.c

408

gvt_dbg_core("invalidate TLB for ring %s\n", engine->name);

drivers/gpu/drm/i915/gvt/opregion.c

227

gvt_dbg_core("init vgpu%d opregion\n", vgpu->id);

drivers/gpu/drm/i915/gvt/opregion.c

274

gvt_dbg_core("emulate opregion from kernel\n");

drivers/gpu/drm/i915/gvt/opregion.c

288

gvt_dbg_core("vgpu%d: clean vgpu opregion\n", vgpu->id);

drivers/gpu/drm/i915/gvt/sched_policy.c

430

gvt_dbg_core("vgpu%d: start schedule\n", vgpu->id);

drivers/gpu/drm/i915/gvt/sched_policy.c

456

gvt_dbg_core("vgpu%d: stop schedule\n", vgpu->id);

drivers/gpu/drm/i915/gvt/scheduler.c

1170

gvt_dbg_core("workload thread for ring %s started\n", engine->name);

drivers/gpu/drm/i915/gvt/scheduler.c

1257

gvt_dbg_core("clean workload scheduler\n");

drivers/gpu/drm/i915/gvt/scheduler.c

1274

gvt_dbg_core("init workload scheduler\n");

drivers/gpu/drm/i915/gvt/scheduler.c

1501

gvt_dbg_core("vgpu%d: remove submission ops\n", vgpu->id);

drivers/gpu/drm/i915/gvt/scheduler.c

1513

gvt_dbg_core("vgpu%d: activate ops [ %s ]\n",

drivers/gpu/drm/i915/gvt/vgpu.c

136

gvt_dbg_core("type[%d]: %s avail %u low %u high %u fence %u weight %u res %s\n",

drivers/gpu/drm/i915/gvt/vgpu.c

321

gvt_dbg_core("low %u MB high %u MB fence %u\n",

drivers/gpu/drm/i915/gvt/vgpu.c

444

gvt_dbg_core("------------------------------------------\n");

drivers/gpu/drm/i915/gvt/vgpu.c

445

gvt_dbg_core("resseting vgpu%d, dmlr %d, engine_mask %08x\n",

drivers/gpu/drm/i915/gvt/vgpu.c

497

gvt_dbg_core("reset vgpu%d done\n", vgpu->id);

drivers/gpu/drm/i915/gvt/vgpu.c

498

gvt_dbg_core("------------------------------------------\n");

drivers/gpu/drm/i915/gvt/vgpu.c

71

gvt_dbg_core("Populate PVINFO PAGE for vGPU %d\n", vgpu->id);

drivers/gpu/drm/i915/gvt/vgpu.c

72

gvt_dbg_core("aperture base [GMADR] 0x%llx size 0x%llx\n",

drivers/gpu/drm/i915/gvt/vgpu.c

74

gvt_dbg_core("hidden base [GMADR] 0x%llx size=0x%llx\n",

drivers/gpu/drm/i915/gvt/vgpu.c

76

gvt_dbg_core("fence size %d\n", vgpu_fence_sz(vgpu));