gr_write32
gr_write32(&dev->regs->control, control);
gr_write32(&dev->regs->control, GR_CONTROL_VI);
gr_write32(&ep->regs->dmactrl, ep_dmactrl | GR_DMACTRL_DA);
gr_write32(&dev->regs->status, GR_STATUS_UR);
gr_write32(&ep->regs->epctrl, epctrl);
gr_write32(&ep->regs->dmactrl, GR_DMACTRL_IE | GR_DMACTRL_AI);
gr_write32(&ep->regs->epctrl, epctrl);
gr_write32(&dev->regs->control,
gr_write32(&dev->regs->control, control);
gr_write32(&dev->epo[0].regs->epctrl, epctrl_val);
gr_write32(&dev->epi[0].regs->epctrl, epctrl_val | GR_EPCTRL_PI);
gr_write32(&dev->epo[0].regs->dmactrl, dmactrl_val);
gr_write32(&dev->epi[0].regs->dmactrl, dmactrl_val);
gr_write32(&ep->regs->dmaaddr, req->curr_desc->paddr);
gr_write32(&ep->regs->dmactrl, dmactrl | GR_DMACTRL_DA);
gr_write32(&ep->regs->dmactrl, dmactrl | GR_DMACTRL_AD);
gr_write32(&ep->regs->epctrl, 0);
gr_write32(&ep->regs->dmactrl, 0);
gr_write32(&dev->epo[0].regs->epctrl, epctrl | GR_EPCTRL_CS);
gr_write32(&dev->epi[0].regs->epctrl, epctrl | GR_EPCTRL_CS);
gr_write32(&ep->regs->epctrl, epctrl | GR_EPCTRL_EH);
gr_write32(&ep->regs->epctrl, epctrl & ~GR_EPCTRL_EH);
gr_write32(&dev->regs->control, 0);
gr_write32(&dev->regs->control, control);
gr_write32(&dev->regs->control, control);