gpio_ctrl
gpio_ctrl = of_iomap(gpio_ctrl_np, 0);
if (!gpio_ctrl) {
static void __iomem *gpio_ctrl;
reg = readl(gpio_ctrl);
writel(reg, gpio_ctrl);
ackcmd = readl(gpio_ctrl);
[ackcmd] "r" (ackcmd), [gpio_ctrl] "r" (gpio_ctrl) : "r1");
struct device_node *gpio_ctrl;
gpio_ctrl = of_parse_phandle(dev->of_node,
if (!gpio_ctrl) {
gpio_device_find_by_fwnode(of_fwnode_handle(gpio_ctrl));
of_node_put(gpio_ctrl);
unsigned long gpio_ctrl;
gpio_ctrl = reg;
assign_bit(ltc2992_gpio_addr_map[offset].ctrl_bit, &gpio_ctrl, value);
gpio_ctrl);
unsigned long gpio_ctrl = 0;
assign_bit(ltc2992_gpio_addr_map[gpio_nr].ctrl_bit, &gpio_ctrl, true);
ret = ltc2992_write_reg(st, LTC2992_GPIO_CTRL, 1, gpio_ctrl);
struct regmap *gpio_ctrl = priv->gpio_ctrl;
return regmap_update_bits(gpio_ctrl, BCM63XX_EPHY_REG, mask, val);
struct regmap *gpio_ctrl = priv->gpio_ctrl;
return regmap_update_bits(gpio_ctrl, BCM63268_GPHY_REG, mask, val);
priv->gpio_ctrl = syscon_regmap_lookup_by_phandle(np, "brcm,gpio-ctrl");
if (!IS_ERR(priv->gpio_ctrl)) {
struct regmap *gpio_ctrl;
bool gpio_ctrl;
if (wx->gpio_ctrl) {
wr32(wx, WX_GPIO_POLARITY, wx->gpio_ctrl ? 0 : 0x3);
if (wx->gpio_ctrl)
if (wx->gpio_ctrl)
wx->gpio_ctrl = 1;
wx->gpio_ctrl = 0;
ret = gpio_ctrl(sd, 1);
ret = gpio_ctrl(sd, 1);
gpio_ctrl(sd, 0);
ret = gpio_ctrl(sd, 0);
ret = gpio_ctrl(sd, 0);
ret = gpio_ctrl(sd, 1);
ret = gpio_ctrl(sd, 0);
gpio_ctrl(sd, 0);
ret = gpio_ctrl(sd, 0);
ret = gpio_ctrl(sd, 0);
u8 gpio_ctrl;
gpio_ctrl = config_buf[CP210X_2NCONFIG_GPIO_CONTROL_IDX];
if (gpio_ctrl & CP2102N_QFN20_GPIO0_CLK_MODE) /* GPIO 0 */
if (gpio_ctrl & CP2102N_QFN20_GPIO1_RS485_MODE) /* GPIO 1 */
if (gpio_ctrl & CP2102N_QFN20_GPIO2_TXLED_MODE) /* GPIO 2 */
if (gpio_ctrl & CP2102N_QFN20_GPIO3_RXLED_MODE) /* GPIO 3 */
priv->gpio_altfunc = (gpio_ctrl >> 2) & 0x0f;