gmu_write - Linux

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1001

gmu_write(gmu, REG_A6XX_GMU_MRC_GBIF_QOS_CTRL, 0x33);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1044

gmu_write(gmu, REG_A6XX_GMU_AO_HOST_INTERRUPT_MASK, ~0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1045

gmu_write(gmu, REG_A6XX_GMU_GMU2HOST_INTR_MASK, ~0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1097

gmu_write(&a6xx_gpu->gmu, REG_A8XX_GMU_GMU_PWR_COL_KEEPALIVE, 0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1099

gmu_write(&a6xx_gpu->gmu, REG_A6XX_GMU_GMU_PWR_COL_KEEPALIVE, 0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1116

gmu_write(gmu, REG_A6XX_GMU_AHB_FENCE_STATUS_CLR, 0x7);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1117

gmu_write(gmu, REG_A6XX_GMU_AO_AHB_FENCE_CTRL, 0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1123

gmu_write(gmu, REG_A6XX_GMU_CM3_SYSRESET, 1);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1201

gmu_write(gmu, REG_A6XX_GMU_AO_HOST_INTERRUPT_CLR, ~0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1202

gmu_write(gmu, REG_A6XX_GMU_AO_HOST_INTERRUPT_MASK, ~A6XX_GMU_IRQ_MASK);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1232

gmu_write(gmu, REG_A6XX_GMU_GMU2HOST_INTR_CLR, ~0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1233

gmu_write(gmu, REG_A6XX_GMU_GMU2HOST_INTR_MASK, ~A6XX_HFI_IRQ_MASK);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

194

gmu_write(gmu, REG_A6XX_GMU_DCVS_ACK_OPTION, 0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

196

gmu_write(gmu, REG_A6XX_GMU_DCVS_PERF_SETTING,

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

203

gmu_write(gmu, REG_A6XX_GMU_DCVS_BW_SETTING, 0xff);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

272

gmu_write(gmu, REG_A6XX_GMU_CM3_SYSRESET, 1);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

278

gmu_write(gmu, REG_A8XX_GMU_GENERAL_9, 0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

280

gmu_write(gmu, REG_A7XX_GMU_GENERAL_9, 0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

282

gmu_write(gmu, REG_A6XX_GPU_GMU_CX_GMU_PWR_COL_CP_RESP, 0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

285

gmu_write(gmu, REG_A6XX_GMU_CM3_SYSRESET, 0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

303

gmu_write(gmu, REG_A6XX_GMU_HFI_CTRL_INIT, 1);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

390

gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, 1 << request);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

417

gmu_write(gmu, REG_A6XX_GMU_GMU2HOST_INTR_CLR, 1 << ack);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

43

gmu_write(gmu, REG_A6XX_GMU_AO_HOST_INTERRUPT_CLR, status);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

443

gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, 1 << bit);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

458

gmu_write(gmu, REG_A6XX_GMU_GX_SPTPRAC_POWER_CONTROL, 0x778000);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

483

gmu_write(gmu, REG_A6XX_GMU_GX_SPTPRAC_POWER_CONTROL, 0x778001);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

499

gmu_write(gmu, REG_A6XX_GMU_BOOT_SLUMBER_OPTION, 0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

504

gmu_write(gmu, REG_A6XX_GMU_GX_VOTE_IDX, vote & 0xff);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

505

gmu_write(gmu, REG_A6XX_GMU_MX_VOTE_IDX, (vote >> 8) & 0xff);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

522

gmu_write(gmu, REG_A8XX_GPU_GMU_CX_GMU_CX_FALNEXT_INTF, BIT(0));

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

525

gmu_write(gmu, REG_A6XX_GPU_GMU_CX_GMU_CX_FALNEXT_INTF, BIT(0));

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

537

gmu_write(gmu, REG_A8XX_GMU_CX_GMU_POWER_COUNTER_ENABLE, 0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

539

gmu_write(gmu, REG_A6XX_GMU_CX_GMU_POWER_COUNTER_ENABLE, 0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

551

gmu_write(gmu, REG_A6XX_GMU_BOOT_SLUMBER_OPTION, 1);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

567

gmu_write(gmu, REG_A6XX_GMU_AO_AHB_FENCE_CTRL, 0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

580

gmu_write(gmu, REG_A6XX_GMU_RSCC_CONTROL_REQ, BIT(1));

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

597

gmu_write(gmu, REG_A6XX_GMU_RSCC_CONTROL_REQ, 0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

616

gmu_write(gmu, REG_A6XX_GMU_RSCC_CONTROL_REQ, 1);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

623

gmu_write(gmu, REG_A6XX_GMU_RSCC_CONTROL_REQ, 0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

67

gmu_write(gmu, REG_A6XX_GMU_GMU2HOST_INTR_CLR, status);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

772

gmu_write(gmu, REG_A6XX_GMU_SYS_BUS_CONFIG, 0x1);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

773

gmu_write(gmu, REG_A6XX_GMU_ICACHE_CONFIG, 0x1);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

774

gmu_write(gmu, REG_A6XX_GMU_DCACHE_CONFIG, 0x1);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

780

gmu_write(gmu, REG_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL, 0x9c40400);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

784

gmu_write(gmu, REG_A6XX_GMU_PWR_COL_INTER_FRAME_HYST,

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

791

gmu_write(gmu, REG_A6XX_GMU_PWR_COL_SPTPRAC_HYST,

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

906

gmu_write(gmu, REG_A6XX_GPU_GMU_CX_GMU_CX_FALNEXT_INTF, 1);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

907

gmu_write(gmu, REG_A6XX_GPU_GMU_CX_GMU_CX_FAL_INTF, 1);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

909

gmu_write(gmu, REG_A8XX_GPU_GMU_CX_GMU_CX_FALNEXT_INTF, 1);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

910

gmu_write(gmu, REG_A8XX_GPU_GMU_CX_GMU_CX_FAL_INTF, 1);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

917

gmu_write(gmu, REG_A6XX_GMU_GENERAL_7, 1);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

934

gmu_write(gmu, REG_A6XX_GMU_CM3_FW_INIT_RESULT, 0);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

935

gmu_write(gmu, REG_A6XX_GMU_CM3_BOOT_CONFIG, 0x02);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

938

gmu_write(gmu, REG_A6XX_GMU_HFI_QTBL_ADDR, gmu->hfi.iova);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

939

gmu_write(gmu, REG_A6XX_GMU_HFI_QTBL_INFO, 1);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

952

gmu_write(gmu, REG_A6XX_GMU_AHB_FENCE_RANGE_0,

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

961

gmu_write(gmu, REG_A6XX_GMU_CM3_CFG, 0x4052);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

979

gmu_write(gmu, REG_A8XX_GMU_GENERAL_10, chipid);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

980

gmu_write(gmu, REG_A8XX_GMU_GENERAL_8,

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

984

gmu_write(gmu, REG_A7XX_GMU_GENERAL_10, chipid);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

985

gmu_write(gmu, REG_A7XX_GMU_GENERAL_8,

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

989

gmu_write(gmu, REG_A6XX_GMU_HFI_SFR_ADDR, chipid);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

991

gmu_write(gmu, REG_A6XX_GPU_GMU_CX_GMU_PWR_COL_CP_MSG,

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

161

gmu_write(gmu, reg, val | or);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1404

gmu_write(&a6xx_gpu->gmu, REG_A6XX_GMU_CX_GMU_POWER_COUNTER_SELECT_1,

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1443

gmu_write(gmu, REG_A6XX_GPU_GMU_AO_GPU_CX_BUSY_MASK, 0xff000000);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1447

gmu_write(gmu, REG_A6XX_GMU_CX_GMU_POWER_COUNTER_ENABLE, 1);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1943

gmu_write(&a6xx_gpu->gmu, REG_A6XX_GMU_GMU_PWR_COL_KEEPALIVE, on);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

661

gmu_write(&a6xx_gpu->gmu, REG_A6XX_GPU_GMU_AO_GMU_CGC_MODE_CNTL,

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

663

gmu_write(&a6xx_gpu->gmu, REG_A6XX_GPU_GMU_AO_GMU_CGC_DELAY_CNTL,

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

665

gmu_write(&a6xx_gpu->gmu, REG_A6XX_GPU_GMU_AO_GMU_CGC_HYST_CNTL,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1258

gmu_write(&a6xx_gpu->gmu, REG_A6XX_GMU_AO_AHB_FENCE_CTRL, 0);

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

101

gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, 0x01);

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

137

gmu_write(gmu, REG_A6XX_GMU_GMU2HOST_INTR_CLR,

drivers/gpu/drm/msm/adreno/a6xx_preempt.c

151

gmu_write(&a6xx_gpu->gmu, REG_A6XX_GMU_PWR_COL_PREEMPT_KEEPALIVE, on);

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

1003

gmu_write(&a6xx_gpu->gmu, REG_A6XX_GMU_GMU_PWR_COL_KEEPALIVE, 1);

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

196

gmu_write(gmu, REG_A6XX_GPU_GMU_AO_GMU_CGC_MODE_CNTL,

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

198

gmu_write(gmu, REG_A6XX_GPU_GMU_AO_GMU_CGC_DELAY_CNTL,

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

200

gmu_write(gmu, REG_A6XX_GPU_GMU_AO_GMU_CGC_HYST_CNTL,

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

559

gmu_write(&a6xx_gpu->gmu, REG_A8XX_GMU_CX_GMU_POWER_COUNTER_SELECT_XOCLK_1,

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

598

gmu_write(gmu, REG_A6XX_GPU_GMU_AO_GPU_CX_BUSY_MASK, 0xff000000);

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

602

gmu_write(gmu, REG_A8XX_GMU_CX_GMU_POWER_COUNTER_ENABLE, 1);